llvm-6502/lib/Target/Sparc
2008-09-04 17:05:41 +00:00
..
DelaySlotFiller.cpp Tidy up several unbeseeming casts from pointer to intptr_t. 2008-09-04 17:05:41 +00:00
FPMover.cpp Tidy up several unbeseeming casts from pointer to intptr_t. 2008-09-04 17:05:41 +00:00
Makefile Start moving sparc to use SparcCallingConv.td, switching over 2008-03-17 05:41:48 +00:00
README.txt fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105 2008-02-28 05:44:20 +00:00
Sparc.h Use raw_ostream throughout the AsmPrinter. 2008-08-21 00:14:44 +00:00
Sparc.td Start moving sparc to use SparcCallingConv.td, switching over 2008-03-17 05:41:48 +00:00
SparcAsmPrinter.cpp Use raw_ostream throughout the AsmPrinter. 2008-08-21 00:14:44 +00:00
SparcCallingConv.td Check in some #ifdef'd out code switching call argument 2008-03-17 06:58:37 +00:00
SparcInstrFormats.td
SparcInstrInfo.cpp Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 2008-08-26 18:03:31 +00:00
SparcInstrInfo.h Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested 2008-08-26 18:03:31 +00:00
SparcInstrInfo.td Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 2008-03-15 00:03:38 +00:00
SparcISelDAGToDAG.cpp erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 2008-08-28 21:40:38 +00:00
SparcISelLowering.cpp Add intrinsics for log, log2, log10, exp, exp2. 2008-09-04 00:47:13 +00:00
SparcISelLowering.h Rename SDOperand to SDValue. 2008-07-27 21:46:04 +00:00
SparcRegisterInfo.cpp Emit saveri with the correct operand order, patch by Richard Pennington! 2008-08-03 18:16:14 +00:00
SparcRegisterInfo.h Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 2008-03-31 20:40:39 +00:00
SparcRegisterInfo.td
SparcSubtarget.cpp
SparcSubtarget.h
SparcTargetAsmInfo.cpp Add interface for section override. Use this for Sparc, since it should use named BSS section. 2008-08-16 12:58:12 +00:00
SparcTargetAsmInfo.h Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations 2008-08-16 12:57:07 +00:00
SparcTargetMachine.cpp Use raw_ostream throughout the AsmPrinter. 2008-08-21 00:14:44 +00:00
SparcTargetMachine.h Use raw_ostream throughout the AsmPrinter. 2008-08-21 00:14:44 +00:00

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].
* Add support for isel'ing UMUL_LOHI instead of marking it as Expand.
* Emit the 'Branch on Integer Register with Prediction' instructions.  It's
  not clear how to write a pattern for this though:

float %t1(int %a, int* %p) {
        %C = seteq int %a, 0
        br bool %C, label %T, label %F
T:
        store int 123, int* %p
        br label %F
F:
        ret float undef
}

codegens to this:

t1:
        save -96, %o6, %o6
1)      subcc %i0, 0, %l0
1)      bne .LBBt1_2    ! F
        nop
.LBBt1_1:       ! T
        or %g0, 123, %l0
        st %l0, [%i1]
.LBBt1_2:       ! F
        restore %g0, %g0, %g0
        retl
        nop

1) should be replaced with a brz in V9 mode.

* Same as above, but emit conditional move on register zero (p192) in V9 
  mode.  Testcase:

int %t1(int %a, int %b) {
        %C = seteq int %a, 0
        %D = select bool %C, int %a, int %b
        ret int %D
}

* Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling 
  with the Y register, if they are faster.

* Codegen bswap(load)/store(bswap) -> load/store ASI

* Implement frame pointer elimination, e.g. eliminate save/restore for 
  leaf fns.
* Fill delay slots