llvm-6502/test/CodeGen
Arnold Schwaighofer d9316dacf5 ARM NEON: Handle v16i8 and v8i16 reverse shuffles
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default
legalization of storing and loading to the stack. This is important because we
generate reverse shuffles in the loop vectorizer when we reverse store to an
array.

  uint8_t Arr[N];
  for (i = 0; i < N; ++i)
    Arr[N - i - 1] = ...

radar://13171760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 01:58:32 +00:00
..
AArch64 Implement external weak (ELF) symbols on AArch64 2013-02-06 16:43:33 +00:00
ARM ARM NEON: Handle v16i8 and v8i16 reverse shuffles 2013-02-12 01:58:32 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Extend Hexagon hardware loop generation to handle various additional cases: 2013-02-11 21:37:55 +00:00
MBlaze
Mips Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are the 2013-02-08 21:42:56 +00:00
MSP430 Add support for varargs functions for msp430. 2012-11-21 17:28:27 +00:00
NVPTX [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations. 2013-02-11 18:56:35 +00:00
PowerPC DAGCombiner: Constant folding around pre-increment loads/stores 2013-02-08 21:35:47 +00:00
R600 R600: Add support for SET*_DX10 instructions 2013-02-07 14:02:35 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Use the 'count' attribute to calculate the upper bound of an array. 2012-12-04 21:34:03 +00:00
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 This is a follow-up on r174446, now taking Atom processors into 2013-02-06 20:43:57 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00