llvm-6502/lib/Target/AArch64
Quentin Colombet 32675bbfd0 [AArch64][FastISel] Variant of the logical instructions that use two input
registers cannot write on SP.

rdar://problem/20748715


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236352 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 21:34:57 +00:00
..
AsmParser AArch64: add BFC alias for the BFI/BFM instructions. 2015-04-30 18:28:58 +00:00
Disassembler [AArch64] Add v8.1a "Limited Ordering Regions" extension 2015-04-16 15:30:43 +00:00
InstPrinter AArch64: add BFC alias for the BFI/BFM instructions. 2015-04-30 18:28:58 +00:00
MCTargetDesc [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
TargetInfo
Utils [AArch64] LORID_EL1 register must be treated as read-only 2015-04-20 16:54:37 +00:00
AArch64.h
AArch64.td
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp Change range-based for-loops to be -Wrange-loop-analysis clean. 2015-04-15 01:21:15 +00:00
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp [AArch64] Use MachineRegisterInfo instead of LiveIntervals to calculate liveness. NFC. 2015-04-22 18:05:13 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp [AArch64][FastISel] Variant of the logical instructions that use two input 2015-05-01 21:34:57 +00:00
AArch64FrameLowering.cpp [AArch64] Refactor out codes that depend on specific CS save sequence. 2015-04-29 20:03:38 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64InstrInfo.cpp [AArch64] Fix invalid use of references to BuildMI. 2015-04-16 11:37:40 +00:00
AArch64InstrInfo.h
AArch64InstrInfo.td Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64ISelDAGToDAG.cpp Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64ISelLowering.cpp Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64ISelLowering.h
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
AArch64Subtarget.h
AArch64TargetMachine.cpp [AArch64] Disable complex GEP optimization by default. 2015-04-22 09:11:38 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
AArch64TargetTransformInfo.h
CMakeLists.txt
LLVMBuild.txt
Makefile