.. |
InstrSched
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(1) Added special register class containing (for now) %fsr.
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2003-05-27 00:05:23 +00:00 |
InstrSelection
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When converting virtual registers to immediate constants, change the opcode.
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2003-05-30 20:36:27 +00:00 |
LiveVar
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Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
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2003-05-27 00:06:48 +00:00 |
ModuloScheduling
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so far everything compiles
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2003-05-30 00:17:09 +00:00 |
RegAlloc
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(1) Added special register class containing (for now) %fsr.
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2003-05-27 00:05:23 +00:00 |
.cvsignore
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Since there is now another derived .inc file, ignore them all.
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2003-05-29 20:15:27 +00:00 |
EmitBytecodeToAssembly.cpp
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changed implementation of LLVM BYTECODE Length
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2002-07-25 17:22:48 +00:00 |
MachineCodeForInstruction.h
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Move annotation to support library
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2003-01-14 21:29:58 +00:00 |
MachineFunctionInfo.h
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State for frame and constant pool information pulled out of MachineFunction
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2002-12-28 20:07:33 +00:00 |
MachineInstrAnnot.h
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Remove separate vector of implicit refs from MachineInstr, and
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2002-10-29 19:41:18 +00:00 |
Makefile
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Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.
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2003-05-30 08:02:14 +00:00 |
MappingInfo.cpp
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Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'.
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2002-10-28 20:00:31 +00:00 |
MappingInfo.h
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moved from CodeGen to this dir
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2002-07-22 22:09:35 +00:00 |
SparcV9_F2.td
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* Broke up SparcV9.td into separate files as it was getting unmanageable
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2003-05-29 03:31:43 +00:00 |
SparcV9_F3.td
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The 'rd' register is consistently mentioned last in instruction definitions.
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2003-05-31 06:25:19 +00:00 |
SparcV9_F4.td
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* Broke up SparcV9.td into separate files as it was getting unmanageable
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2003-05-29 03:31:43 +00:00 |
SparcV9_Reg.td
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* Broke up SparcV9.td into separate files as it was getting unmanageable
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2003-05-29 03:31:43 +00:00 |
SparcV9.burg.in
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Add support for compiling varargs functions.
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2003-05-25 15:59:47 +00:00 |
SparcV9.td
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* Put back into action SLL/SRL/SRA{r,i}6 instructions
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2003-05-31 06:24:29 +00:00 |
SparcV9AsmPrinter.cpp
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Code beautification, no functional changes.
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2003-05-31 06:22:37 +00:00 |
SparcV9CodeEmitter.cpp
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Removed useless code -- the byte order of output code is correct as is.
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2003-05-31 06:26:06 +00:00 |
SparcV9CodeEmitter.h
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Added:
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2003-05-30 20:17:33 +00:00 |
SparcV9Instr.def
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Made the register and immediate versions of instructions consecutive.
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2003-05-30 19:14:01 +00:00 |
SparcV9InstrInfo.cpp
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Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
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2003-05-27 22:35:43 +00:00 |
SparcV9InstrSelection.cpp
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Code beautification, no functional changes.
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2003-05-31 06:22:37 +00:00 |
SparcV9InstrSelectionSupport.h
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Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
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2003-05-30 20:11:56 +00:00 |
SparcV9Internals.h
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The register types need to be visible outside of the class to be useful.
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2003-05-30 20:12:42 +00:00 |
SparcV9PeepholeOpts.cpp
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Cleaned up code layout; no functional changes.
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2003-05-23 19:20:57 +00:00 |
SparcV9PreSelection.cpp
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Eliminate use of NonCopyable so that doxygen documentation doesn't link
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2003-05-01 20:28:45 +00:00 |
SparcV9PrologEpilogInserter.cpp
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Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
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2003-05-27 22:35:43 +00:00 |
SparcV9RegClassInfo.cpp
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Fixed `volatile' typo.
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2003-05-21 19:34:28 +00:00 |
SparcV9RegClassInfo.h
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Added special register class containing (for now) %fsr.
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2003-05-27 00:02:22 +00:00 |
SparcV9RegInfo.cpp
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Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed.
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2003-05-27 22:40:34 +00:00 |
SparcV9SchedInfo.cpp
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Added entries for each of the instructions with annotations ('r' or 'i').
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2003-05-27 22:33:39 +00:00 |
SparcV9StackSlots.cpp
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Rename MachineInstrInfo -> TargetInstrInfo
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2003-01-14 22:00:31 +00:00 |
SparcV9TargetMachine.cpp
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Enabling some of these passes causes lli to break
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2003-05-31 04:23:04 +00:00 |