llvm-6502/utils/TableGen
Andrew Trick d43b5c97cf Added MispredictPenalty to SchedMachineModel.
This replaces an existing subtarget hook on ARM and allows standard
CodeGen passes to potentially use the property.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161471 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-08 02:44:16 +00:00
..
AsmMatcherEmitter.cpp Remove extraneous ';'. 2012-08-04 10:31:40 +00:00
AsmWriterEmitter.cpp Clean up includes. 2012-07-27 06:44:02 +00:00
AsmWriterInst.cpp Move TableGen's parser and entry point into a library 2011-10-01 16:41:13 +00:00
AsmWriterInst.h
CallingConvEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CMakeLists.txt I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeEmitterGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CodeGenDAGPatterns.cpp TableGen: Pattern<> references to null_frag are a nop. 2012-07-17 18:39:36 +00:00
CodeGenDAGPatterns.h Convert assert(0) to llvm_unreachable 2012-02-05 07:21:30 +00:00
CodeGenInstruction.cpp Teach the AsmMatcherEmitter to allow InstAlias' where the suboperands of a complex operand are called out explicitly in the asm string. 2012-06-08 00:25:03 +00:00
CodeGenInstruction.h Teach the AsmMatcherEmitter to allow InstAlias' where the suboperands of a complex operand are called out explicitly in the asm string. 2012-06-08 00:25:03 +00:00
CodeGenIntrinsics.h rdar://11542750 - llvm.trap should be marked no return. 2012-05-27 23:20:41 +00:00
CodeGenRegisters.cpp Remove support for 'CompositeIndices' and sub-register cycles. 2012-07-26 23:39:50 +00:00
CodeGenRegisters.h Remove little semicolon that caused a lot of warnings. 2012-05-30 09:13:49 +00:00
CodeGenSchedule.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenSchedule.h I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenTarget.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeGenTarget.h I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
DAGISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
DAGISelMatcher.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
DAGISelMatcher.h Fix a typo (the the => the) 2012-07-23 08:51:15 +00:00
DAGISelMatcherEmitter.cpp TblGen: Tweak to pretty-print DAGISel.inc a bit better. 2012-07-18 22:41:03 +00:00
DAGISelMatcherGen.cpp Teach TableGen to put chains on more instructions 2012-06-26 18:46:28 +00:00
DAGISelMatcherOpt.cpp Remove unused STL header includes. 2011-04-23 19:53:52 +00:00
DFAPacketizerEmitter.cpp Fix Windows build after r159281: s/iterator/const_iterator 2012-06-28 07:47:50 +00:00
DisassemblerEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
EDEmitter.cpp Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas. 2012-07-18 04:11:12 +00:00
FastISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
FixedLenDecoderEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
InstrInfoEmitter.cpp I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
IntrinsicEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
LLVMBuild.txt LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
Makefile Build system infrastructure for multiple tblgens. 2011-10-06 01:51:51 +00:00
PseudoLoweringEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
RegisterInfoEmitter.cpp Eliminate the large XXXSubRegTable constant arrays. 2012-07-27 00:10:51 +00:00
SequenceToOffsetTable.h enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits into a 2012-05-17 15:55:41 +00:00
SetTheory.cpp Teach tblgen's set theory "sequence" operator to support an optional stride operand. 2012-05-24 21:37:08 +00:00
SetTheory.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
StringToOffsetTable.h Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo." 2012-03-15 18:05:57 +00:00
SubtargetEmitter.cpp Added MispredictPenalty to SchedMachineModel. 2012-08-08 02:44:16 +00:00
TableGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TableGenBackends.h Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TGValueTypes.cpp Revert pragma clang suppressions that confuse GCC. (I'll worry about how to suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean) 2011-12-20 08:22:49 +00:00
X86DisassemblerShared.h Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.cpp Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.h Remove trailing whitespace 2012-07-31 05:28:41 +00:00
X86ModRMFilters.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
X86ModRMFilters.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
X86RecognizableInstr.cpp Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code. 2012-07-30 06:48:11 +00:00
X86RecognizableInstr.h Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren. 2012-07-12 06:52:41 +00:00