| .. |
|
access-non-generic.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
|
2015-03-13 18:20:45 +00:00 |
|
add-128bit.ll
|
[NVPTX] 64-bit ADDC/ADDE are not legal
|
2013-07-01 12:59:04 +00:00 |
|
addrspacecast-gvar.ll
|
[NVPTX] Add support for addrspacecast in global variable initializers, including emitting generic() when casting to address space 0.
|
2014-04-09 15:39:11 +00:00 |
|
addrspacecast.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
aggr-param.ll
|
|
|
|
annotations.ll
|
|
|
|
arg-lowering.ll
|
[NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors
|
2014-06-27 18:35:44 +00:00 |
|
arithmetic-fp-sm20.ll
|
[NVPTX] Improve handling of FP fusion
|
2014-07-17 18:10:09 +00:00 |
|
arithmetic-int.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
atomics.ll
|
Add some tests for NVPTX lowering of cmpxchg
|
2014-07-21 22:54:44 +00:00 |
|
bfe.ll
|
[NVPTX] Add isel patterns for bit-field extract (bfe)
|
2014-06-27 18:35:27 +00:00 |
|
bug17709.ll
|
Remove the linker_private and linker_private_weak linkages.
|
2014-03-13 23:18:37 +00:00 |
|
bug21465.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
bug22246.ll
|
[NVPTX] Generate a more optimal sequence for select of i1
|
2015-01-26 19:52:20 +00:00 |
|
bug22322.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
call-with-alloca-buffer.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
callchain.ll
|
[NVPTX] Fix handling of indirect calls
|
2013-11-15 12:30:04 +00:00 |
|
calling-conv.ll
|
|
|
|
compare-int.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
constant-vectors.ll
|
[NVPTX] Make constant vector test case endian-independent
|
2013-09-19 13:14:44 +00:00 |
|
convert-fp.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
convert-int-sm20.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
ctlz.ll
|
[NVPTX] Add support for cttz/ctlz/ctpop
|
2013-06-28 17:58:07 +00:00 |
|
ctpop.ll
|
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
|
2013-07-13 20:38:47 +00:00 |
|
cttz.ll
|
[NVPTX] Add support for cttz/ctlz/ctpop
|
2013-06-28 17:58:07 +00:00 |
|
div-ri.ll
|
|
|
|
envreg.ll
|
[NVPTX] Add support for envreg reads
|
2014-06-27 18:35:21 +00:00 |
|
fast-math.ll
|
[NVPTX] Use approximate FP ops when unsafe-fp-math is used, and append
|
2013-07-22 12:18:04 +00:00 |
|
fma-assoc.ll
|
Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding.
|
2015-01-14 15:36:28 +00:00 |
|
fma-disable.ll
|
This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.
|
2012-05-04 20:18:50 +00:00 |
|
fma.ll
|
Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding.
|
2015-01-14 15:36:28 +00:00 |
|
fp16.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
fp-contract.ll
|
[NVPTX] Improve handling of FP fusion
|
2014-07-17 18:10:09 +00:00 |
|
fp-literals.ll
|
[NVPTX] Improve handling of FP fusion
|
2014-07-17 18:10:09 +00:00 |
|
function-align.ll
|
[NVPTXAsmPrinter] do not print .align on function headers
|
2015-03-12 01:50:30 +00:00 |
|
generic-to-nvvm.ll
|
|
|
|
global-ordering.ll
|
[NVPTX] Order global variables in def-use order before emiting them in the final assembly
|
2012-11-16 21:03:51 +00:00 |
|
gvar-init.ll
|
[NVPTX] Error out if initializer is given for variable in an address space that does not support initialization
|
2014-06-27 18:36:01 +00:00 |
|
half.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
i1-global.ll
|
|
|
|
i1-int-to-fp.ll
|
|
|
|
i1-param.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
i8-param.ll
|
|
|
|
imad.ll
|
[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
|
2014-06-27 18:35:37 +00:00 |
|
implicit-def.ll
|
|
|
|
inline-asm.ll
|
[NVPTX] Add 'b' asm constraint
|
2014-06-27 18:36:06 +00:00 |
|
intrin-nocapture.ll
|
[NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations.
|
2013-02-11 18:56:35 +00:00 |
|
intrinsic-old.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
intrinsics.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
isspacep.ll
|
[NVPTX] Add support for isspacep instruction
|
2014-06-27 18:35:24 +00:00 |
|
ld-addrspace.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
ld-generic.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
ldparam-v4.ll
|
[NVPTX] Fix off-by-one error when creating the VT list for an SDNode
|
2013-12-05 12:58:00 +00:00 |
|
ldu-i8.ll
|
|
|
|
ldu-ldg.ll
|
[NVPTX] Make the alignment an explicit argument to ldu/ldg
|
2014-08-29 15:30:20 +00:00 |
|
ldu-reg-plus-offset.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
|
2015-02-27 19:29:02 +00:00 |
|
lit.local.cfg
|
Reduce verbiage of lit.local.cfg files
|
2014-06-09 22:42:55 +00:00 |
|
load-sext-i1.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
local-stack-frame.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
machine-sink.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
managed.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
misaligned-vector-ldst.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
module-inline-asm.ll
|
[NVPTX] Add support for module-scope inline asm
|
2013-07-01 13:00:14 +00:00 |
|
mulwide.ll
|
[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
|
2014-07-23 20:23:49 +00:00 |
|
noduplicate-syncthreads.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
nounroll.ll
|
|
|
|
nvcl-param-align.ll
|
|
|
|
nvvm-reflect.ll
|
Add support for __nvvm_reflect changes in libdevice in CUDA-7.0
|
2015-03-19 17:05:35 +00:00 |
|
param-align.ll
|
[NVPTX] Use ABI alignment for parameters when alignment is not specified.
|
2012-11-09 23:50:24 +00:00 |
|
pr13291-i1-store.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
pr16278.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
pr17529.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
|
2015-02-27 19:29:02 +00:00 |
|
refl1.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
rotate.ll
|
|
|
|
rsqrt.ll
|
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
|
2013-07-13 20:38:47 +00:00 |
|
sched1.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
sched2.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
sext-in-reg.ll
|
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
|
2013-07-13 20:38:47 +00:00 |
|
sext-params.ll
|
|
|
|
shift-parts.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
simple-call.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
sm-version-20.ll
|
|
|
|
sm-version-21.ll
|
[NVPTX] Add more precise PTX/SM target attributes
|
2012-11-12 03:16:43 +00:00 |
|
sm-version-30.ll
|
|
|
|
sm-version-32.ll
|
[NVPTX] Associate a minimum PTX version for each SM architecture
|
2015-03-30 19:30:55 +00:00 |
|
sm-version-35.ll
|
[NVPTX] Associate a minimum PTX version for each SM architecture
|
2015-03-30 19:30:55 +00:00 |
|
sm-version-37.ll
|
[NVPTX] Associate a minimum PTX version for each SM architecture
|
2015-03-30 19:30:55 +00:00 |
|
sm-version-50.ll
|
[NVPTX] Associate a minimum PTX version for each SM architecture
|
2015-03-30 19:30:55 +00:00 |
|
sm-version-52.ll
|
|
|
|
sm-version-53.ll
|
[NVPTX] Associate a minimum PTX version for each SM architecture
|
2015-03-30 19:30:55 +00:00 |
|
st-addrspace.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
st-generic.ll
|
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
|
2014-07-16 16:26:58 +00:00 |
|
surf-read-cuda.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
surf-read.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
surf-write-cuda.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
surf-write.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
symbol-naming.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
|
2015-03-13 18:20:45 +00:00 |
|
tex-read-cuda.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
tex-read.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
texsurf-queries.ll
|
IR: Make metadata typeless in assembly
|
2014-12-15 19:07:53 +00:00 |
|
tuple-literal.ll
|
|
|
|
vec8.ll
|
[NVPTX] Fix logic error in loading vector parameters of more than 4 components
|
2013-11-11 19:28:16 +00:00 |
|
vec-param-load.ll
|
Fix non-deterministic SDNodeOrder-dependent codegen
|
2014-01-12 14:09:17 +00:00 |
|
vector-args.ll
|
[NVPTX] Add support for vectorized function return values
|
2013-06-28 17:57:55 +00:00 |
|
vector-call.ll
|
[NVPTX] Add missing .v4 qualifier on vector store instruction
|
2014-07-17 16:58:56 +00:00 |
|
vector-compare.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
vector-global.ll
|
[NVPTX] Fix bugs related to isSingleValueType
|
2014-12-17 17:59:04 +00:00 |
|
vector-loads.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
vector-return.ll
|
|
|
|
vector-select.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
vector-stores.ll
|
Add a target legalize hook for SplitVectorOperand (again)
|
2013-07-26 13:28:29 +00:00 |
|
weak-global.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
|
weak-linkage.ll
|
[NVPTX] Do not emit .weak symbols for NVPTX
|
2014-12-01 21:16:17 +00:00 |