llvm-6502/lib/CodeGen
Mehdi Amini df6c8efd9d SelectionDAG: add a -filter-view-dags option to llc
This option takes the name of the basic block you want to visualize
with -view-*-dags

Differential Revision: http://reviews.llvm.org/D6948



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225953 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 06:03:18 +00:00
..
AsmPrinter CodeGen support for x86_64 SEH catch handlers in LLVM 2015-01-14 01:05:27 +00:00
SelectionDAG SelectionDAG: add a -filter-view-dags option to llc 2015-01-14 06:03:18 +00:00
AggressiveAntiDepBreaker.cpp Handle early-clobber registers in the aggressive anti-dep breaker 2014-12-09 01:00:59 +00:00
AggressiveAntiDepBreaker.h mop up: "Don’t duplicate function or class name at the beginning of the comment." 2014-09-21 14:48:16 +00:00
AllocationOrder.cpp [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE 2014-04-22 02:02:50 +00:00
AllocationOrder.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
Analysis.cpp Add assertions for out of bound index in ComputeLinearIndex 2015-01-14 05:38:48 +00:00
AntiDepBreaker.h mop up: "Don’t duplicate function or class name at the beginning of the comment." 2014-09-21 14:48:16 +00:00
AtomicExpandPass.cpp Lower idempotent RMWs to fence+load 2014-09-25 17:27:43 +00:00
BasicTargetTransformInfo.cpp [SelectionDAG] Allow targets to specify legality of extloads' result 2015-01-08 00:51:32 +00:00
BranchFolding.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
BranchFolding.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
CalcSpillWeights.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
CallingConvLower.cpp musttail: Only set the inreg flag for fastcall and vectorcall 2015-01-12 23:28:23 +00:00
CMakeLists.txt Revert "Insert random noops to increase security against ROP attacks (llvm)" 2015-01-14 05:24:33 +00:00
CodeGen.cpp Revert "Insert random noops to increase security against ROP attacks (llvm)" 2015-01-14 05:24:33 +00:00
CodeGenPrepare.cpp [SimplifyLibCalls] Factor out fortified libcall handling. 2015-01-12 17:22:43 +00:00
CriticalAntiDepBreaker.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
CriticalAntiDepBreaker.h mop up: "Don’t duplicate function or class name at the beginning of the comment." 2014-09-21 14:48:16 +00:00
DeadMachineInstructionElim.cpp Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics 2015-01-13 00:48:10 +00:00
DFAPacketizer.cpp Remove the TargetMachine from DFAPacketizer since it was only 2014-10-14 01:03:16 +00:00
DwarfEHPrepare.cpp In DwarfEHPrepare, after all passes are run, RewindFunction may be a dangling 2014-09-14 20:36:28 +00:00
EarlyIfConversion.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
EdgeBundles.cpp Convert several loops over MachineFunction basic blocks to range-based loops 2014-04-30 18:29:51 +00:00
ErlangGC.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
ExecutionDepsFix.cpp ExecutionDepsFix: Correctly handle wide registers. 2014-12-17 19:13:47 +00:00
ExpandISelPseudos.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
ExpandPostRAPseudos.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
ForwardControlFlowIntegrity.cpp Fix build break: remove unused variable in FCFI. 2014-11-11 21:26:33 +00:00
GCMetadata.cpp GCStrategy should not own GCFunctionInfo 2014-12-11 01:47:23 +00:00
GCMetadataPrinter.cpp GCStrategy should not own GCFunctionInfo 2014-12-11 01:47:23 +00:00
GCStrategy.cpp Introduce an example statepoint GC strategy 2015-01-07 19:07:50 +00:00
GlobalMerge.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
IfConversion.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
InlineSpiller.cpp Bugfix in InlineSpiller::traceSiblingValue(). 2014-12-11 10:40:17 +00:00
InterferenceCache.cpp [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE 2014-04-22 02:02:50 +00:00
InterferenceCache.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
IntrinsicLowering.cpp [PATCH][Interpreter] Add missing FP intrinsic lowering. 2014-08-30 18:33:35 +00:00
JumpInstrTables.cpp Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert. 2015-01-05 10:15:49 +00:00
LatencyPriorityQueue.cpp [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE 2014-04-22 02:02:50 +00:00
LexicalScopes.cpp DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself. 2014-10-14 18:22:52 +00:00
LiveDebugVariables.cpp Added reset of LexicalScope in LiveDebugVariables reset function. 2014-10-24 02:46:50 +00:00
LiveDebugVariables.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
LiveInterval.cpp LiveInterval: Implement feedback by Quentin Colombet. 2015-01-07 23:35:11 +00:00
LiveIntervalAnalysis.cpp LiveIntervalAnalysis: Fix performance bug that I introduced in r224663. 2014-12-24 02:11:43 +00:00
LiveIntervalUnion.cpp LiveIntervalUnion: Allow specification of liverange when unifying/extracting. 2014-12-10 01:12:59 +00:00
LivePhysRegs.cpp
LiveRangeCalc.cpp LiveInterval: Introduce createMainRangeFromSubranges(). 2014-12-24 02:11:51 +00:00
LiveRangeCalc.h LiveRangeCalc: Rewrite subrange calculation 2014-12-16 04:03:38 +00:00
LiveRangeEdit.cpp LiveRangeEdit: Check for completely empy subranges after removing ValNos. 2014-12-24 02:11:46 +00:00
LiveRegMatrix.cpp LiveInterval: Use range based for loops for subregister ranges. 2014-12-11 00:59:06 +00:00
LiveStackAnalysis.cpp Move register class name strings to a single array in MCRegisterInfo to reduce static table size and number of relocation entries. 2014-11-17 05:50:14 +00:00
LiveVariables.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
LLVMBuild.txt
LLVMTargetMachine.cpp Add Forward Control-Flow Integrity. 2014-11-11 21:08:02 +00:00
LocalStackSlotAllocation.cpp [Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend 2014-12-01 22:52:56 +00:00
MachineBasicBlock.cpp The leak detector is dead, long live asan and valgrind. 2014-12-22 13:00:36 +00:00
MachineBlockFrequencyInfo.cpp Revert "Introduce a string_ostream string builder facilty" 2014-06-26 22:52:05 +00:00
MachineBlockPlacement.cpp [PowerPC/BlockPlacement] Allow target to provide a per-loop alignment preference 2015-01-03 17:58:24 +00:00
MachineBranchProbabilityInfo.cpp [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr. 2014-04-14 00:51:57 +00:00
MachineCombiner.cpp Change MCSchedModel to be a struct of statically initialized data. 2014-09-02 17:43:54 +00:00
MachineCopyPropagation.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
MachineCSE.cpp [MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction. 2014-12-02 18:09:51 +00:00
MachineDominanceFrontier.cpp Templatify DominanceFrontier. 2014-07-12 21:59:52 +00:00
MachineDominators.cpp [MachineDominatorTree] Provide a method to inform a MachineDominatorTree that a 2014-08-13 21:00:07 +00:00
MachineFunction.cpp Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics 2015-01-13 00:48:10 +00:00
MachineFunctionAnalysis.cpp Remove unused member variable. 2014-10-14 18:53:16 +00:00
MachineFunctionPass.cpp
MachineFunctionPrinterPass.cpp Rename argument strings of codegen passes to avoid collisions with command line 2014-12-13 04:52:04 +00:00
MachineInstr.cpp IR: Split Metadata from Value 2014-12-09 18:38:53 +00:00
MachineInstrBundle.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
MachineLICM.cpp [MachineLICM] A command-line option to hoist even cheap instructions 2015-01-08 22:10:48 +00:00
MachineLoopInfo.cpp
MachineModuleInfo.cpp CodeGen support for x86_64 SEH catch handlers in LLVM 2015-01-14 01:05:27 +00:00
MachineModuleInfoImpls.cpp
MachinePassRegistry.cpp [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr. 2014-04-14 00:51:57 +00:00
MachinePostDominators.cpp
MachineRegionInfo.cpp Header hygiene: remove using directive and #undef DEBUG_TYPE once we're done. 2014-07-30 00:25:24 +00:00
MachineRegisterInfo.cpp Silence more static analyzer warnings. 2014-12-15 18:48:43 +00:00
MachineScheduler.cpp Rename argument strings of codegen passes to avoid collisions with command line 2014-12-13 04:52:04 +00:00
MachineSink.cpp Use DomTree in MachineSink to sink over diamonds. 2014-12-04 10:36:42 +00:00
MachineSSAUpdater.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
MachineTraceMetrics.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
MachineVerifier.cpp [CodeGen] Let MachineVerifierPass own its banner string 2014-12-11 19:41:51 +00:00
Makefile
module.modulemap [modules] Add module maps for LLVM. These are not quite ready for prime-time 2014-05-21 02:46:14 +00:00
OcamlGC.cpp
OptimizePHIs.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
Passes.cpp Revert "Insert random noops to increase security against ROP attacks (llvm)" 2015-01-14 05:24:33 +00:00
PeepholeOptimizer.cpp Peephole opt needs optimizeSelect() to keep track of newly created MIs 2015-01-13 07:07:13 +00:00
PHIElimination.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
PostRASchedulerList.cpp Whitespace. 2014-10-29 15:23:11 +00:00
ProcessImplicitDefs.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
PrologEpilogInserter.cpp Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics 2015-01-13 00:48:10 +00:00
PrologEpilogInserter.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
PseudoSourceValue.cpp Make isAliased property for fixed-offset stack objects adjustable 2014-08-16 00:17:02 +00:00
README.txt
RegAllocBase.cpp [RegAllocGreedy] Introduce a late pass to repair broken hints. 2015-01-08 01:16:39 +00:00
RegAllocBase.h [RegAllocGreedy] Introduce a late pass to repair broken hints. 2015-01-08 01:16:39 +00:00
RegAllocBasic.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
RegAllocFast.cpp [RegAllocFast] Handle implicit definitions conservatively. 2014-12-03 23:38:08 +00:00
RegAllocGreedy.cpp [RegAllocGreedy] Introduce a late pass to repair broken hints. 2015-01-08 01:16:39 +00:00
RegAllocPBQP.cpp [PBQP] Callee saved regs should have a higher cost than scratch regs 2014-11-04 20:51:29 +00:00
RegisterClassInfo.cpp Silence more static analyzer warnings. 2014-12-15 18:48:43 +00:00
RegisterCoalescer.cpp RegisterCoalescer: Turn some impossible conditions into asserts 2015-01-12 19:10:17 +00:00
RegisterCoalescer.h mop up: "Don’t duplicate function or class name at the beginning of the comment." 2014-09-20 22:39:16 +00:00
RegisterPressure.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
RegisterScavenging.cpp Grab the subtarget and subtarget dependent variables off of 2014-10-14 07:22:00 +00:00
ScheduleDAG.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
ScheduleDAGInstrs.cpp New method SDep::isNormalMemoryOrBarrier() in ScheduleDAGInstrs.cpp. 2015-01-07 13:38:29 +00:00
ScheduleDAGPrinter.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
ScoreboardHazardRecognizer.cpp Change MCSchedModel to be a struct of statically initialized data. 2014-09-02 17:43:54 +00:00
ShadowStackGC.cpp Use nullptr instead of NULL for variadic sentinels 2014-11-13 22:55:19 +00:00
SjLjEHPrepare.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
SlotIndexes.cpp [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE 2014-04-22 02:02:50 +00:00
Spiller.h [RegAlloc] Kill off the trivial spiller - nobody is using it any more. 2014-11-06 19:12:38 +00:00
SpillPlacement.cpp Fix the threshold added in r186434 (a re-apply of r185393) and updaated 2014-10-02 22:23:14 +00:00
SpillPlacement.h Fix the threshold added in r186434 (a re-apply of r185393) and updaated 2014-10-02 22:23:14 +00:00
SplitKit.cpp LiveInterval: Use more range based for loops for value numbers and segments. 2014-12-10 23:07:54 +00:00
SplitKit.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
StackColoring.cpp IR: Split Metadata from Value 2014-12-09 18:38:53 +00:00
StackMapLivenessAnalysis.cpp [StackMaps] Allow the target to pre-process the live-out mask 2015-01-13 17:47:59 +00:00
StackMaps.cpp [StackMaps] Use CurrentFnSymForSize 2015-01-13 17:48:07 +00:00
StackProtector.cpp CodeGen: minor style tweaks to SSP 2014-12-21 21:52:38 +00:00
StackSlotColoring.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
StatepointExampleGC.cpp Add a missing file from 225365 2015-01-07 19:13:28 +00:00
TailDuplication.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
TargetFrameLoweringImpl.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
TargetInstrInfo.cpp Fix include ordering, NFC. 2015-01-08 11:59:43 +00:00
TargetLoweringBase.cpp R600: Implement getRecipEstimate 2015-01-13 20:53:23 +00:00
TargetLoweringObjectFileImpl.cpp Recommit r224935 with a fix for the ObjC++/AArch64 bug that that revision 2015-01-09 18:55:42 +00:00
TargetOptionsImpl.cpp Migrate ABIName to MCTargetOptions so that it can be shared between 2015-01-14 00:50:31 +00:00
TargetRegisterInfo.cpp Introduce register dump helper 2014-11-19 19:46:11 +00:00
TargetSchedule.cpp Remove unnecessary TargetMachine.h includes. 2014-10-14 07:22:08 +00:00
TwoAddressInstructionPass.cpp Update SetVector to rely on the underlying set's insert to return a pair<iterator, bool> 2014-11-19 07:49:26 +00:00
UnreachableBlockElim.cpp Use range based for loops to avoid needing to re-mention SmallPtrSet size. 2014-08-24 23:23:06 +00:00
VirtRegMap.cpp LiveInterval: Use range based for loops for subregister ranges. 2014-12-11 00:59:06 +00:00

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.