..
AsmParser
Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers.
2015-01-03 08:16:34 +00:00
InstPrinter
R600/SI: Fix f64 inline immediates
2014-12-17 21:04:08 +00:00
MCTargetDesc
Add r224985 back with a fix.
2014-12-31 17:19:34 +00:00
TargetInfo
AMDGPU.h
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
AMDGPU.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp
Silencing a 32-bit implicit conversion warning in MSVC; NFC.
2014-12-03 14:39:58 +00:00
AMDGPUAsmPrinter.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
R600/SI: fmin/fmax_legacy are not associative
2014-12-12 02:30:33 +00:00
AMDGPUInstructions.td
R600/SI: Make more unordered comparisons legal
2014-12-11 22:15:39 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp
R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime
2014-12-02 17:05:41 +00:00
AMDGPUISelLowering.cpp
R600: Remove outdated comment
2014-12-19 23:29:13 +00:00
AMDGPUISelLowering.h
R600: Fix min/max matching problems with unordered compares
2014-12-12 02:30:37 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
R600/SI: Fix f64 inline immediates
2014-12-17 21:04:08 +00:00
AMDGPUMCInstLower.h
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
R600/SI: Enable inline assembly
2014-12-03 04:08:00 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
AMDGPUSubtarget.h
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
AMDGPUTargetMachine.cpp
[CodeGen] Add print and verify pass after each MachineFunctionPass by default
2014-12-11 21:26:47 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
CaymanInstructions.td
CIInstructions.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
CMakeLists.txt
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
EvergreenInstructions.td
LLVMBuild.txt
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Makefile
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Processors.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td
R600/SI: Use unordered not equal instructions
2014-12-11 22:15:35 +00:00
R600Intrinsics.td
R600ISelLowering.cpp
R600: Fix min/max matching problems with unordered compares
2014-12-12 02:30:37 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
R600/SI: Move more information into SIProgramInfo struct
2014-12-02 21:28:53 +00:00
SIFixSGPRCopies.cpp
R600/SI: Fix SIFixSGPRCopies for copies to physical registers
2014-12-03 05:22:39 +00:00
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp
R600/SI: Add SIFoldOperands pass
2014-11-21 22:06:37 +00:00
SIInsertWaits.cpp
R600/SI: Disable VMEM and SMEM clauses by breaking them with S_NOP
2014-12-07 17:17:43 +00:00
SIInstrFormats.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
SIInstrInfo.cpp
R600/SI: isLegalOperand() shouldn't check constant bus for SALU instructions
2014-12-19 22:15:37 +00:00
SIInstrInfo.h
R600/SI: Set 20-bit immediate byte offset for SMRD on VI
2014-12-07 17:17:38 +00:00
SIInstrInfo.td
R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
2014-12-19 22:15:30 +00:00
SIInstructions.td
R600/SI: Fix f64 inline immediates
2014-12-17 21:04:08 +00:00
SIIntrinsics.td
SIISelLowering.cpp
Enable (sext x) == C --> x == (trunc C) combine
2014-12-21 16:48:42 +00:00
SIISelLowering.h
R600/SI: Combine min3/max3 instructions
2014-11-14 20:08:52 +00:00
SILoadStoreOptimizer.cpp
R600/SI: Fix live range error hidden by SIFoldOperands
2014-12-03 05:22:29 +00:00
SILowerControlFlow.cpp
Removing a variable that is initialized but never read. The original author has been alerted to the warning, in case this variable is meant to be used. Fixes -Werror builds in the meantime.
2014-11-24 14:03:16 +00:00
SILowerI1Copies.cpp
R600/SI: Remove i1 pseudo VALU ops
2014-12-03 05:22:35 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
2014-12-19 22:15:30 +00:00
SIRegisterInfo.h
SIRegisterInfo.td
R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
2014-12-19 22:15:30 +00:00
SISchedule.td
SIShrinkInstructions.cpp
R600/SI: Move continue after checking s_mov_b32.
2014-12-08 19:55:43 +00:00
SITypeRewriter.cpp
VIInstrFormats.td
R600/SI: Add VI instructions
2014-12-07 12:18:57 +00:00
VIInstructions.td
R600/SI: Set 20-bit immediate byte offset for SMRD on VI
2014-12-07 17:17:38 +00:00
