llvm-6502/test/CodeGen
Jordan Rose 3856b07276 Really XFAIL test/CodeGen/PowerPC/structsinregs.ll.
XFAIL needs a trailing colon. Hopefully this will get the buildbots
happy again while Bill works on getting it passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19 17:03:11 +00:00
..
ARM MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648 2012-09-18 21:24:16 +00:00
CellSPU
CPP
Generic
Hexagon
MBlaze
Mips Handled unaligned load/stores properly in Mips16 2012-09-15 01:02:03 +00:00
MSP430
NVPTX
PowerPC Really XFAIL test/CodeGen/PowerPC/structsinregs.ll. 2012-09-19 17:03:11 +00:00
SPARC Move load_to_switch.ll to test/CodeGen/SPARC/ 2012-09-19 09:25:03 +00:00
Thumb
Thumb2 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 2012-09-18 01:42:45 +00:00
X86 Add some cases to x86 OptimizeCompare to handle DEC and INC, too. 2012-09-17 22:04:23 +00:00
XCore