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5 Commits

Author SHA1 Message Date
marqs cb8e2b807c increase video mode name length to fit null terminator 2023-10-29 17:27:10 +02:00
marqs 080e2b2b91 fix upsample2x 2023-10-24 00:21:32 +03:00
marqs 83c33c41b9 restore original test pattern 2023-10-24 00:19:46 +03:00
marqs 8b35ba3339 fix locking issue with fractional sample rates 2023-10-19 18:51:32 +03:00
marqs edb300e03a misc fixes
* fix phase adjustment
* fix HDMI AVI infoframe checksum calculation
* reduce passthru OSD size
2023-10-08 18:02:36 +03:00
15 changed files with 8547 additions and 8664 deletions

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@ -219,7 +219,7 @@ set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/ossc_new.stp
set_global_assignment -name FITTER_EFFORT "AUTO FIT"
set_global_assignment -name SEED 3
set_global_assignment -name SEED 1

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@ -476,7 +476,7 @@ ir_rcv ir0 (
.ir_code_cnt (ir_code_cnt)
);
lat_tester lt0 (
/*lat_tester lt0 (
.clk27 (clk27),
.pclk (PCLK_sc),
.active (lt_active),
@ -490,21 +490,6 @@ lat_tester lt0 (
.stb_result (lt_stb_result),
.trig_waiting (lt_trig_waiting),
.finished (lt_finished)
);
/*Ävideogen vg0 (
.clk27 (PCLK_sc),
.reset_n (po_reset_n & ~enable_sc),
.lt_active (lt_active),
.lt_mode (lt_mode_synced),
.R_out (R_out_vg),
.G_out (G_out_vg),
.B_out (B_out_vg),
.HSYNC_out (HSYNC_out_vg),
.VSYNC_out (VSYNC_out_vg),
.DE_out (DE_out_vg),
.xpos (xpos_vg),
.ypos (ypos_vg)
);*/
endmodule

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@ -196,6 +196,7 @@ wire [8:0] Y_sl_hybr_ref, R_sl_hybr_ref, G_sl_hybr_ref, B_sl_hybr_ref;
reg [4:0] R_shmask_str, G_shmask_str, B_shmask_str;
wire [8:0] R_shmask_mult, G_shmask_mult, B_shmask_mult;
wire [7:0] R_vg, G_vg, B_vg;
wire [7:0] R_linebuf, G_linebuf, B_linebuf;
// Pipeline registers
@ -358,6 +359,18 @@ linebuf_top #(
);
videogen vg0 (
.pclk (PCLK_OUT_i),
.lt_active (1'b0),
.lt_mode (2'h0),
.xpos (xpos_pp[PP_TP_START]),
.ypos (ypos_pp[PP_TP_START]),
.R_out (R_vg),
.G_out (G_vg),
.B_out (B_vg)
);
// Frame change strobe synchronization
always @(posedge PCLK_OUT_i) begin
frame_change_sync1_reg <= frame_change_i;
@ -605,9 +618,9 @@ always @(posedge PCLK_OUT_i) begin
B_pp[PP_SLGEN_END] <= (draw_sl_pp[PP_SLGEN_START+4] & sl_method) ? B_sl_mult : B_pp[PP_SLGEN_START+4];
/* ---------- Testpattern / mask generation ---------- */
R_pp[PP_TP_END] <= testpattern_enable ? (xpos_pp[PP_TP_START] ^ ypos_pp[PP_TP_START]) : (mask_enable_pp[PP_TP_START] ? MASK_R : R_pp[PP_TP_START]);
G_pp[PP_TP_END] <= testpattern_enable ? (xpos_pp[PP_TP_START] ^ ypos_pp[PP_TP_START]) : (mask_enable_pp[PP_TP_START] ? MASK_G : G_pp[PP_TP_START]);
B_pp[PP_TP_END] <= testpattern_enable ? (xpos_pp[PP_TP_START] ^ ypos_pp[PP_TP_START]) : (mask_enable_pp[PP_TP_START] ? MASK_B : B_pp[PP_TP_START]);
R_pp[PP_TP_END] <= testpattern_enable ? R_vg : (mask_enable_pp[PP_TP_START] ? MASK_R : R_pp[PP_TP_START]);
G_pp[PP_TP_END] <= testpattern_enable ? G_vg : (mask_enable_pp[PP_TP_START] ? MASK_G : G_pp[PP_TP_START]);
B_pp[PP_TP_END] <= testpattern_enable ? B_vg : (mask_enable_pp[PP_TP_START] ? MASK_B : B_pp[PP_TP_START]);
end
// Output

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@ -1,5 +1,5 @@
//
// Copyright (C) 2015-2017 Markus Hiienkari <mhiienka@niksula.hut.fi>
// Copyright (C) 2015-2023 Markus Hiienkari <mhiienka@niksula.hut.fi>
//
// This file is part of Open Source Scan Converter project.
//
@ -20,18 +20,14 @@
`include "lat_tester_includes.v"
module videogen (
input clk27,
input reset_n,
input pclk,
input lt_active,
input [1:0] lt_mode,
input [11:0] xpos,
input [10:0] ypos,
output reg [7:0] R_out,
output reg [7:0] G_out,
output reg [7:0] B_out,
output reg HSYNC_out,
output reg VSYNC_out,
output reg DE_out,
output reg [9:0] xpos,
output reg [9:0] ypos
output reg [7:0] B_out
);
//Parameters for 720x480@59.94Hz (858px x 525lines, pclk 27MHz -> 59.94Hz)
@ -57,97 +53,33 @@ parameter V_GRAYRAMP = 10'd84;
parameter H_BORDER = ((H_AREA-H_GRADIENT)>>1);
parameter V_BORDER = ((V_AREA-V_GRADIENT)>>1);
parameter X_START = H_SYNCLEN + H_BACKPORCH;
parameter Y_START = V_SYNCLEN + V_BACKPORCH;
//Counters
reg [9:0] h_cnt; //max. 1024
reg [9:0] v_cnt; //max. 1024
//HSYNC gen (negative polarity)
always @(posedge clk27 or negedge reset_n)
// Pattern gen
always @(posedge pclk)
begin
if (!reset_n) begin
h_cnt <= 0;
xpos <= 0;
HSYNC_out <= 0;
end else begin
//Hsync counter
if (h_cnt < H_TOTAL-1) begin
h_cnt <= h_cnt + 1'b1;
if (h_cnt >= X_START)
xpos <= xpos + 1'b1;
end else begin
h_cnt <= 0;
xpos <= 0;
end
//Hsync signal
HSYNC_out <= (h_cnt < H_SYNCLEN) ? 1'b0 : 1'b1;
end
end
//VSYNC gen (negative polarity)
always @(posedge clk27 or negedge reset_n)
begin
if (!reset_n) begin
v_cnt <= 0;
ypos <= 0;
VSYNC_out <= 0;
end else begin
//Vsync counter
if (h_cnt == H_TOTAL-1) begin
if (v_cnt < V_TOTAL-1) begin
v_cnt <= v_cnt + 1'b1;
if (v_cnt >= Y_START)
ypos <= ypos + 1'b1;
end else begin
v_cnt <= 0;
ypos <= 0;
if (lt_active) begin
case (lt_mode)
default: begin
{R_out, G_out, B_out} <= {3{8'h00}};
end
end
//Vsync signal
VSYNC_out <= (v_cnt < V_SYNCLEN) ? 1'b0 : 1'b1;
end
end
//Data and ENABLE gen
always @(posedge clk27 or negedge reset_n)
begin
if (!reset_n) begin
R_out <= 8'h00;
G_out <= 8'h00;
B_out <= 8'h00;
DE_out <= 1'b0;
`LT_POS_TOPLEFT: begin
{R_out, G_out, B_out} <= {3{((xpos < (H_ACTIVE/`LT_WIDTH_DIV)) && (ypos < (V_ACTIVE/`LT_HEIGHT_DIV))) ? 8'hff : 8'h00}};
end
`LT_POS_CENTER: begin
{R_out, G_out, B_out} <= {3{((xpos >= ((H_ACTIVE/2)-(H_ACTIVE/(`LT_WIDTH_DIV*2)))) && (xpos < ((H_ACTIVE/2)+(H_ACTIVE/(`LT_WIDTH_DIV*2)))) && (ypos >= ((V_ACTIVE/2)-(V_ACTIVE/(`LT_HEIGHT_DIV*2)))) && (ypos < ((V_ACTIVE/2)+(V_ACTIVE/(`LT_HEIGHT_DIV*2))))) ? 8'hff : 8'h00}};
end
`LT_POS_BOTTOMRIGHT: begin
{R_out, G_out, B_out} <= {3{((xpos >= (H_ACTIVE-(H_ACTIVE/`LT_WIDTH_DIV))) && (ypos >= (V_ACTIVE-(V_ACTIVE/`LT_HEIGHT_DIV)))) ? 8'hff : 8'h00}};
end
endcase
end else begin
if (lt_active) begin
case (lt_mode)
default: begin
{R_out, G_out, B_out} <= {3{8'h00}};
end
`LT_POS_TOPLEFT: begin
{R_out, G_out, B_out} <= {3{((xpos < (H_ACTIVE/`LT_WIDTH_DIV)) && (ypos < (V_ACTIVE/`LT_HEIGHT_DIV))) ? 8'hff : 8'h00}};
end
`LT_POS_CENTER: begin
{R_out, G_out, B_out} <= {3{((xpos >= ((H_ACTIVE/2)-(H_ACTIVE/(`LT_WIDTH_DIV*2)))) && (xpos < ((H_ACTIVE/2)+(H_ACTIVE/(`LT_WIDTH_DIV*2)))) && (ypos >= ((V_ACTIVE/2)-(V_ACTIVE/(`LT_HEIGHT_DIV*2)))) && (ypos < ((V_ACTIVE/2)+(V_ACTIVE/(`LT_HEIGHT_DIV*2))))) ? 8'hff : 8'h00}};
end
`LT_POS_BOTTOMRIGHT: begin
{R_out, G_out, B_out} <= {3{((xpos >= (H_ACTIVE-(H_ACTIVE/`LT_WIDTH_DIV))) && (ypos >= (V_ACTIVE-(V_ACTIVE/`LT_HEIGHT_DIV)))) ? 8'hff : 8'h00}};
end
endcase
end else begin
if ((xpos < H_OVERSCAN) || (xpos >= H_OVERSCAN+H_AREA) || (ypos < V_OVERSCAN) || (ypos >= V_OVERSCAN+V_AREA))
{R_out, G_out, B_out} <= {3{(xpos[0] ^ ypos[0]) ? 8'hff : 8'h00}};
else if ((xpos < H_OVERSCAN+H_BORDER) || (xpos >= H_OVERSCAN+H_AREA-H_BORDER) || (ypos < V_OVERSCAN+V_BORDER) || (ypos >= V_OVERSCAN+V_AREA-V_BORDER))
{R_out, G_out, B_out} <= {3{8'h50}};
else if (ypos >= V_OVERSCAN+V_BORDER+V_GRADIENT-V_GRAYRAMP)
{R_out, G_out, B_out} <= {3{8'((((xpos - (H_OVERSCAN+H_BORDER)) >> 4) << 3) + (xpos - (H_OVERSCAN+H_BORDER) >> 6))}};
else
{R_out, G_out, B_out} <= {3{8'((xpos - (H_OVERSCAN+H_BORDER)) >> 1)}};
end
DE_out <= (h_cnt >= X_START && h_cnt < X_START + H_ACTIVE && v_cnt >= Y_START && v_cnt < Y_START + V_ACTIVE);
if ((xpos < H_OVERSCAN) || (xpos >= H_OVERSCAN+H_AREA) || (ypos < V_OVERSCAN) || (ypos >= V_OVERSCAN+V_AREA))
{R_out, G_out, B_out} <= {3{(xpos[0] ^ ypos[0]) ? 8'hff : 8'h00}};
else if ((xpos < H_OVERSCAN+H_BORDER) || (xpos >= H_OVERSCAN+H_AREA-H_BORDER) || (ypos < V_OVERSCAN+V_BORDER) || (ypos >= V_OVERSCAN+V_AREA-V_BORDER))
{R_out, G_out, B_out} <= {3{8'h50}};
else if (ypos >= V_OVERSCAN+V_BORDER+V_GRADIENT-V_GRAYRAMP)
{R_out, G_out, B_out} <= {3{8'((((xpos - (H_OVERSCAN+H_BORDER)) >> 4) << 3) + (xpos - (H_OVERSCAN+H_BORDER) >> 6))}};
else
{R_out, G_out, B_out} <= {3{8'((xpos - (H_OVERSCAN+H_BORDER)) >> 1)}};
end
end

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@ -3326,7 +3326,7 @@ SetAVIInfoFrame(AVI_InfoFrame *pAVIInfoFrame)
Switch_HDMITX_Bank(1) ;
for(i = 0,ucData = 0; i < AVI_INFOFRAME_LEN ; i++)
{
HDMITX_WriteI2C_Byte(REG_TX_AVIINFO_DB1+i,pAVIInfoFrame->pktbyte.AVI_DB[i]);
HDMITX_WriteI2C_Byte(REG_TX_AVIINFO_DB1+i+(i>=5),pAVIInfoFrame->pktbyte.AVI_DB[i]);
ucData -= pAVIInfoFrame->pktbyte.AVI_DB[i] ;
}
ErrorF("SetAVIInfo(): ") ;

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@ -326,8 +326,8 @@ typedef union _HDR_InfoFrame {
BYTE Ver ;
BYTE Len ;
BYTE TF ; // vendor name character in 7bit ascii characters
BYTE DESC_ID ; // product description character in 7bit ascii characters
BYTE TF ;
BYTE DESC_ID ;
BYTE DESC[24] ;
} info ;
struct {

File diff suppressed because it is too large Load Diff

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@ -184,7 +184,9 @@ inline void TX_enable(tx_mode_t mode)
if (mode != TX_DVI) {
HDMITX_SetAVIInfoFrame(vmode_out.vic, (mode == TX_HDMI_RGB) ? F_MODE_RGB444 : F_MODE_YUV444, 0, 0, tc.hdmi_itc, vm_conf.hdmitx_pixr_ifr);
HDMITX_SetHDRInfoFrame(tc.hdmi_hdr ? 3 : 0);
cm.cc.hdmi_itc = tc.hdmi_itc;
cm.cc.hdmi_hdr = tc.hdmi_hdr;
}
#ifdef ENABLE_AUDIO
@ -287,27 +289,6 @@ inline int check_linecnt(alt_u8 progressive, alt_u32 totlines) {
return (totlines >= MIN_LINES_INTERLACED);
}
void set_sampler_phase(uint8_t sampler_phase) {
uint32_t sample_rng_x1000;
uint8_t tvp_phase;
vmode_in.sampler_phase = sampler_phase;
if (vm_conf.h_skip == 0) {
vm_conf.h_sample_sel = 0;
tvp_phase = sampler_phase;
} else {
sample_rng_x1000 = 360000 / (vm_conf.h_skip+1);
vm_conf.h_sample_sel = (sampler_phase*11250)/sample_rng_x1000;
tvp_phase = ((((sampler_phase*11250) % sample_rng_x1000)*32)/sample_rng_x1000);
}
if (vm_conf.h_skip > 0)
printf("Sample sel: %u/%u\n", (vm_conf.h_sample_sel+1), (vm_conf.h_skip+1));
tvp_set_hpll_phase(tvp_phase);
}
// Check if input video status / target configuration has changed
status_t get_status(tvp_sync_input_t syncinput)
{
@ -357,7 +338,7 @@ status_t get_status(tvp_sync_input_t syncinput)
if (memcmp(&tc, &cm.cc, offsetof(avconfig_t, sl_mode)) || (update_cur_vm == 1))
status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
if ((vm_conf.si_pclk_mult > 1) && (pll_reconfig->pll_config_status.c_config_id != 5) && (vm_conf.si_pclk_mult-1 != pll_reconfig->pll_config_status.c_config_id))
if ((vm_conf.si_pclk_mult > 1) && (pll_reconfig->pll_config_status.c_config_id != 6) && (vm_conf.si_pclk_mult-1 != pll_reconfig->pll_config_status.c_config_id))
status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
cm.totlines = totlines;
@ -589,12 +570,14 @@ void program_mode()
cm.id = retval;
vm_sel = cm.id;
pll_h_total = (vm_conf.h_skip+1) * vmode_in.timings.h_total + (((vm_conf.h_skip+1) * vmode_in.timings.h_total_adj * 5 + 50) / 100);
// Double TVP7002 PLL sampling rate when possible to minimize jitter
while (1) {
pll_h_total = (vm_conf.h_skip+1) * vmode_in.timings.h_total + (((vm_conf.h_skip+1) * vmode_in.timings.h_total_adj * 5 + 50) / 100);
pclk_i_hz = h_hz * pll_h_total;
if ((pclk_i_hz < 25000000UL) && ((vm_conf.si_pclk_mult % 2) == 0)) {
pll_h_total *= 2;
vm_conf.h_skip = 2*(vm_conf.h_skip+1)-1;
vm_conf.si_pclk_mult /= 2;
} else {
@ -636,7 +619,7 @@ void program_mode()
set_lpf(cm.cc.video_lpf);
set_csc(cm.cc.ypbpr_cs);
set_sampler_phase(video_modes_plm[cm.id].sampler_phase);
set_sampler_phase(video_modes_plm[cm.id].sampler_phase, 0);
pll_reconfig->pll_config_status.reset = (vm_conf.si_pclk_mult <= 1);
@ -651,7 +634,7 @@ void program_mode()
}
IOWR_ALTERA_AVALON_PIO_DATA(PIO_0_BASE, sys_ctrl);
update_osd_size(&vmode_out, &vm_conf);
update_osd_size(&vmode_out);
update_sc_config(&vmode_in, &vmode_out, &vm_conf, &cm.cc);
@ -680,6 +663,30 @@ void program_mode()
}
}
void set_sampler_phase(uint8_t sampler_phase, uint8_t update_sc) {
uint32_t sample_rng_x1000;
uint8_t tvp_phase;
vmode_in.sampler_phase = sampler_phase;
if (vm_conf.h_skip == 0) {
vm_conf.h_sample_sel = 0;
tvp_phase = sampler_phase;
} else {
sample_rng_x1000 = 360000 / (vm_conf.h_skip+1);
vm_conf.h_sample_sel = (sampler_phase*11250)/sample_rng_x1000;
tvp_phase = ((((sampler_phase*11250) % sample_rng_x1000)*32)/sample_rng_x1000);
}
if (vm_conf.h_skip > 0)
printf("Sample sel: %u/%u\n", (vm_conf.h_sample_sel+1), (vm_conf.h_skip+1));
tvp_set_hpll_phase(tvp_phase);
if (update_sc)
update_sc_config(&vmode_in, &vmode_out, &vm_conf, &cm.cc);
}
int load_profile() {
int retval;

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@ -92,7 +92,7 @@ typedef struct {
void ui_disp_menu(alt_u8 osd_mode);
void ui_disp_status(alt_u8 refresh_osd_timer);
void set_sampler_phase(uint8_t sampler_phase);
void set_sampler_phase(uint8_t sampler_phase, uint8_t update_sc);
int load_profile();
int save_profile();

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@ -123,7 +123,7 @@ int parse_control()
// one for each video_group
alt_u8* pmcfg_ptr[] = { &pt_only, &tc.pm_240p, &tc.pm_240p, &tc.pm_384p, &tc.pm_480i, &tc.pm_480i, &tc.pm_480p, &tc.pm_480p, &pt_only, &tc.pm_1080i, &pt_only };
alt_u8 valid_pm[] = { 0x1, 0x1f, 0x1f, 0x7, 0xf, 0xf, 0x3, 0x3, 0x1, 0x3, 0x1 };
alt_u8 valid_pm[] = { 0x1, 0x3f, 0x3f, 0x7, 0xf, 0xf, 0x3, 0x3, 0x1, 0x3, 0x1 };
avinput_t next_input = (cm.avinput == AV3_YPBPR) ? AV1_RGBs : (cm.avinput+1);
@ -216,7 +216,7 @@ int parse_control()
break;
case RC_LM_MODE:
strncpy(menu_row1, "Linemult mode:", LCD_ROW_LEN+1);
strncpy(menu_row2, "press 1-5", LCD_ROW_LEN+1);
strncpy(menu_row2, "press 1-6", LCD_ROW_LEN+1);
osd->osd_config.menu_active = 1;
ui_disp_menu(1);
@ -232,7 +232,7 @@ int parse_control()
break;
}
if (i <= RC_BTN5) {
if (i <= RC_BTN6) {
if ((1<<i) & valid_pm[video_modes_plm[cm.id].group]) {
*pmcfg_ptr[video_modes_plm[cm.id].group] = i;
} else {
@ -262,7 +262,7 @@ int parse_control()
if (cm.id == vm_edit)
tc_sampler_phase = video_modes_plm[cm.id].sampler_phase;
set_sampler_phase(video_modes_plm[cm.id].sampler_phase);
set_sampler_phase(video_modes_plm[cm.id].sampler_phase, 1);
if (!menu_active) {
strncpy((char*)osd->osd_array.data[0][0], menu_advtiming.items[8].name, OSD_CHAR_COLS);

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@ -24,13 +24,13 @@
#include "sysconfig.h"
#define FW_VER_MAJOR 1
#define FW_VER_MINOR 06
#define FW_VER_MINOR 8
#define PROFILE_VER_MAJOR 1
#define PROFILE_VER_MINOR 06
#define PROFILE_VER_MINOR 6
#define INITCFG_VER_MAJOR 1
#define INITCFG_VER_MINOR 00
#define INITCFG_VER_MINOR 0
#ifdef ENABLE_AUDIO
#define FW_SUFFIX1 "a"

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@ -475,23 +475,18 @@ void display_menu(alt_u8 forcedisp)
ui_disp_menu(0);
}
void update_osd_size(mode_data_t *vm_out, vm_proc_config_t *vm_conf) {
void update_osd_size(mode_data_t *vm_out) {
uint8_t osd_size = vm_out->timings.v_active / 700;
uint8_t par = (((100*vm_out->timings.h_active*vm_out->ar.v)/((vm_out->timings.v_active<<vm_out->timings.interlaced)*vm_out->ar.h))+50)/100;
uint8_t par_log2 = 0;
uint8_t par_x4 = (((400*vm_out->timings.h_active*vm_out->ar.v)/((vm_out->timings.v_active<<vm_out->timings.interlaced)*vm_out->ar.h))+50)/100;
int8_t xadj_log2 = -2;
while (par > 1) {
par >>= 1;
par_log2++;
while (par_x4 > 1) {
par_x4 >>= 1;
xadj_log2++;
}
osd->osd_config.x_size = osd_size + vm_out->timings.interlaced + par_log2;
osd->osd_config.x_size = ((osd_size + vm_out->timings.interlaced + xadj_log2) >= 0) ? (osd_size + vm_out->timings.interlaced + xadj_log2) : 0;
osd->osd_config.y_size = osd_size;
if (vm_conf->hdmitx_pixr_ifr)
osd->osd_config.x_size += (vm_conf->hdmitx_pixr_ifr+1)/2;
if (vm_conf->tx_pixelrep)
osd->osd_config.x_size -= (vm_conf->tx_pixelrep+1)/2;
}
static void vm_select() {
@ -525,7 +520,7 @@ static void vm_tweak(uint16_t *v) {
(video_modes_plm[cm.id].mask.v != tc_v_mask))
update_cur_vm = 1;
if (video_modes_plm[cm.id].sampler_phase != tc_sampler_phase)
set_sampler_phase(tc_sampler_phase);
set_sampler_phase(tc_sampler_phase, 1);
}
video_modes_plm[vm_edit].timings.h_total = tc_h_samplerate;
video_modes_plm[vm_edit].timings.h_total_adj = (uint8_t)tc_h_samplerate_adj;

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@ -127,7 +127,7 @@ void init_menu();
void render_osd_page();
void display_menu(alt_u8 forcedisp);
void sampler_phase_disp(alt_u8 v);
void update_osd_size(mode_data_t *vm_out, vm_proc_config_t *vm_conf);
void update_osd_size(mode_data_t *vm_out);
static void vm_select();
static void vm_tweak(alt_u16 *v);

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@ -384,7 +384,7 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
if (((mindiff_lm == MODE_L5_GEN_4_3) && (mode_preset->group == GROUP_288P)) || (mindiff_lm >= MODE_L6_GEN_4_3))
vm_conf->tx_pixelrep = 1;
sniprintf(vm_out->name, 10, "%s x%u", vm_in->name, vm_conf->y_rpt+1);
sniprintf(vm_out->name, 11, "%s x%u", vm_in->name, vm_conf->y_rpt+1);
if (vm_conf->x_size == 0)
vm_conf->x_size = (vm_in->timings.h_active-2*vm_in->mask.h)*(vm_conf->x_rpt+1);

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@ -142,7 +142,7 @@ typedef enum {
} HDMI_pixelrep_t;
typedef struct {
char name[10];
char name[11];
HDMI_Video_Type vic;
sync_timings_t timings;
uint8_t sampler_phase;