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83c33c41b9 | ||
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8b35ba3339 | ||
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edb300e03a |
2
ossc.qsf
2
ossc.qsf
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@ -219,7 +219,7 @@ set_global_assignment -name ENABLE_SIGNALTAP OFF
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||||||
set_global_assignment -name USE_SIGNALTAP_FILE output_files/ossc_new.stp
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/ossc_new.stp
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||||||
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set_global_assignment -name FITTER_EFFORT "AUTO FIT"
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set_global_assignment -name FITTER_EFFORT "AUTO FIT"
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set_global_assignment -name SEED 3
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set_global_assignment -name SEED 1
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17
rtl/ossc.v
17
rtl/ossc.v
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@ -476,7 +476,7 @@ ir_rcv ir0 (
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.ir_code_cnt (ir_code_cnt)
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.ir_code_cnt (ir_code_cnt)
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);
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);
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lat_tester lt0 (
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/*lat_tester lt0 (
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.clk27 (clk27),
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.clk27 (clk27),
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.pclk (PCLK_sc),
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.pclk (PCLK_sc),
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.active (lt_active),
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.active (lt_active),
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@ -490,21 +490,6 @@ lat_tester lt0 (
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.stb_result (lt_stb_result),
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.stb_result (lt_stb_result),
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.trig_waiting (lt_trig_waiting),
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.trig_waiting (lt_trig_waiting),
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.finished (lt_finished)
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.finished (lt_finished)
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);
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/*Ävideogen vg0 (
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.clk27 (PCLK_sc),
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.reset_n (po_reset_n & ~enable_sc),
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.lt_active (lt_active),
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.lt_mode (lt_mode_synced),
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.R_out (R_out_vg),
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.G_out (G_out_vg),
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.B_out (B_out_vg),
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.HSYNC_out (HSYNC_out_vg),
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.VSYNC_out (VSYNC_out_vg),
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.DE_out (DE_out_vg),
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.xpos (xpos_vg),
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.ypos (ypos_vg)
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);*/
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);*/
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endmodule
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endmodule
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@ -196,6 +196,7 @@ wire [8:0] Y_sl_hybr_ref, R_sl_hybr_ref, G_sl_hybr_ref, B_sl_hybr_ref;
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reg [4:0] R_shmask_str, G_shmask_str, B_shmask_str;
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reg [4:0] R_shmask_str, G_shmask_str, B_shmask_str;
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wire [8:0] R_shmask_mult, G_shmask_mult, B_shmask_mult;
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wire [8:0] R_shmask_mult, G_shmask_mult, B_shmask_mult;
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wire [7:0] R_vg, G_vg, B_vg;
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wire [7:0] R_linebuf, G_linebuf, B_linebuf;
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wire [7:0] R_linebuf, G_linebuf, B_linebuf;
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// Pipeline registers
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// Pipeline registers
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@ -358,6 +359,18 @@ linebuf_top #(
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);
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);
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videogen vg0 (
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.pclk (PCLK_OUT_i),
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.lt_active (1'b0),
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.lt_mode (2'h0),
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.xpos (xpos_pp[PP_TP_START]),
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.ypos (ypos_pp[PP_TP_START]),
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.R_out (R_vg),
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.G_out (G_vg),
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.B_out (B_vg)
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);
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// Frame change strobe synchronization
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// Frame change strobe synchronization
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always @(posedge PCLK_OUT_i) begin
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always @(posedge PCLK_OUT_i) begin
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frame_change_sync1_reg <= frame_change_i;
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frame_change_sync1_reg <= frame_change_i;
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@ -605,9 +618,9 @@ always @(posedge PCLK_OUT_i) begin
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B_pp[PP_SLGEN_END] <= (draw_sl_pp[PP_SLGEN_START+4] & sl_method) ? B_sl_mult : B_pp[PP_SLGEN_START+4];
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B_pp[PP_SLGEN_END] <= (draw_sl_pp[PP_SLGEN_START+4] & sl_method) ? B_sl_mult : B_pp[PP_SLGEN_START+4];
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/* ---------- Testpattern / mask generation ---------- */
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/* ---------- Testpattern / mask generation ---------- */
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R_pp[PP_TP_END] <= testpattern_enable ? (xpos_pp[PP_TP_START] ^ ypos_pp[PP_TP_START]) : (mask_enable_pp[PP_TP_START] ? MASK_R : R_pp[PP_TP_START]);
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R_pp[PP_TP_END] <= testpattern_enable ? R_vg : (mask_enable_pp[PP_TP_START] ? MASK_R : R_pp[PP_TP_START]);
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G_pp[PP_TP_END] <= testpattern_enable ? (xpos_pp[PP_TP_START] ^ ypos_pp[PP_TP_START]) : (mask_enable_pp[PP_TP_START] ? MASK_G : G_pp[PP_TP_START]);
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G_pp[PP_TP_END] <= testpattern_enable ? G_vg : (mask_enable_pp[PP_TP_START] ? MASK_G : G_pp[PP_TP_START]);
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B_pp[PP_TP_END] <= testpattern_enable ? (xpos_pp[PP_TP_START] ^ ypos_pp[PP_TP_START]) : (mask_enable_pp[PP_TP_START] ? MASK_B : B_pp[PP_TP_START]);
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B_pp[PP_TP_END] <= testpattern_enable ? B_vg : (mask_enable_pp[PP_TP_START] ? MASK_B : B_pp[PP_TP_START]);
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end
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end
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// Output
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// Output
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|
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@ -1,5 +1,5 @@
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//
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//
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// Copyright (C) 2015-2017 Markus Hiienkari <mhiienka@niksula.hut.fi>
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// Copyright (C) 2015-2023 Markus Hiienkari <mhiienka@niksula.hut.fi>
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//
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//
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// This file is part of Open Source Scan Converter project.
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// This file is part of Open Source Scan Converter project.
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//
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//
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@ -20,18 +20,14 @@
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`include "lat_tester_includes.v"
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`include "lat_tester_includes.v"
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module videogen (
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module videogen (
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input clk27,
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input pclk,
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input reset_n,
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input lt_active,
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input lt_active,
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input [1:0] lt_mode,
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input [1:0] lt_mode,
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input [11:0] xpos,
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input [10:0] ypos,
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output reg [7:0] R_out,
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output reg [7:0] R_out,
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output reg [7:0] G_out,
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output reg [7:0] G_out,
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output reg [7:0] B_out,
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output reg [7:0] B_out
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output reg HSYNC_out,
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output reg VSYNC_out,
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output reg DE_out,
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output reg [9:0] xpos,
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output reg [9:0] ypos
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);
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);
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//Parameters for 720x480@59.94Hz (858px x 525lines, pclk 27MHz -> 59.94Hz)
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//Parameters for 720x480@59.94Hz (858px x 525lines, pclk 27MHz -> 59.94Hz)
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@ -57,70 +53,9 @@ parameter V_GRAYRAMP = 10'd84;
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parameter H_BORDER = ((H_AREA-H_GRADIENT)>>1);
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parameter H_BORDER = ((H_AREA-H_GRADIENT)>>1);
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parameter V_BORDER = ((V_AREA-V_GRADIENT)>>1);
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parameter V_BORDER = ((V_AREA-V_GRADIENT)>>1);
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parameter X_START = H_SYNCLEN + H_BACKPORCH;
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// Pattern gen
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parameter Y_START = V_SYNCLEN + V_BACKPORCH;
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always @(posedge pclk)
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//Counters
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reg [9:0] h_cnt; //max. 1024
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reg [9:0] v_cnt; //max. 1024
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//HSYNC gen (negative polarity)
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always @(posedge clk27 or negedge reset_n)
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begin
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begin
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if (!reset_n) begin
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h_cnt <= 0;
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xpos <= 0;
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HSYNC_out <= 0;
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end else begin
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//Hsync counter
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if (h_cnt < H_TOTAL-1) begin
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h_cnt <= h_cnt + 1'b1;
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if (h_cnt >= X_START)
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xpos <= xpos + 1'b1;
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end else begin
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h_cnt <= 0;
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xpos <= 0;
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end
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//Hsync signal
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HSYNC_out <= (h_cnt < H_SYNCLEN) ? 1'b0 : 1'b1;
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end
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end
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//VSYNC gen (negative polarity)
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always @(posedge clk27 or negedge reset_n)
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begin
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if (!reset_n) begin
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v_cnt <= 0;
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ypos <= 0;
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VSYNC_out <= 0;
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end else begin
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//Vsync counter
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if (h_cnt == H_TOTAL-1) begin
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if (v_cnt < V_TOTAL-1) begin
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v_cnt <= v_cnt + 1'b1;
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if (v_cnt >= Y_START)
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ypos <= ypos + 1'b1;
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end else begin
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v_cnt <= 0;
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ypos <= 0;
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end
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end
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//Vsync signal
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VSYNC_out <= (v_cnt < V_SYNCLEN) ? 1'b0 : 1'b1;
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end
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end
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//Data and ENABLE gen
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always @(posedge clk27 or negedge reset_n)
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begin
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if (!reset_n) begin
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R_out <= 8'h00;
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G_out <= 8'h00;
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B_out <= 8'h00;
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DE_out <= 1'b0;
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end else begin
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if (lt_active) begin
|
if (lt_active) begin
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case (lt_mode)
|
case (lt_mode)
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default: begin
|
default: begin
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@ -146,9 +81,6 @@ begin
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else
|
else
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{R_out, G_out, B_out} <= {3{8'((xpos - (H_OVERSCAN+H_BORDER)) >> 1)}};
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{R_out, G_out, B_out} <= {3{8'((xpos - (H_OVERSCAN+H_BORDER)) >> 1)}};
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end
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end
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DE_out <= (h_cnt >= X_START && h_cnt < X_START + H_ACTIVE && v_cnt >= Y_START && v_cnt < Y_START + V_ACTIVE);
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end
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end
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end
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endmodule
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endmodule
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@ -3326,7 +3326,7 @@ SetAVIInfoFrame(AVI_InfoFrame *pAVIInfoFrame)
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Switch_HDMITX_Bank(1) ;
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Switch_HDMITX_Bank(1) ;
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for(i = 0,ucData = 0; i < AVI_INFOFRAME_LEN ; i++)
|
for(i = 0,ucData = 0; i < AVI_INFOFRAME_LEN ; i++)
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{
|
{
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HDMITX_WriteI2C_Byte(REG_TX_AVIINFO_DB1+i,pAVIInfoFrame->pktbyte.AVI_DB[i]);
|
HDMITX_WriteI2C_Byte(REG_TX_AVIINFO_DB1+i+(i>=5),pAVIInfoFrame->pktbyte.AVI_DB[i]);
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ucData -= pAVIInfoFrame->pktbyte.AVI_DB[i] ;
|
ucData -= pAVIInfoFrame->pktbyte.AVI_DB[i] ;
|
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}
|
}
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ErrorF("SetAVIInfo(): ") ;
|
ErrorF("SetAVIInfo(): ") ;
|
||||||
|
|
|
@ -326,8 +326,8 @@ typedef union _HDR_InfoFrame {
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BYTE Ver ;
|
BYTE Ver ;
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BYTE Len ;
|
BYTE Len ;
|
||||||
|
|
||||||
BYTE TF ; // vendor name character in 7bit ascii characters
|
BYTE TF ;
|
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BYTE DESC_ID ; // product description character in 7bit ascii characters
|
BYTE DESC_ID ;
|
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BYTE DESC[24] ;
|
BYTE DESC[24] ;
|
||||||
} info ;
|
} info ;
|
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struct {
|
struct {
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -184,7 +184,9 @@ inline void TX_enable(tx_mode_t mode)
|
||||||
|
|
||||||
if (mode != TX_DVI) {
|
if (mode != TX_DVI) {
|
||||||
HDMITX_SetAVIInfoFrame(vmode_out.vic, (mode == TX_HDMI_RGB) ? F_MODE_RGB444 : F_MODE_YUV444, 0, 0, tc.hdmi_itc, vm_conf.hdmitx_pixr_ifr);
|
HDMITX_SetAVIInfoFrame(vmode_out.vic, (mode == TX_HDMI_RGB) ? F_MODE_RGB444 : F_MODE_YUV444, 0, 0, tc.hdmi_itc, vm_conf.hdmitx_pixr_ifr);
|
||||||
|
HDMITX_SetHDRInfoFrame(tc.hdmi_hdr ? 3 : 0);
|
||||||
cm.cc.hdmi_itc = tc.hdmi_itc;
|
cm.cc.hdmi_itc = tc.hdmi_itc;
|
||||||
|
cm.cc.hdmi_hdr = tc.hdmi_hdr;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef ENABLE_AUDIO
|
#ifdef ENABLE_AUDIO
|
||||||
|
@ -287,27 +289,6 @@ inline int check_linecnt(alt_u8 progressive, alt_u32 totlines) {
|
||||||
return (totlines >= MIN_LINES_INTERLACED);
|
return (totlines >= MIN_LINES_INTERLACED);
|
||||||
}
|
}
|
||||||
|
|
||||||
void set_sampler_phase(uint8_t sampler_phase) {
|
|
||||||
uint32_t sample_rng_x1000;
|
|
||||||
uint8_t tvp_phase;
|
|
||||||
|
|
||||||
vmode_in.sampler_phase = sampler_phase;
|
|
||||||
|
|
||||||
if (vm_conf.h_skip == 0) {
|
|
||||||
vm_conf.h_sample_sel = 0;
|
|
||||||
tvp_phase = sampler_phase;
|
|
||||||
} else {
|
|
||||||
sample_rng_x1000 = 360000 / (vm_conf.h_skip+1);
|
|
||||||
vm_conf.h_sample_sel = (sampler_phase*11250)/sample_rng_x1000;
|
|
||||||
tvp_phase = ((((sampler_phase*11250) % sample_rng_x1000)*32)/sample_rng_x1000);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (vm_conf.h_skip > 0)
|
|
||||||
printf("Sample sel: %u/%u\n", (vm_conf.h_sample_sel+1), (vm_conf.h_skip+1));
|
|
||||||
|
|
||||||
tvp_set_hpll_phase(tvp_phase);
|
|
||||||
}
|
|
||||||
|
|
||||||
// Check if input video status / target configuration has changed
|
// Check if input video status / target configuration has changed
|
||||||
status_t get_status(tvp_sync_input_t syncinput)
|
status_t get_status(tvp_sync_input_t syncinput)
|
||||||
{
|
{
|
||||||
|
@ -357,7 +338,7 @@ status_t get_status(tvp_sync_input_t syncinput)
|
||||||
if (memcmp(&tc, &cm.cc, offsetof(avconfig_t, sl_mode)) || (update_cur_vm == 1))
|
if (memcmp(&tc, &cm.cc, offsetof(avconfig_t, sl_mode)) || (update_cur_vm == 1))
|
||||||
status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
|
status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
|
||||||
|
|
||||||
if ((vm_conf.si_pclk_mult > 1) && (pll_reconfig->pll_config_status.c_config_id != 5) && (vm_conf.si_pclk_mult-1 != pll_reconfig->pll_config_status.c_config_id))
|
if ((vm_conf.si_pclk_mult > 1) && (pll_reconfig->pll_config_status.c_config_id != 6) && (vm_conf.si_pclk_mult-1 != pll_reconfig->pll_config_status.c_config_id))
|
||||||
status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
|
status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
|
||||||
|
|
||||||
cm.totlines = totlines;
|
cm.totlines = totlines;
|
||||||
|
@ -589,12 +570,14 @@ void program_mode()
|
||||||
cm.id = retval;
|
cm.id = retval;
|
||||||
vm_sel = cm.id;
|
vm_sel = cm.id;
|
||||||
|
|
||||||
|
pll_h_total = (vm_conf.h_skip+1) * vmode_in.timings.h_total + (((vm_conf.h_skip+1) * vmode_in.timings.h_total_adj * 5 + 50) / 100);
|
||||||
|
|
||||||
// Double TVP7002 PLL sampling rate when possible to minimize jitter
|
// Double TVP7002 PLL sampling rate when possible to minimize jitter
|
||||||
while (1) {
|
while (1) {
|
||||||
pll_h_total = (vm_conf.h_skip+1) * vmode_in.timings.h_total + (((vm_conf.h_skip+1) * vmode_in.timings.h_total_adj * 5 + 50) / 100);
|
|
||||||
pclk_i_hz = h_hz * pll_h_total;
|
pclk_i_hz = h_hz * pll_h_total;
|
||||||
|
|
||||||
if ((pclk_i_hz < 25000000UL) && ((vm_conf.si_pclk_mult % 2) == 0)) {
|
if ((pclk_i_hz < 25000000UL) && ((vm_conf.si_pclk_mult % 2) == 0)) {
|
||||||
|
pll_h_total *= 2;
|
||||||
vm_conf.h_skip = 2*(vm_conf.h_skip+1)-1;
|
vm_conf.h_skip = 2*(vm_conf.h_skip+1)-1;
|
||||||
vm_conf.si_pclk_mult /= 2;
|
vm_conf.si_pclk_mult /= 2;
|
||||||
} else {
|
} else {
|
||||||
|
@ -636,7 +619,7 @@ void program_mode()
|
||||||
set_lpf(cm.cc.video_lpf);
|
set_lpf(cm.cc.video_lpf);
|
||||||
set_csc(cm.cc.ypbpr_cs);
|
set_csc(cm.cc.ypbpr_cs);
|
||||||
|
|
||||||
set_sampler_phase(video_modes_plm[cm.id].sampler_phase);
|
set_sampler_phase(video_modes_plm[cm.id].sampler_phase, 0);
|
||||||
|
|
||||||
pll_reconfig->pll_config_status.reset = (vm_conf.si_pclk_mult <= 1);
|
pll_reconfig->pll_config_status.reset = (vm_conf.si_pclk_mult <= 1);
|
||||||
|
|
||||||
|
@ -651,7 +634,7 @@ void program_mode()
|
||||||
}
|
}
|
||||||
IOWR_ALTERA_AVALON_PIO_DATA(PIO_0_BASE, sys_ctrl);
|
IOWR_ALTERA_AVALON_PIO_DATA(PIO_0_BASE, sys_ctrl);
|
||||||
|
|
||||||
update_osd_size(&vmode_out, &vm_conf);
|
update_osd_size(&vmode_out);
|
||||||
|
|
||||||
update_sc_config(&vmode_in, &vmode_out, &vm_conf, &cm.cc);
|
update_sc_config(&vmode_in, &vmode_out, &vm_conf, &cm.cc);
|
||||||
|
|
||||||
|
@ -680,6 +663,30 @@ void program_mode()
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void set_sampler_phase(uint8_t sampler_phase, uint8_t update_sc) {
|
||||||
|
uint32_t sample_rng_x1000;
|
||||||
|
uint8_t tvp_phase;
|
||||||
|
|
||||||
|
vmode_in.sampler_phase = sampler_phase;
|
||||||
|
|
||||||
|
if (vm_conf.h_skip == 0) {
|
||||||
|
vm_conf.h_sample_sel = 0;
|
||||||
|
tvp_phase = sampler_phase;
|
||||||
|
} else {
|
||||||
|
sample_rng_x1000 = 360000 / (vm_conf.h_skip+1);
|
||||||
|
vm_conf.h_sample_sel = (sampler_phase*11250)/sample_rng_x1000;
|
||||||
|
tvp_phase = ((((sampler_phase*11250) % sample_rng_x1000)*32)/sample_rng_x1000);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (vm_conf.h_skip > 0)
|
||||||
|
printf("Sample sel: %u/%u\n", (vm_conf.h_sample_sel+1), (vm_conf.h_skip+1));
|
||||||
|
|
||||||
|
tvp_set_hpll_phase(tvp_phase);
|
||||||
|
|
||||||
|
if (update_sc)
|
||||||
|
update_sc_config(&vmode_in, &vmode_out, &vm_conf, &cm.cc);
|
||||||
|
}
|
||||||
|
|
||||||
int load_profile() {
|
int load_profile() {
|
||||||
int retval;
|
int retval;
|
||||||
|
|
||||||
|
|
|
@ -92,7 +92,7 @@ typedef struct {
|
||||||
void ui_disp_menu(alt_u8 osd_mode);
|
void ui_disp_menu(alt_u8 osd_mode);
|
||||||
void ui_disp_status(alt_u8 refresh_osd_timer);
|
void ui_disp_status(alt_u8 refresh_osd_timer);
|
||||||
|
|
||||||
void set_sampler_phase(uint8_t sampler_phase);
|
void set_sampler_phase(uint8_t sampler_phase, uint8_t update_sc);
|
||||||
|
|
||||||
int load_profile();
|
int load_profile();
|
||||||
int save_profile();
|
int save_profile();
|
||||||
|
|
|
@ -123,7 +123,7 @@ int parse_control()
|
||||||
|
|
||||||
// one for each video_group
|
// one for each video_group
|
||||||
alt_u8* pmcfg_ptr[] = { &pt_only, &tc.pm_240p, &tc.pm_240p, &tc.pm_384p, &tc.pm_480i, &tc.pm_480i, &tc.pm_480p, &tc.pm_480p, &pt_only, &tc.pm_1080i, &pt_only };
|
alt_u8* pmcfg_ptr[] = { &pt_only, &tc.pm_240p, &tc.pm_240p, &tc.pm_384p, &tc.pm_480i, &tc.pm_480i, &tc.pm_480p, &tc.pm_480p, &pt_only, &tc.pm_1080i, &pt_only };
|
||||||
alt_u8 valid_pm[] = { 0x1, 0x1f, 0x1f, 0x7, 0xf, 0xf, 0x3, 0x3, 0x1, 0x3, 0x1 };
|
alt_u8 valid_pm[] = { 0x1, 0x3f, 0x3f, 0x7, 0xf, 0xf, 0x3, 0x3, 0x1, 0x3, 0x1 };
|
||||||
|
|
||||||
avinput_t next_input = (cm.avinput == AV3_YPBPR) ? AV1_RGBs : (cm.avinput+1);
|
avinput_t next_input = (cm.avinput == AV3_YPBPR) ? AV1_RGBs : (cm.avinput+1);
|
||||||
|
|
||||||
|
@ -216,7 +216,7 @@ int parse_control()
|
||||||
break;
|
break;
|
||||||
case RC_LM_MODE:
|
case RC_LM_MODE:
|
||||||
strncpy(menu_row1, "Linemult mode:", LCD_ROW_LEN+1);
|
strncpy(menu_row1, "Linemult mode:", LCD_ROW_LEN+1);
|
||||||
strncpy(menu_row2, "press 1-5", LCD_ROW_LEN+1);
|
strncpy(menu_row2, "press 1-6", LCD_ROW_LEN+1);
|
||||||
osd->osd_config.menu_active = 1;
|
osd->osd_config.menu_active = 1;
|
||||||
ui_disp_menu(1);
|
ui_disp_menu(1);
|
||||||
|
|
||||||
|
@ -232,7 +232,7 @@ int parse_control()
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (i <= RC_BTN5) {
|
if (i <= RC_BTN6) {
|
||||||
if ((1<<i) & valid_pm[video_modes_plm[cm.id].group]) {
|
if ((1<<i) & valid_pm[video_modes_plm[cm.id].group]) {
|
||||||
*pmcfg_ptr[video_modes_plm[cm.id].group] = i;
|
*pmcfg_ptr[video_modes_plm[cm.id].group] = i;
|
||||||
} else {
|
} else {
|
||||||
|
@ -262,7 +262,7 @@ int parse_control()
|
||||||
if (cm.id == vm_edit)
|
if (cm.id == vm_edit)
|
||||||
tc_sampler_phase = video_modes_plm[cm.id].sampler_phase;
|
tc_sampler_phase = video_modes_plm[cm.id].sampler_phase;
|
||||||
|
|
||||||
set_sampler_phase(video_modes_plm[cm.id].sampler_phase);
|
set_sampler_phase(video_modes_plm[cm.id].sampler_phase, 1);
|
||||||
|
|
||||||
if (!menu_active) {
|
if (!menu_active) {
|
||||||
strncpy((char*)osd->osd_array.data[0][0], menu_advtiming.items[8].name, OSD_CHAR_COLS);
|
strncpy((char*)osd->osd_array.data[0][0], menu_advtiming.items[8].name, OSD_CHAR_COLS);
|
||||||
|
|
|
@ -24,13 +24,13 @@
|
||||||
#include "sysconfig.h"
|
#include "sysconfig.h"
|
||||||
|
|
||||||
#define FW_VER_MAJOR 1
|
#define FW_VER_MAJOR 1
|
||||||
#define FW_VER_MINOR 06
|
#define FW_VER_MINOR 8
|
||||||
|
|
||||||
#define PROFILE_VER_MAJOR 1
|
#define PROFILE_VER_MAJOR 1
|
||||||
#define PROFILE_VER_MINOR 06
|
#define PROFILE_VER_MINOR 6
|
||||||
|
|
||||||
#define INITCFG_VER_MAJOR 1
|
#define INITCFG_VER_MAJOR 1
|
||||||
#define INITCFG_VER_MINOR 00
|
#define INITCFG_VER_MINOR 0
|
||||||
|
|
||||||
#ifdef ENABLE_AUDIO
|
#ifdef ENABLE_AUDIO
|
||||||
#define FW_SUFFIX1 "a"
|
#define FW_SUFFIX1 "a"
|
||||||
|
|
|
@ -475,23 +475,18 @@ void display_menu(alt_u8 forcedisp)
|
||||||
ui_disp_menu(0);
|
ui_disp_menu(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void update_osd_size(mode_data_t *vm_out, vm_proc_config_t *vm_conf) {
|
void update_osd_size(mode_data_t *vm_out) {
|
||||||
uint8_t osd_size = vm_out->timings.v_active / 700;
|
uint8_t osd_size = vm_out->timings.v_active / 700;
|
||||||
uint8_t par = (((100*vm_out->timings.h_active*vm_out->ar.v)/((vm_out->timings.v_active<<vm_out->timings.interlaced)*vm_out->ar.h))+50)/100;
|
uint8_t par_x4 = (((400*vm_out->timings.h_active*vm_out->ar.v)/((vm_out->timings.v_active<<vm_out->timings.interlaced)*vm_out->ar.h))+50)/100;
|
||||||
uint8_t par_log2 = 0;
|
int8_t xadj_log2 = -2;
|
||||||
|
|
||||||
while (par > 1) {
|
while (par_x4 > 1) {
|
||||||
par >>= 1;
|
par_x4 >>= 1;
|
||||||
par_log2++;
|
xadj_log2++;
|
||||||
}
|
}
|
||||||
|
|
||||||
osd->osd_config.x_size = osd_size + vm_out->timings.interlaced + par_log2;
|
osd->osd_config.x_size = ((osd_size + vm_out->timings.interlaced + xadj_log2) >= 0) ? (osd_size + vm_out->timings.interlaced + xadj_log2) : 0;
|
||||||
osd->osd_config.y_size = osd_size;
|
osd->osd_config.y_size = osd_size;
|
||||||
|
|
||||||
if (vm_conf->hdmitx_pixr_ifr)
|
|
||||||
osd->osd_config.x_size += (vm_conf->hdmitx_pixr_ifr+1)/2;
|
|
||||||
if (vm_conf->tx_pixelrep)
|
|
||||||
osd->osd_config.x_size -= (vm_conf->tx_pixelrep+1)/2;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void vm_select() {
|
static void vm_select() {
|
||||||
|
@ -525,7 +520,7 @@ static void vm_tweak(uint16_t *v) {
|
||||||
(video_modes_plm[cm.id].mask.v != tc_v_mask))
|
(video_modes_plm[cm.id].mask.v != tc_v_mask))
|
||||||
update_cur_vm = 1;
|
update_cur_vm = 1;
|
||||||
if (video_modes_plm[cm.id].sampler_phase != tc_sampler_phase)
|
if (video_modes_plm[cm.id].sampler_phase != tc_sampler_phase)
|
||||||
set_sampler_phase(tc_sampler_phase);
|
set_sampler_phase(tc_sampler_phase, 1);
|
||||||
}
|
}
|
||||||
video_modes_plm[vm_edit].timings.h_total = tc_h_samplerate;
|
video_modes_plm[vm_edit].timings.h_total = tc_h_samplerate;
|
||||||
video_modes_plm[vm_edit].timings.h_total_adj = (uint8_t)tc_h_samplerate_adj;
|
video_modes_plm[vm_edit].timings.h_total_adj = (uint8_t)tc_h_samplerate_adj;
|
||||||
|
|
|
@ -127,7 +127,7 @@ void init_menu();
|
||||||
void render_osd_page();
|
void render_osd_page();
|
||||||
void display_menu(alt_u8 forcedisp);
|
void display_menu(alt_u8 forcedisp);
|
||||||
void sampler_phase_disp(alt_u8 v);
|
void sampler_phase_disp(alt_u8 v);
|
||||||
void update_osd_size(mode_data_t *vm_out, vm_proc_config_t *vm_conf);
|
void update_osd_size(mode_data_t *vm_out);
|
||||||
static void vm_select();
|
static void vm_select();
|
||||||
static void vm_tweak(alt_u16 *v);
|
static void vm_tweak(alt_u16 *v);
|
||||||
|
|
||||||
|
|
|
@ -384,7 +384,7 @@ int get_pure_lm_mode(avconfig_t *cc, mode_data_t *vm_in, mode_data_t *vm_out, vm
|
||||||
if (((mindiff_lm == MODE_L5_GEN_4_3) && (mode_preset->group == GROUP_288P)) || (mindiff_lm >= MODE_L6_GEN_4_3))
|
if (((mindiff_lm == MODE_L5_GEN_4_3) && (mode_preset->group == GROUP_288P)) || (mindiff_lm >= MODE_L6_GEN_4_3))
|
||||||
vm_conf->tx_pixelrep = 1;
|
vm_conf->tx_pixelrep = 1;
|
||||||
|
|
||||||
sniprintf(vm_out->name, 10, "%s x%u", vm_in->name, vm_conf->y_rpt+1);
|
sniprintf(vm_out->name, 11, "%s x%u", vm_in->name, vm_conf->y_rpt+1);
|
||||||
|
|
||||||
if (vm_conf->x_size == 0)
|
if (vm_conf->x_size == 0)
|
||||||
vm_conf->x_size = (vm_in->timings.h_active-2*vm_in->mask.h)*(vm_conf->x_rpt+1);
|
vm_conf->x_size = (vm_in->timings.h_active-2*vm_in->mask.h)*(vm_conf->x_rpt+1);
|
||||||
|
|
|
@ -142,7 +142,7 @@ typedef enum {
|
||||||
} HDMI_pixelrep_t;
|
} HDMI_pixelrep_t;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
char name[10];
|
char name[11];
|
||||||
HDMI_Video_Type vic;
|
HDMI_Video_Type vic;
|
||||||
sync_timings_t timings;
|
sync_timings_t timings;
|
||||||
uint8_t sampler_phase;
|
uint8_t sampler_phase;
|
||||||
|
|
Loading…
Reference in New Issue
Block a user