Commit Graph

16 Commits

Author SHA1 Message Date
nino-porcino 587d2fd886 add global clock to make it Sidi-complaint 2022-05-21 15:08:36 +02:00
nino-porcino 0164f7da54 add PIA 6821 to project (not connected) 2022-05-07 11:41:22 +02:00
nino-porcino 18a124383f copy pin assigments from VIC20_MiST 2022-05-07 11:40:27 +02:00
nino-porcino e8b3a6fdc3 replace Arlet Ottens's 6502 with T65 2022-05-04 14:16:18 +02:00
nino-porcino cb7aeba5a9 add experimental SID 6581 2022-01-15 10:12:46 +01:00
nino-porcino c9b08a2b92 add missing signals 2022-01-08 00:15:58 +01:00
nino-porcino 41215bdd99 add tms9918, aci 2022-01-07 21:30:52 +01:00
nino-porcino d76ecb6a34 rename vram into display_ram 2022-01-07 21:29:49 +01:00
nino-porcino 2ed47e3d64 make ram module variable in size 2022-01-05 18:23:14 +01:00
nino-porcino 5d7bd5d14e remove old files from project 2022-01-03 19:10:31 +01:00
nino-porcino 8437979d3e remove pwr_reset 2022-01-02 15:14:53 +01:00
nino-porcino 04f501511f module downloader 2022-01-01 09:39:19 +01:00
nino-porcino 6edb71037a rename "vga" into "display" 2021-12-31 15:19:22 +01:00
nino-porcino 6c5be482f7 add sdram module 2021-12-30 20:26:12 +01:00
nino-porcino ed9403d04d remove UART and vga font/colors; rename chip selects 2021-12-30 18:55:14 +01:00
nino-porcino 03281591f6 fork Gehstock's project 2021-12-29 16:18:10 +01:00