Olof Kindgren
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2226afe669
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Expose ROM/RAM files as top-level parameters
This allows file names to be overridden at compile-time.
It also gets rid of the ifdef SIM in the verilog components
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2018-02-12 14:04:00 +01:00 |
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Alan Garfield
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a4f13a87fe
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updated ROM paths to handle new board/buildenv structure
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2018-02-12 08:26:57 +11:00 |
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Niels Moseley
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237d35491a
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Fixed Quartus VGA reversal bug/feature. Removed bit reversing logic and created bit-reversed font rom hex file
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2018-02-08 17:51:30 +01:00 |
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Niels Moseley
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f76134bcf1
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Added VGA font rom in hex to (hopefully) solve the endianess problems between Yosys/Quartus
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2018-02-07 19:22:00 +01:00 |
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Alan Garfield
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fdc93fb0d2
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Hardware scrolling seems to be working!
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2018-02-08 00:40:43 +11:00 |
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Alan Garfield
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6f7812f51d
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Added defines to choose display mode of fonts
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2018-02-06 00:35:30 +11:00 |
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Alan Garfield
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25aff9cdc3
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VGA module works. Still no hardware scrolling though
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2018-02-06 00:29:56 +11:00 |
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Alan Garfield
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20919fa726
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wip of the pipeline VGA module. stupid yosys bug, but testbench looks ok
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2018-02-05 00:12:06 +11:00 |
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