Apple-II-Gate-Level-Xilinx-.../AppleIIGateSch/JK_FlipFlop_JK_FlipFlop_sch...

mirror of https://github.com/fred6502/Apple-II-Gate-Level-Xilinx-ISE-14.7-Schematic-Entry.git
verilog work "JK_FlipFlop.vf"
verilog work "JK_FlipFlop_tb.v"
verilog work "C:/Xilinx/14.7/ISE_DS/ISE//verilog/src/glbl.v"
Add files via upload 2018-06-07 22:07:39 +00:00			`verilog work "JK_FlipFlop.vf"`
			`verilog work "JK_FlipFlop_tb.v"`
			`verilog work "C:/Xilinx/14.7/ISE_DS/ISE//verilog/src/glbl.v"`