2023-08-15 09:05:47 +00:00
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<HEAD><TITLE>Project Summary</TITLE>
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<PRE><A name="Mrp"></A>
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Lattice Mapping Report File for Design Module 'RAM2GS'
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<A name="mrp_di"></A><B><U><big>Design Information</big></U></B>
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2023-09-21 09:45:45 +00:00
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Command line: map -a MachXO2 -p LCMXO2-1200HC -t TQFP100 -s 4 -oc Commercial
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RAM2GS_LCMXO2_1200HC_impl1.ngd -o RAM2GS_LCMXO2_1200HC_impl1_map.ncd -pr
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RAM2GS_LCMXO2_1200HC_impl1.prf -mp RAM2GS_LCMXO2_1200HC_impl1.mrp -lpf //Ma
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c/iCloud/Repos/RAM2GS/CPLD/LCMXO2-1200HC/impl1/RAM2GS_LCMXO2_1200HC_impl1_s
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ynplify.lpf -lpf //Mac/iCloud/Repos/RAM2GS/CPLD/RAM2GS-LCMXO2.lpf -c 0 -gui
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-msgset //Mac/iCloud/Repos/RAM2GS/CPLD/LCMXO2-1200HC/promote.xml
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2023-08-15 09:05:47 +00:00
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Target Vendor: LATTICE
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2023-09-21 09:45:45 +00:00
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Target Device: LCMXO2-1200HCTQFP100
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2023-08-15 09:05:47 +00:00
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Target Performance: 4
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Mapper: xo2c00, version: Diamond (64-bit) 3.12.1.454
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2023-09-21 09:45:45 +00:00
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Mapped on: 09/21/23 05:39:45
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2023-08-15 09:05:47 +00:00
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<A name="mrp_ds"></A><B><U><big>Design Summary</big></U></B>
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2023-09-21 09:45:45 +00:00
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Number of registers: 109 out of 1520 (7%)
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PFU registers: 84 out of 1280 (7%)
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PIO registers: 25 out of 240 (10%)
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Number of SLICEs: 120 out of 640 (19%)
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SLICEs as Logic/ROM: 120 out of 640 (19%)
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SLICEs as RAM: 0 out of 480 (0%)
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SLICEs as Carry: 10 out of 640 (2%)
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Number of LUT4s: 237 out of 1280 (19%)
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Number used as logic LUTs: 217
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2023-08-15 09:05:47 +00:00
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Number used as distributed RAM: 0
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Number used as ripple logic: 20
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Number used as shift registers: 0
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2023-09-21 09:45:45 +00:00
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Number of PIO sites used: 63 + 4(JTAG) out of 80 (84%)
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Number of block RAMs: 0 out of 7 (0%)
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Number of GSRs: 0 out of 1 (0%)
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2023-08-17 01:04:05 +00:00
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EFB used : Yes
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2023-08-15 09:05:47 +00:00
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JTAG used : No
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Readback used : No
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Oscillator used : No
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Startup used : No
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POR : On
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Bandgap : On
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Number of Power Controller: 0 out of 1 (0%)
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Number of Dynamic Bank Controller (BCINRD): 0 out of 4 (0%)
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Number of Dynamic Bank Controller (BCLVDSO): 0 out of 1 (0%)
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Number of DCCA: 0 out of 8 (0%)
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Number of DCMA: 0 out of 2 (0%)
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2023-09-21 09:45:45 +00:00
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Number of PLLs: 0 out of 1 (0%)
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Number of DQSDLLs: 0 out of 2 (0%)
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Number of CLKDIVC: 0 out of 4 (0%)
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Number of ECLKSYNCA: 0 out of 4 (0%)
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Number of ECLKBRIDGECS: 0 out of 2 (0%)
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2023-08-15 09:05:47 +00:00
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Notes:-
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1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
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distributed RAMs) + 2*(Number of ripple logic)
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2. Number of logic LUT4s does not include count of distributed RAM and
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ripple logic.
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2023-08-20 11:10:11 +00:00
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Number of clocks: 4
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2023-09-21 09:45:45 +00:00
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Net PHI2_c: 20 loads, 9 rising, 11 falling (Driver: PIO PHI2 )
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2023-08-20 11:10:11 +00:00
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Net RCLK_c: 47 loads, 47 rising, 0 falling (Driver: PIO RCLK )
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2023-09-21 09:45:45 +00:00
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Net nCRAS_c: 9 loads, 0 rising, 9 falling (Driver: PIO nCRAS )
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2023-08-16 09:11:25 +00:00
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Net nCCAS_c: 8 loads, 0 rising, 8 falling (Driver: PIO nCCAS )
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2023-09-21 09:45:45 +00:00
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Number of Clock Enables: 5
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Net N_178: 1 loads, 1 LSLICEs
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Net XOR8MEG18: 5 loads, 5 LSLICEs
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Net N_360_i: 2 loads, 2 LSLICEs
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Net un1_wb_rst14_i_0: 9 loads, 9 LSLICEs
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2023-08-20 11:10:11 +00:00
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Net CmdUFMData_1_sqmuxa: 1 loads, 1 LSLICEs
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2023-08-17 01:04:05 +00:00
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Number of LSRs: 5
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2023-08-16 09:11:25 +00:00
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Net RA10s_i: 1 loads, 0 LSLICEs
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2023-08-20 11:10:11 +00:00
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Net wb_rst10: 3 loads, 3 LSLICEs
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2023-08-17 01:04:05 +00:00
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Net wb_rst: 1 loads, 0 LSLICEs
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2023-08-16 09:11:25 +00:00
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Net nRRAS_0_sqmuxa: 1 loads, 1 LSLICEs
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Net RASr2: 2 loads, 2 LSLICEs
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2023-08-15 09:05:47 +00:00
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Number of nets driven by tri-state buffers: 0
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Top 10 highest fanout non-clock nets:
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2023-09-21 09:45:45 +00:00
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Net InitReady: 41 loads
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Net FS[11]: 23 loads
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2023-08-20 11:10:11 +00:00
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Net FS[13]: 22 loads
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2023-09-21 09:45:45 +00:00
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Net FS[10]: 21 loads
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2023-08-20 11:10:11 +00:00
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Net FS[12]: 21 loads
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2023-09-21 09:45:45 +00:00
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Net FS[9]: 20 loads
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Net FS[14]: 18 loads
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Net CO0: 15 loads
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2023-08-16 09:11:25 +00:00
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Net Ready_fast: 14 loads
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2023-09-21 09:45:45 +00:00
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Net N_214: 13 loads
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2023-08-15 09:05:47 +00:00
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2023-08-17 01:04:05 +00:00
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Number of warnings: 1
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2023-08-15 09:05:47 +00:00
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Number of errors: 0
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<A name="mrp_dwe"></A><B><U><big>Design Errors/Warnings</big></U></B>
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2023-08-17 01:04:05 +00:00
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WARNING - map: UFM was enabled in EFB: Enabling the configuration interface will
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temporarily disable certain features of the device including Power
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Controller, GSR, Hardened User SPI Port, Hardened Primary User I2C Port.
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Functionality is restored after the Flash Memory (UFM/Configuration)
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Interface is disabled using Disable Configuration Interface command 0x26
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followed by Bypass command 0xFF.
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2023-08-15 09:05:47 +00:00
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<A name="mrp_ioa"></A><B><U><big>IO (PIO) Attributes</big></U></B>
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+---------------------+-----------+-----------+------------+
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| IO Name | Direction | Levelmode | IO |
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| | | IO_TYPE | Register |
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+---------------------+-----------+-----------+------------+
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| RD[0] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| Dout[0] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| PHI2 | INPUT | LVCMOS33 | IN |
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+---------------------+-----------+-----------+------------+
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| RDQML | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RDQMH | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nRCAS | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nRRAS | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| nRWE | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RCKE | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RCLK | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nRCS | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[7] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[6] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[5] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[4] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[3] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[2] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RD[1] | BIDIR | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RA[11] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RA[10] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| RA[9] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[8] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[7] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[6] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[5] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[4] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[3] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[2] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[1] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RA[0] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| RBA[1] | OUTPUT | LVCMOS33 | OUT |
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2023-09-21 09:45:45 +00:00
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+---------------------+-----------+-----------+------------+
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| RBA[0] | OUTPUT | LVCMOS33 | OUT |
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+---------------------+-----------+-----------+------------+
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| LED | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nFWE | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nCRAS | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| nCCAS | INPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[7] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[6] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[5] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[4] | OUTPUT | LVCMOS33 | |
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+---------------------+-----------+-----------+------------+
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| Dout[3] | OUTPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Dout[2] | OUTPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Dout[1] | OUTPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[7] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[6] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[5] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[4] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[3] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[2] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[1] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| Din[0] | INPUT | LVCMOS33 | IN |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| CROW[1] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| CROW[0] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[9] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[8] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[7] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[6] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[5] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[4] | INPUT | LVCMOS33 | |
|
2023-09-21 09:45:45 +00:00
|
|
|
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[3] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[2] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[1] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
2023-08-16 09:11:25 +00:00
|
|
|
| MAin[0] | INPUT | LVCMOS33 | |
|
2023-08-15 09:05:47 +00:00
|
|
|
+---------------------+-----------+-----------+------------+
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
<A name="mrp_rm"></A><B><U><big>Removed logic</big></U></B>
|
|
|
|
|
|
|
|
|
|
Block GSR_INST undriven or does not drive anything - clipped.
|
2023-08-16 09:11:25 +00:00
|
|
|
Signal nCRAS_c_i was merged into signal nCRAS_c
|
|
|
|
|
Signal RASr2_i was merged into signal RASr2
|
|
|
|
|
Signal XOR8MEG.CN was merged into signal PHI2_c
|
|
|
|
|
Signal GND undriven or does not drive anything - clipped.
|
2023-08-17 01:04:05 +00:00
|
|
|
Signal ufmefb/VCC undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/GND undriven or does not drive anything - clipped.
|
2023-08-16 09:11:25 +00:00
|
|
|
Signal FS_s_0_S1[17] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal FS_s_0_COUT[17] undriven or does not drive anything - clipped.
|
2023-08-17 01:04:05 +00:00
|
|
|
Signal ufmefb/CFGSTDBY undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/CFGWAKE undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wbc_ufm_irq undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/TCOC undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/TCINT undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIIRQO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPICSNEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN7 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN6 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN5 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN4 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN3 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN2 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN1 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMCSN0 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMOSIEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMOSIO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMISOEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPIMISOO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPISCKEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/SPISCKO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C2IRQO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C1IRQO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C2SDAOEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C2SDAO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C2SCLOEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C2SCLO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C1SDAOEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C1SDAO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C1SCLOEN undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/I2C1SCLO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO0 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO1 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO2 undriven or does not drive anything - clipped.
|
2023-09-21 09:45:45 +00:00
|
|
|
|
2023-08-17 01:04:05 +00:00
|
|
|
Signal ufmefb/PLLDATO3 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO4 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO5 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO6 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLDATO7 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLADRO0 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLADRO1 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLADRO2 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLADRO3 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLADRO4 undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLWEO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLL1STBO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLL0STBO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLRSTO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/PLLCLKO undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wb_dat_o_1[2] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wb_dat_o_1[3] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wb_dat_o_1[4] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wb_dat_o_1[5] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wb_dat_o_1[6] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal ufmefb/wb_dat_o_1[7] undriven or does not drive anything - clipped.
|
2023-08-16 09:11:25 +00:00
|
|
|
Signal FS_cry_0_S0[0] undriven or does not drive anything - clipped.
|
|
|
|
|
Signal N_1 undriven or does not drive anything - clipped.
|
|
|
|
|
Block nCRAS_pad_RNIBPVB was optimized away.
|
|
|
|
|
Block RASr2_RNIAFR1 was optimized away.
|
|
|
|
|
Block XOR8MEG.CN was optimized away.
|
|
|
|
|
Block GND was optimized away.
|
2023-08-17 01:04:05 +00:00
|
|
|
Block ufmefb/VCC was optimized away.
|
|
|
|
|
Block ufmefb/GND was optimized away.
|
2023-08-15 09:05:47 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2023-08-17 01:04:05 +00:00
|
|
|
<A name="mrp_efb"></A><B><U><big>Embedded Functional Block Connection Summary</big></U></B>
|
|
|
|
|
|
2023-08-20 11:10:11 +00:00
|
|
|
Desired WISHBONE clock frequency: 66.7 MHz
|
|
|
|
|
Clock source: RCLK_c
|
2023-08-17 01:04:05 +00:00
|
|
|
Reset source: wb_rst
|
|
|
|
|
Functions mode:
|
|
|
|
|
I2C #1 (Primary) Function: DISABLED
|
|
|
|
|
I2C #2 (Secondary) Function: DISABLED
|
|
|
|
|
SPI Function: DISABLED
|
|
|
|
|
Timer/Counter Function: DISABLED
|
|
|
|
|
Timer/Counter Mode: WB
|
|
|
|
|
UFM Connection: ENABLED
|
|
|
|
|
PLL0 Connection: DISABLED
|
|
|
|
|
PLL1 Connection: DISABLED
|
|
|
|
|
I2C Function Summary:
|
|
|
|
|
--------------------
|
|
|
|
|
None
|
|
|
|
|
SPI Function Summary:
|
|
|
|
|
--------------------
|
|
|
|
|
None
|
|
|
|
|
Timer/Counter Function Summary:
|
|
|
|
|
------------------------------
|
|
|
|
|
None
|
2023-09-21 09:45:45 +00:00
|
|
|
|
2023-08-17 01:04:05 +00:00
|
|
|
UFM Function Summary:
|
|
|
|
|
--------------------
|
|
|
|
|
UFM Utilization: General Purpose Flash Memory
|
2023-09-21 09:45:45 +00:00
|
|
|
Initialized UFM Pages: 321 Pages (321*128 Bits)
|
2023-08-17 01:04:05 +00:00
|
|
|
Available General
|
2023-09-21 09:45:45 +00:00
|
|
|
Purpose Flash Memory: 511 Pages (511*128 Bits)
|
2023-08-17 01:04:05 +00:00
|
|
|
|
|
|
|
|
EBR Blocks with Unique
|
|
|
|
|
Initialization Data: 0
|
|
|
|
|
|
|
|
|
|
WID EBR Instance
|
|
|
|
|
--- ------------
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
<A name="mrp_asic"></A><B><U><big>ASIC Components</big></U></B>
|
|
|
|
|
---------------
|
|
|
|
|
|
|
|
|
|
Instance Name: ufmefb/EFBInst_0
|
|
|
|
|
Type: EFB
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2023-08-15 09:05:47 +00:00
|
|
|
<A name="mrp_runtime"></A><B><U><big>Run Time and Memory Usage</big></U></B>
|
|
|
|
|
-------------------------
|
|
|
|
|
|
|
|
|
|
Total CPU Time: 0 secs
|
|
|
|
|
Total REAL Time: 0 secs
|
2023-09-21 09:45:45 +00:00
|
|
|
Peak Memory Usage: 63 MB
|
2023-08-15 09:05:47 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2023-08-16 09:11:25 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2023-08-17 01:04:05 +00:00
|
|
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|
|
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|
|
|
|
|
|
|
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|
|
|
2023-08-16 09:11:25 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2023-08-15 09:05:47 +00:00
|
|
|
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
|
|
|
|
|
Copyright (c) 1995 AT&T Corp. All rights reserved.
|
|
|
|
|
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
|
|
|
|
|
Copyright (c) 2001 Agere Systems All rights reserved.
|
|
|
|
|
Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights
|
|
|
|
|
reserved.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
|
|
|
<BR>
|
|
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|
|
<BR>
|
|
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|
|
<BR>
|
|
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|
|
<BR>
|
|
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|
|
<BR>
|
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|
<BR>
|
|
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|
|
<BR>
|
|
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|
|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
<BR>
|
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|
|
<BR>
|
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|
|
<BR>
|
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|
|
<BR>
|
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|
|
<BR>
|
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|
|
<BR>
|
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|
<BR>
|
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|
|
<BR>
|
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|
|
<BR>
|
|
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|
|
<BR>
|
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|
|
<BR>
|
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