Initial commit, add code from Digital Prism
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# Applied Engineering Digital Prism
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These are reverse-engineered dumps of the two PALs on Applied Engineering's family of RGB piggyback cards for the RamWorks.
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The AERGB PAL is present on the original RGB Card as well as the Digital Prism and the Color Link.
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The AEDP PAL is present on the Digital Prism and the Color Link.
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The originals are PAL16L8 chips, but I have successfully replaced them with ATF16V8B chips using this code, and functionality appears identical.
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CUPL(WM) 5.0a Serial# 60008009
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Device g16v8ma Library DLIB-h-40-8
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Created Sun Nov 29 15:49:14 2020
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Name aedp
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Partno aedp
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Revision 01
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Date 11/29/2020
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Designer Renee Harke
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Company None
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Assembly None
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Location None
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*QP20
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*QF2194
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*G0
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*F0
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*L00000 11111111111111111111111111111111
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*L00032 10111011111111111111111111111111
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*L00064 10111111111110111111111111111111
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*L00096 10111111111111111111101111111111
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*L00128 10111111011111111111111111111111
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*L00160 11111011101110111111011111111111
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*L00256 11111111111111111111111111111111
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*L00288 10111111101111111111111111111111
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*L00320 10110111111101111111011111111111
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*L00352 11111111101111111111101111111111
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*L00384 11111111101101111111111111111111
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*L00416 11110111101111111111111111111111
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*L00512 11111111111111111111111111111111
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*L00544 10111111111110111111111111111111
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*L00576 10110111101111111111011111111111
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*L00608 11111111111110111111101111111111
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*L00640 11110111111110111111111111111111
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*L00672 11111111011110111111111111111111
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*L00768 11111111111111111111111111111111
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*L00800 11111011101111111111111111111111
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*L00832 11111011111110111111111111111111
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*L00864 11111011111111111111101111111111
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*L00896 01111011111111111111111111111111
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*L00928 01111111101110111111011111111111
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*L01280 11111111111111111111111111111111
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*L01312 11111111111111111011111111111011
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*L01344 11111111111111110111111111110111
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*L01536 11111111111111111111111111111111
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*L01568 11111111111111111011111111111111
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*L01792 11111111111111111111111111111111
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*L01824 11111111111111111110111111111011
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*L01856 11111111111111111101111111110111
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*L02048 00000000011000010110010101100100
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*L02080 01110000001000000000000000000000
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*L02112 00000000111111111111111111111111
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*L02144 11111111111111111111111111111111
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*L02176 111111111111111111
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*C8669
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*7044
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Name aedp ;
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PartNo aedp ;
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Date 11/29/2020 ;
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Revision 01 ;
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Designer Renee Harke ;
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Company None ;
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Assembly None ;
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Location None ;
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Device g16v8ma ;
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/**
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* This is one of two PALs from the Applied Engineering "Digital Prism" card,
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* which is a piggyback card for the RamWorks series of cards for the Apple IIe.
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* The card provides a digital RGB output compatible with the AppleColor Monitor
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* 100, as well as a digital CGA output compatible with many PC monitors of the
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* era.
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*
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* This same PAL is also present on the "Color Link" card, which might be
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* considered a different revision of the same card, replacing the digital RGB
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* output with an analog RGB output compatible with the AppleColor RGB Monitor
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* from the Apple IIGS.
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*
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* The other PAL on this card is shared with the "RGB Card" and the "Color
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* Link".
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*
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* The function of the PAL is not changed between the cards. It is responsible
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* for mapping XRGB colors to CGA colors, and generating HSYNC/VSYNC.
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*
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* The PAL is generally (always?) labelled "AEDP Q" and is located near the
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* top-right of the card. It is typically an MMI-branded PAL16L8.
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*
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* The VSYNC generator is worth calling out. Pin 13 and 15 are connected
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* through a simple RC circuit which does two things:
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* 1. Delay the sync signal by a few tens of microseconds.
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* 2. Removes the HSYNC pulses, in principle generating one long pulse during
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* VSYNC.
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*
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* I say "in principle" because if you watch the result on a scope, it fails
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* to filter the first HSYNC pulse that occurs during VSYNC. Actually I've only
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* tested this on the Color Link, but if you compare the Digital Prism and the
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* Color Link, you'll note that the resistor is 3600 ohm on the Digital Prism,
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* and 2200 ohm on the Color Link. I suspect that AE identified this problem
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* and tried to fix it, but didn't fully succeed.
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*
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* Replacing the resistor with something around 1000 ohm seems to generate
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* clean VSYNC. This seems more necessary if you replace the PAL16L8 with a
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* ATF16V8, possibly due to different timing or other electrical properties.
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*
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* I claim no copyright on this code.
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*/
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/************* INPUT PINS **************/
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PIN 2 = XINTEN; /* XRGB intensity */
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PIN 3 = XBLUE; /* XRGB blue */
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PIN 4 = XRED; /* XRGB red */
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PIN 5 = XGREEN; /* XRGB green */
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PIN 6 = CSYNC; /* sync */
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PIN 7 = CLRMAP; /* sw3: color mapping */
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PIN 9 = INVSYN; /* sw4: invert sync */
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PIN 15 = SYNCB; /* RC buffered CSYNC */
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/************* OUTPUT PINS *************/
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PIN 12 = VSYNC; /* vsync */
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PIN 13 = SYNCO; /* out to RC circuit */
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PIN 14 = HSYNC; /* hsync */
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PIN 16 = CBLUE; /* CGA blue */
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PIN 17 = CGREEN; /* CGA green */
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PIN 18 = CRED; /* CGA red */
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PIN 19 = CINTEN; /* CGA intensity */
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/* Use buffered CSYNC as VSYNC, inverted if switch is on */
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!VSYNC = (!INVSYN & !SYNCB) # (INVSYN & SYNCB);
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/* Send CSYNC to RC delay circuit */
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!SYNCO = (!CSYNC);
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/* Use CSYNC as HSYNC, inverted if switch is on */
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!HSYNC = (!CSYNC & !INVSYN) # (CSYNC & INVSYN);
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/* Map colors */
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!CBLUE = (!XBLUE & !XRED) # (!XBLUE & !XGREEN) # (!XBLUE & !CLRMAP) # (XINTEN & !XBLUE) # (XINTEN & !XRED & !XGREEN & CLRMAP);
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!CGREEN = (!XINTEN & !XGREEN) # (!XINTEN & XBLUE & !XRED & CLRMAP) # (!XGREEN & !CLRMAP) # (XBLUE & !XGREEN) # (XRED & !XGREEN);
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!CRED = (!XINTEN & !XRED) # (!XINTEN & XBLUE & XGREEN & CLRMAP) # (!XRED & !CLRMAP) # (!XRED & XGREEN) # (XBLUE & !XRED);
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!CINTEN = (!XINTEN & !XBLUE) # (!XINTEN & !XGREEN) # (!XINTEN & !CLRMAP) # (!XINTEN & XRED) # (!XBLUE & !XRED & !XGREEN & CLRMAP);
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CUPL(WM) 5.0a Serial# 60008009
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Device g16v8ma Library DLIB-h-40-8
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Created Sat Nov 28 17:21:18 2020
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Name aergb
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Partno aergb
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Revision 01
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Date 11/28/2020
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Designer Renee Harke
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Company None
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Assembly None
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Location None
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*QP20
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*QF2194
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*G0
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*F0
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*L00000 11111111111111111111111111111111
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*L00032 11101111111111101111111110110110
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*L00064 11100111111111101111111111110110
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*L00096 11101111111111100111111110110111
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*L00128 11101101111111101111111111110111
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*L00160 10011111111111101111111111111011
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*L00192 10011110111111101111111111111111
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*L00224 11110101111111111111111111110111
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*L00512 11111111111111111111111111111111
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*L00544 10111110111111011011111111110111
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*L00576 10110111111111111111111110111011
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*L00608 10110111111111111111111111111010
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*L00640 01111110111111010111111111110111
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*L01024 11111111111111111111111111111111
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*L01056 11101111111111111111111111111011
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*L01088 11101110111111111111111111111110
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*L01120 11101101111111101111111111111111
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*L01152 11101110111111111111111101111111
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*L01184 11111111111111011111111111111011
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*L01216 11111110111111011111111111111111
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*L01280 11111111111111111111111111111111
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*L01312 11101111111101111111111111011111
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*L01344 10111111111111111111011111100111
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*L01376 11011110111111100111101111111111
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*L01408 01111111111111111111101111100111
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*L01440 11111101111101111111111111110111
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*L01472 11111111111111110111101111011011
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*L01504 11111111111111111111111101101011
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*L01536 11111111111111111111111111111111
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*L01568 11101111111111111111111111111011
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*L01600 11111111111111011111111111111011
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*L01632 11111110111111011111111111111111
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*L01792 11111111111111111111111111111111
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*L01824 11101110111111101111111111110111
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*L01856 10111010111111011111011111110111
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*L01888 10110110111111011111101111110111
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*L01920 11111101101111111111111111110111
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*L01952 11111111111111111111111111111001
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*L01984 01111010111111011111101111110111
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*L02016 01110110111111011111011111110111
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*L02048 00000000011000010110010101110010
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*L02080 01100111011000100010000000000000
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*L02112 00000000111111111111111111111111
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*L02144 11111111111111111111111111111111
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*L02176 111111111111111111
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*C958C
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*AEF8
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Name aergb ;
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PartNo aergb ;
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Date 11/28/2020 ;
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Revision 01 ;
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Designer Renee Harke ;
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Company None ;
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Assembly None ;
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Location None ;
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Device g16v8ma ;
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/**
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* This is the PAL from the Applied Engineering "RGB Card", which is a piggyback
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* card for the RamWorks series of cards for the Apple IIe. The card provides a
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* digital RGB output compatible with the AppleColor Monitor 100.
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*
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* This same PAL (along with another one) is also present on the "Digital Prism"
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* and "Color Link" cards, which might be considered as different revisions of
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* the same base card.
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*
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* The function of the PAL is not changed between the cards. It is involved with
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* converting the serial video signal from the logic board into an RGB output,
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* though understanding its exact function would require more research.
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*
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* The PAL is generally (always?) labelled "AERGB Q" and is located near the
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* bottom-left of the card. It is typically an MMI-branded PAL16L8. An ATF16V8
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* in complex mode can emulate the function of this PAL.
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*
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* Thanks to Robert Justice for putting me on to the idea that we have to
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* express things in negative logic in order to fit the equations on the chip.
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*
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* I claim no copyright on this code.
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*/
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/****** INPUT PINS ******/
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PIN 1 = P1; /* 80VID */
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PIN 2 = P2; /* SEROUT */
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PIN 3 = P3; /* */
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PIN 4 = P4; /* */
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PIN 5 = P5; /* LDPS */
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PIN 6 = P6; /* */
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PIN 7 = P7; /* */
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PIN 8 = P8; /* */
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PIN 9 = P9; /* */
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PIN 11 = P11; /* */
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PIN 16 = P16; /* FRCTXT */
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PIN 18 = P18; /* SEGB */
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/***** OUTPUT PINS ******/
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PIN 12 = P12; /* */
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PIN 13 = P13; /* */
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PIN 14 = P14; /* */
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PIN 15 = P15; /* */
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PIN 17 = P17; /* */
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PIN 19 = P19; /* */
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!P12 = (!P1 & P9 & !P16 & !P18) # (!P2 & !P3 & P7 & P9 & P16 & !P18) # (!P2 & P3 & !P7 & P9 & P16 & !P18)
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# (!P4 & P9 & P18) # (!P9 & P11) # (P2 & !P3 & !P7 & P9 & P16 & !P18) # (P2 & P3 & P7 & P9 & P16 & !P18);
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!P13 = (!P1 & !P9) # (!P9 & P16) # (P16 & !P18);
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/**
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* Feedback is necessary to express P14 in 7 product terms.
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*
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* You can confirm with a logic analyzer that the original PAL does this too;
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* you can see P13 switch first, and then P14 lags one cycle behind.
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*
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* It's possible that P12 and/or P15 were involved in the original equation as
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* well, but it's not necessary so they probably weren't.
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*/
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!P14 = (!P1 & P5 & P13) # (!P2 & P7 & P9 & !P13) # (P1 & P6 & !P7 & !P16 & !P18) # (P2 & !P7 & P9 & !P13)
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# (P5 & P9 & P18) # (P6 & !P7 & !P9 & P13) # (P8 & !P9 & !P13);
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!P15 = (!P1 & !P9) # (!P1 & !P11 & !P18) # (!P1 & !P16 & P18) # (!P1 & P8 & !P18) # (!P9 & P16) # (P16 & !P18);
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!P17 = (!P2 & !P6 & P9 & P16 & !P18) # (!P2 & P3 & !P8 & !P9) # (!P2 & P3 & !P9 & !P11) # (P2 & P6 & P9 & P16 & !P18);
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!P19 = (!P1 & !P8 & P9 & !P11 & !P16) # (!P1 & P3 & P9 & !P11 & !P16) # (!P1 & P6 & !P8 & P9 & !P16)
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# (!P1 & P9 & !P16 & P18) # (P1 & !P2 & !P9 & !P16) # (P1 & !P2 & !P16 & !P18) # (P3 & P9 & P18);
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