2023-06-25 19:35:30 +00:00
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===========================
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2018-08-06 01:35:43 +00:00
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Target system specification
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2023-06-25 19:35:30 +00:00
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===========================
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2018-08-06 01:35:43 +00:00
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2018-09-15 14:21:05 +00:00
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Prog8 targets the following hardware:
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2018-08-06 01:35:43 +00:00
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2020-08-27 16:18:29 +00:00
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- 8 bit MOS 6502/65c02/6510 CPU
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2018-08-06 01:35:43 +00:00
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- 64 Kb addressable memory (RAM or ROM)
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2024-12-11 17:08:26 +00:00
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- optional use of memory-mapped I/O registers
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2020-08-27 16:18:29 +00:00
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- optional use of system ROM routines
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2018-08-06 01:35:43 +00:00
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2022-02-15 00:39:12 +00:00
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Currently these machines can be selected as a compilation target (via the ``-target`` compiler argument):
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2020-08-27 16:18:29 +00:00
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2021-12-21 18:08:33 +00:00
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- 'c64': the Commodore 64
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- 'cx16': the `Commander X16 <https://www.commanderx16.com/>`_
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2022-02-21 22:38:53 +00:00
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- 'c128': the Commodore 128 (*limited support*)
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2023-08-14 13:16:46 +00:00
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- 'pet32': the Commodore PET 4032 (*limited support*)
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2024-11-08 18:19:11 +00:00
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- 'atari': the Atari 800 XL (*experimental*)
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2024-04-24 23:17:44 +00:00
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- 'neo': the `Neo6502 <https://github.com/paulscottrobson/neo6502-firmware/wiki>`_ (*experimental*)
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2022-09-20 02:04:47 +00:00
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- 'virtual': a builtin virtual machine
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2020-08-30 16:32:16 +00:00
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2021-12-30 17:33:26 +00:00
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This chapter explains some relevant system details of the c64 and cx16 machines.
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2018-08-06 01:35:43 +00:00
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2020-10-17 18:35:36 +00:00
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.. hint::
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2022-10-29 12:10:11 +00:00
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If you only use standard Kernal and prog8 library routines,
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2022-09-20 02:04:47 +00:00
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it is often possible to compile the *exact same program* for
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different machines (just change the compilation target flag)!
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2020-09-21 22:47:02 +00:00
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2018-08-06 01:35:43 +00:00
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Memory Model
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============
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2023-04-03 18:47:31 +00:00
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Generic 6502 Physical address space layout
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------------------------------------------
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2018-08-06 01:35:43 +00:00
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The 6502 CPU can address 64 kilobyte of memory.
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2018-09-15 14:21:05 +00:00
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Most of the 64 kilobyte address space can be used by Prog8 programs.
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2023-04-03 18:47:31 +00:00
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This is a hard limit: there is no support for RAM expansions or bank switching built natively into the language.
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2018-08-06 01:35:43 +00:00
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====================== ================== ========
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memory area type note
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====================== ================== ========
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2022-10-29 12:12:10 +00:00
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``$00``--``$ff`` zeropage contains many sensitive system variables
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2018-08-06 01:35:43 +00:00
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``$100``--``$1ff`` Hardware stack used by the CPU, normally not accessed directly
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``$0200``--``$ffff`` Free RAM or ROM free to use memory area, often a mix of RAM and ROM
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2023-04-03 18:47:31 +00:00
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depending on the specific computer system
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2018-08-06 01:35:43 +00:00
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====================== ================== ========
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2023-04-03 18:47:31 +00:00
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Memory map for the C64 and the X16
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----------------------------------
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This is the default memory map of the 64 Kb addressable memory for those two systems.
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Both systems have ways to alter the memory map and/or to switch memory banks, but that is not shown here.
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2024-11-04 03:28:27 +00:00
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See :ref:`banking` for details about that.
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2023-04-03 18:47:31 +00:00
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.. image:: memorymap.svg
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Footnotes for the Commander X16
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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*Golden Ram $0400 - $07FF*
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2023-07-15 13:25:32 +00:00
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*free to use.*
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2023-04-03 18:47:31 +00:00
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*Zero Page $0000 - $00FF*
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$00 and $01 are hardwired as Rom and Ram banking registers.
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2018-08-06 01:35:43 +00:00
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2023-04-03 18:47:31 +00:00
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$02 - $21 are the 16 virtual cx16 registers R0-R15.
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2018-08-06 01:35:43 +00:00
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2023-07-29 11:04:35 +00:00
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$22 - $7F are used by Prog8 to put variables in.
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2018-08-06 01:35:43 +00:00
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2023-04-03 18:47:31 +00:00
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The top half of the ZP ($80-$FF) is reserved for use by the Kernal and Basic in normal operation.
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Zero page use by Prog8 can be manipulated with the ``%zeropage`` directive, various options
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2023-07-29 11:04:35 +00:00
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may free up more locations for use by Prog8 or to reserve them for other things.
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2018-08-06 01:35:43 +00:00
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2023-04-03 18:47:31 +00:00
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Footnotes for the Commodore 64
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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2018-08-06 01:35:43 +00:00
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2024-11-04 20:24:53 +00:00
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*Program RAM $C000-$CFFF*
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2023-07-15 13:25:32 +00:00
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*free to use:* $C000 - $CFDF
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*reserved:* $CFE0 - $CFFF for the 16 virtual cx16 registers R0-R15
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2018-08-06 01:35:43 +00:00
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2024-11-04 20:24:53 +00:00
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*Program RAM / BASIC ROM $A000-$BFFF*
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On the C64 the Basic ROM normally occupies this memory area. However Prog8 programs that do not
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use floating point variables, actually bank out the Basic ROM to reclaim the 8 Kb of RAM that
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is hidden below it. This means that all the memory from $0801 to $D000 (exclusive) is available
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as program ram to Prog8 programs.
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2023-04-03 18:47:31 +00:00
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*Zero Page $0000 - $00FF*
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Consider the full zero page to be reserved for use by the Kernal and Basic in normal operation.
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Zero page use by Prog8 can be manipulated with the ``%zeropage`` directive, various options
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2023-07-29 11:04:35 +00:00
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may free up more locations for use by Prog8 or to reserve them for other things.
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2018-08-06 01:35:43 +00:00
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2023-04-03 18:47:31 +00:00
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Zero page usage by the Prog8 compiler
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-------------------------------------
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2018-09-15 14:21:05 +00:00
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Prog8 knows what addresses are safe to use in the various ZP handling configurations.
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2018-09-06 19:13:49 +00:00
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It will use the free ZP addresses to place its ZP variables in,
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2018-08-06 01:35:43 +00:00
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until they're all used up. If instructed to output a program that takes over the entire
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machine, (almost) all of the ZP addresses are suddenly available and will be used.
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2018-09-06 19:13:49 +00:00
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2022-10-29 12:12:10 +00:00
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**zeropage handling is configurable:**
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2018-09-06 19:13:49 +00:00
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There's a global program directive to specify the way the compiler
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treats the ZP for the program. The default is to be reasonably restrictive to use the
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2022-10-29 12:10:11 +00:00
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part of the ZP that is not used by the C64's Kernal routines.
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It's possible to claim the whole ZP as well (by disabling the operating system or Kernal).
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2022-10-28 21:39:15 +00:00
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If you want, it's also possible to be more restrictive and stay clear of the addresses used by BASIC routines too.
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2019-02-02 23:14:56 +00:00
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This allows the program to exit cleanly back to a BASIC ready prompt - something that is not possible in the other modes.
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2018-08-06 01:35:43 +00:00
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2022-10-29 12:12:10 +00:00
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IRQs and the zeropage
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2018-08-06 01:35:43 +00:00
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^^^^^^^^^^^^^^^^^^^^^
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2022-10-29 12:12:10 +00:00
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The normal IRQ routine in the C64's Kernal will read and write several addresses in the ZP
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2018-08-06 01:35:43 +00:00
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(such as the system's software jiffy clock which sits in ``$a0 - $a2``):
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``$a0 - $a2``; ``$91``; ``$c0``; ``$c5``; ``$cb``; ``$f5 - $f6``
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2018-09-06 19:13:49 +00:00
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These addresses will *never* be used by the compiler for ZP variables, so variables will
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2018-08-06 01:35:43 +00:00
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not interfere with the IRQ routine and vice versa. This is true for the normal ZP mode but also
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for the mode where the whole system and ZP have been taken over.
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So the normal IRQ vector can still run and will be when the program is started!
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CPU
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===
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Directly Usable Registers
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-------------------------
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2020-07-24 20:57:19 +00:00
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The hardware CPU registers are not directly accessible from regular Prog8 code.
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If you need to mess with them, you'll have to use inline assembly.
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2018-08-06 01:35:43 +00:00
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2020-07-24 20:57:19 +00:00
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The status register (P) carry flag and interrupt disable flag can be written via a couple of special
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builtin functions (``set_carry()``, ``clear_carry()``, ``set_irqd()``, ``clear_irqd()``),
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and read via the ``read_flags()`` function.
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2019-01-24 01:43:25 +00:00
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2020-12-22 12:29:16 +00:00
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The 16 'virtual' 16-bit registers that are defined on the Commander X16 machine are not real hardware
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registers and are just 16 memory-mapped word values that you *can* access directly.
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2019-03-06 21:11:16 +00:00
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IRQ Handling
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============
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Normally, the system's default IRQ handling is not interfered with.
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2021-02-21 21:17:28 +00:00
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You can however install your own IRQ handler (for clean separation, it is advised to define it inside its own block).
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2023-11-22 22:40:44 +00:00
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There are a few library routines available to make setting up 60hz/vsync IRQs and raster/line IRQs a lot easier (no assembly code required).
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2019-03-06 21:11:16 +00:00
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2023-04-28 21:13:03 +00:00
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These routines are::
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2019-03-06 21:11:16 +00:00
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2023-11-21 21:33:37 +00:00
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sys.set_irq(uword handler_address)
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sys.set_rasterirq(uword handler_address, uword rasterline)
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2023-04-28 21:13:03 +00:00
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sys.restore_irq() ; set everything back to the systems default irq handler
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2020-07-24 20:57:19 +00:00
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2023-11-22 22:40:44 +00:00
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The IRQ handler routine must return a boolean value (0 or 1) in the A register:
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2023-11-21 21:33:37 +00:00
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0 means do *not* run the system IRQ handler routine afterwards, 1 means run the system IRQ handler routine afterwards.
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2023-11-21 20:31:50 +00:00
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**CommanderX16 specific notes**
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2024-09-22 10:20:28 +00:00
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.. sidebar::
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X16 specific routines
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For the X16 there are also some specialized IRQ handling routines, see :ref:`x16-specific-irq` below.
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2023-11-21 21:33:37 +00:00
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Note that for the CommanderX16 the set_rasterirq() will disable VSYNC irqs and never call the system IRQ handler regardless
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of the return value of the user handler routine. This also means the default sys.wait() routine won't work anymore,
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when using this handler.
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2024-09-22 10:20:28 +00:00
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2023-11-21 21:33:37 +00:00
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These two helper routines are not particularly suited to handle multiple IRQ sources on the Commander X16.
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It's possible but it requires correct fiddling with IRQ enable bits, acknowledging the IRQs, and properly calling
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2023-11-22 22:40:44 +00:00
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or not calling the system IRQ handler routine. See the section below for perhaps a better and easier solution that
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is tailored to this system.
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2021-02-21 22:41:50 +00:00
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2023-11-22 22:40:44 +00:00
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The Commander X16 syslib provides some additional routines that should be used *in your IRQ handler routine* if it uses the Vera registers.
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2023-01-25 23:37:30 +00:00
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They take care of saving and restoring the Vera state of the interrupted main program, otherwise the IRQ handler's manipulation
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will corrupt any Vera operations that were going on in the main program. The routines are::
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2022-07-02 21:10:15 +00:00
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2023-04-17 21:37:15 +00:00
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cx16.save_vera_context()
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2024-08-27 18:06:55 +00:00
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; perhaps also cx16.save_virtual_registers() here... see caution below
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2023-11-19 17:59:03 +00:00
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; ... do your work that uses vera here!...
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2024-08-27 18:06:55 +00:00
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; perhaps also cx16.restore_virtual_registers() here... see caution below
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2023-04-17 21:37:15 +00:00
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cx16.restore_vera_context()
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2022-07-02 21:10:15 +00:00
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2023-01-20 02:10:41 +00:00
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.. caution::
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2024-08-27 18:06:55 +00:00
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The Commander X16's 16 'virtual registers' R0-R15 *are not preserved* in the IRQ handler! (On any system!)
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2023-03-19 19:58:02 +00:00
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So you should make sure that the handler routine does NOT use these registers, or do some sort of saving/restoring yourself
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2024-08-27 18:06:55 +00:00
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of the ones that you do need in the IRQ handler. Note that Prog8 itself may also use these registers, so be very careful.
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This is not a X16 specific thing; these registers also exist on the other compiler targets, and the same
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issue holds there.
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2023-03-19 19:58:02 +00:00
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2024-08-27 18:06:55 +00:00
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There are two utility routines in cx16 that save and restore *all* 16 registers. It's a bit inefficient if
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only a few are clobbered, but it's easy to put calls to them into your IRQ handler routine at the start and end.
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These routines are ``cx16.save_virtual_registers()`` and ``cx16.restore_virtual_registers()``.
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It is also advised to **not use floating point calculations** inside IRQ handler routines.
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2023-01-20 02:10:41 +00:00
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Beside them being very slow, there are intricate requirements such as having the
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correct ROM bank enabled to be able to successfully call them (and making sure the correct
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ROM bank is reset at the end of the handler), and the possibility
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of corrupting variables and floating point calculations that are being executed
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in the interrupted main program. These memory locations should be backed up
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and restored at the end of the handler, further increasing its execution time...
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2023-11-22 22:40:44 +00:00
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2024-09-22 10:20:28 +00:00
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.. _x16-specific-irq:
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2023-11-22 22:40:44 +00:00
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Commander X16 specific IRQ handling
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===================================
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2023-11-22 23:23:15 +00:00
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Instead of using the routines in ``sys`` as mentioned above (that are more or less portable
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2023-11-22 22:40:44 +00:00
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across the C64,C128 and cx16), you can also use the special routines made for the Commander X16,
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2023-11-22 23:23:15 +00:00
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in ``cx16``. The idea is to let Prog8 do the irq dispatching and housekeeping for you, and that
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2023-11-22 22:40:44 +00:00
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your program only has to register the specific handlers for the specific IRQ sources that you want to handle.
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Look at the examples/cx16/multi-irq-new.p8 example to see how these routines can be used.
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2023-11-22 23:23:15 +00:00
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Here they are, all available in ``cx16``:
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2023-11-22 22:40:44 +00:00
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``disable_irqs ()``
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Disables all Vera IRQ sources. Note that the CPU irq disable flag is not changed by this routine.
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you can manipulate that via ``sys.set_irqd()`` and ``sys.clear_irqd()`` as usual.
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``enable_irq_handlers (bool disable_all_irq_sources)``
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Install the "master IRQ handler" that will dispatch IRQs to the registered handler for each type.
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Only Vera IRQs supported for now.
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2023-11-22 23:23:15 +00:00
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Pass true to initially disable all Vera interrupt sources (they will be enabled individually again
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by setting the various handlers), or pass false to not touch this.
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2023-11-22 22:40:44 +00:00
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The handlers don't need to clear its ISR bit, but have to return 0 or 1 in A,
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where 1 means: continue with the system IRQ handler, 0 means: don't call that.
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2023-11-24 00:12:27 +00:00
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The order in which the handlers are invoked if multiple interrupts occur simultaneously is: LINE, SPRCOL, AFLOW, VSYNC.
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2023-11-22 22:40:44 +00:00
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``set_vsync_irq_handler (uword address)``
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Sets the verical sync interrupt handler routine. Also enables VSYNC interrupts.
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``set_line_irq_handler (uword rasterline, uword address)``
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Sets the rasterline interrupt handler routine to trigger on the specified raster line.
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Also enables LINE interrupts.
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You can use ``sys.set_rasterline()`` later to adjust the rasterline on which to trigger.
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``set_sprcol_irq_handler (uword address)``
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Sets the sprite collision interrupt handler routine. Also enables SPRCOL interrupts.
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``set_aflow_irq_handler (uword address)``
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Sets the audio buffer underrun interrupt handler routine. Also enables AFLOW interrupts.
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2024-07-23 00:10:05 +00:00
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Note: the handler must fill the Vera's audio fifo buffer by itself with at least 25% worth of data (1 kb)
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otherwise the aflow irq keeps triggering.
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2023-11-22 22:40:44 +00:00
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``disable_irq_handlers ()``
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Hand control back to the system default IRQ handler.
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