SE-VGA/old/sevga.vwf

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	DATA_OFFSET = 0.0;
	DATA_DURATION = 33000.0;
	SIMULATION_TIME = 0.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("cpuAddr[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[12]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[13]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[14]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[15]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[16]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[17]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[18]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[19]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[20]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[21]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[22]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuAddr[23]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuClk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuData")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 16;
	LSB_INDEX = 0;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("cpuData[15]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[14]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[13]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[12]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuData[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "cpuData";
}

SIGNAL("cpuRnW")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("nReset")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("ncpuAS")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("ncpuLDS")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("ncpuUDS")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("nhSync")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("nvSync")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("nvramOE")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("nvramWE")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("pixClk")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("ramSize")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 3;
	LSB_INDEX = 0;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("ramSize[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "ramSize";
}

SIGNAL("ramSize[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "ramSize";
}

SIGNAL("ramSize[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "ramSize";
}

SIGNAL("vidOut")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("vramAddr")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 15;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("vramAddr[14]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[13]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[12]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramAddr[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "vramAddr";
}

SIGNAL("vramData")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = BIDIR;
	PARENT = "";
}

SIGNAL("vramData[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("vramData[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BIDIR;
	PARENT = "vramData";
}

SIGNAL("cpusnoop:cpusnp|addrCache")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 14;
	LSB_INDEX = 0;
	DIRECTION = REGISTERED;
	PARENT = "";
}

SIGNAL("cpusnoop:cpusnp|addrCache[13]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[12]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|addrCache[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|addrCache";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = REGISTERED;
	PARENT = "";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheHi[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheHi";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = REGISTERED;
	PARENT = "";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|dataCacheLo[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "cpusnoop:cpusnp|dataCacheLo";
}

SIGNAL("cpusnoop:cpusnp|pendWriteHi")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "";
}

SIGNAL("cpusnoop:cpusnp|pendWriteLo")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = REGISTERED;
	PARENT = "";
}

SIGNAL("nvramCE0")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("nvramCE1")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

GROUP("cpuAddr")
{
	MEMBERS = "cpuAddr[1]", "cpuAddr[2]", "cpuAddr[3]", "cpuAddr[4]", "cpuAddr[5]", "cpuAddr[6]", "cpuAddr[7]", "cpuAddr[8]", "cpuAddr[9]", "cpuAddr[10]", "cpuAddr[11]", "cpuAddr[12]", "cpuAddr[13]", "cpuAddr[14]", "cpuAddr[15]", "cpuAddr[16]", "cpuAddr[17]", "cpuAddr[18]", "cpuAddr[19]", "cpuAddr[20]", "cpuAddr[21]", "cpuAddr[22]", "cpuAddr[23]";
}

TRANSITION_LIST("cpuAddr[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[16]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[17]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[18]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[19]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[20]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[21]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuAddr[22]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuAddr[23]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 33000.0;
	}
}

TRANSITION_LIST("cpuClk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 264;
			LEVEL 0 FOR 62.5;
			LEVEL 1 FOR 62.5;
		}
	}
}

TRANSITION_LIST("cpuData[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 31720.0;
	}
}

TRANSITION_LIST("cpuData[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 360.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 360.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 31720.0;
	}
}

TRANSITION_LIST("cpuData[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 31720.0;
	}
}

TRANSITION_LIST("cpuData[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 360.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 32080.0;
	}
}

TRANSITION_LIST("cpuData[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 31720.0;
	}
}

TRANSITION_LIST("cpuData[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 31300.0;
	}
}

TRANSITION_LIST("cpuData[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 32080.0;
	}
}

TRANSITION_LIST("cpuRnW")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 600.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 40.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 400.0;
		LEVEL 1 FOR 31300.0;
	}
}

TRANSITION_LIST("nReset")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 110.0;
		LEVEL 0 FOR 40.0;
		LEVEL 1 FOR 32820.0;
	}
}

TRANSITION_LIST("ncpuAS")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 610.0;
		LEVEL 0 FOR 310.0;
		LEVEL 1 FOR 100.0;
		LEVEL 0 FOR 260.0;
		LEVEL 1 FOR 40.0;
		LEVEL 0 FOR 120.0;
		LEVEL 1 FOR 31560.0;
	}
}

TRANSITION_LIST("ncpuLDS")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 760.0;
		LEVEL 0 FOR 160.0;
		LEVEL 1 FOR 240.0;
		LEVEL 0 FOR 120.0;
		LEVEL 1 FOR 31720.0;
	}
}

TRANSITION_LIST("ncpuUDS")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 760.0;
		LEVEL 0 FOR 160.0;
		LEVEL 1 FOR 440.0;
		LEVEL 0 FOR 80.0;
		LEVEL 1 FOR 31560.0;
	}
}

TRANSITION_LIST("nhSync")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("nvSync")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("nvramOE")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("nvramWE")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("pixClk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 825;
			LEVEL 0 FOR 20.0;
			LEVEL 1 FOR 20.0;
		}
	}
}

TRANSITION_LIST("ramSize[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 33000.0;
	}
}

TRANSITION_LIST("ramSize[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 33000.0;
	}
}

TRANSITION_LIST("ramSize[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 33000.0;
	}
}

TRANSITION_LIST("vidOut")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramAddr[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("vramData[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 0 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 0 FOR 420.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 2880.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 1920.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 1920.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 1 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 0 FOR 740.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 0 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 0 FOR 100.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 1 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 1 FOR 100.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1920.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 2560.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 0 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 0 FOR 420.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 2560.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 1 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 1 FOR 740.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 1920.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 0 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 1 FOR 420.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 2240.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 1920.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 1280.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 40.0;
	}
}

TRANSITION_LIST("vramData[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 320.0;
		LEVEL 1 FOR 40.0;
		LEVEL Z FOR 240.0;
		LEVEL 1 FOR 80.0;
		LEVEL Z FOR 280.0;
		LEVEL 0 FOR 40.0;
		LEVEL Z FOR 500.0;
		LEVEL 0 FOR 420.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 960.0;
		LEVEL 0 FOR 1920.0;
		LEVEL 1 FOR 2240.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 960.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 320.0;
		LEVEL 1 FOR 640.0;
		LEVEL 0 FOR 1920.0;
		LEVEL 1 FOR 1920.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 640.0;
		LEVEL 1 FOR 1280.0;
		LEVEL 0 FOR 2240.0;
		LEVEL 1 FOR 320.0;
		LEVEL 0 FOR 360.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|addrCache[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheHi[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|dataCacheLo[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|pendWriteHi")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("cpusnoop:cpusnp|pendWriteLo")
{
	NODE
	{
		REPEAT = 1;
		LEVEL U FOR 33000.0;
	}
}

TRANSITION_LIST("nvramCE0")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

TRANSITION_LIST("nvramCE1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 33000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
	CHILDREN = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[23]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 1;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[22]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 2;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[21]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 3;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[20]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 4;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[19]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 5;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[18]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 6;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[17]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[16]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[15]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[14]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 13;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuAddr[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 23;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuClk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 24;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 25;
	TREE_LEVEL = 0;
	CHILDREN = 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[15]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 26;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[14]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 27;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 28;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 29;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 30;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 31;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 32;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 33;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 34;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 35;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 36;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 37;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 38;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 39;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 40;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuData[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 41;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "cpuRnW";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 42;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nReset";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 43;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "ncpuAS";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 44;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "ncpuLDS";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 45;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "ncpuUDS";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 46;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nhSync";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 47;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nvSync";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 48;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nvramOE";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 49;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nvramWE";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 50;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "pixClk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 51;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "ramSize";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Octal;
	TREE_INDEX = 52;
	TREE_LEVEL = 0;
	CHILDREN = 53, 54, 55;
}

DISPLAY_LINE
{
	CHANNEL = "ramSize[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Octal;
	TREE_INDEX = 53;
	TREE_LEVEL = 1;
	PARENT = 52;
}

DISPLAY_LINE
{
	CHANNEL = "ramSize[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Octal;
	TREE_INDEX = 54;
	TREE_LEVEL = 1;
	PARENT = 52;
}

DISPLAY_LINE
{
	CHANNEL = "ramSize[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Octal;
	TREE_INDEX = 55;
	TREE_LEVEL = 1;
	PARENT = 52;
}

DISPLAY_LINE
{
	CHANNEL = "vidOut";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 56;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 57;
	TREE_LEVEL = 0;
	CHILDREN = 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[14]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 58;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 59;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 60;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 61;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 62;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 63;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 64;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 65;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 66;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 67;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 68;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 69;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 70;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 71;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramAddr[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 72;
	TREE_LEVEL = 1;
	PARENT = 57;
}

DISPLAY_LINE
{
	CHANNEL = "vramData";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 73;
	TREE_LEVEL = 0;
	CHILDREN = 74, 75, 76, 77, 78, 79, 80, 81;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 74;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 75;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 76;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 77;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 78;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 79;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 80;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "vramData[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 81;
	TREE_LEVEL = 1;
	PARENT = 73;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 82;
	TREE_LEVEL = 0;
	CHILDREN = 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 83;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 84;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 85;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 86;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 87;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 88;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 89;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 90;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 91;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 92;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 93;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 94;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 95;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|addrCache[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 96;
	TREE_LEVEL = 1;
	PARENT = 82;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 97;
	TREE_LEVEL = 0;
	CHILDREN = 98, 99, 100, 101, 102, 103, 104, 105;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 98;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 99;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 100;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 101;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 102;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 103;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 104;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheHi[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 105;
	TREE_LEVEL = 1;
	PARENT = 97;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 106;
	TREE_LEVEL = 0;
	CHILDREN = 107, 108, 109, 110, 111, 112, 113, 114;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 107;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 108;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 109;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 110;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 111;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 112;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 113;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|dataCacheLo[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 114;
	TREE_LEVEL = 1;
	PARENT = 106;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|pendWriteHi";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 115;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "cpusnoop:cpusnp|pendWriteLo";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 116;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nvramCE0";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 117;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "nvramCE1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 118;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 0;
	MASTER = TRUE;
}
;