Macintosh-HW
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Warp-LC
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Zane Kaminski 2021-10-29 06:04:52 -04:00
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# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.sch-bak
*~
_autosave-*
*.tmp
*-rescue.lib
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
*.DS_Store

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<html>
<head>
<title>Garrett's Workshop - Warp-LC Timing</title>
<style type="text/css">
ul {
margin-top: 0;
}
h3 {
margin-bottom: 0;
}
h2, h4 {
margin-bottom: 3px;
}
h3 + h4 {
margin-top:6px;
}
p {
margin-top:0;
}
ul li {
padding-top: 3px;
}
ul li sup {
line-height: 0;
}
</style>
<script src="https://cdnjs.cloudflare.com/ajax/libs/wavedrom/2.6.8/skins/default.js" type="text/javascript"></script>
<script src="https://cdnjs.cloudflare.com/ajax/libs/wavedrom/2.6.8/wavedrom.min.js" type="text/javascript"></script>
</head>
<body onload="WaveDrom.ProcessAll()">
<h1>Garrett's Workshop Warp-LC 33 MHz 68030 Accelerator Documentation</h1>
<h3 id="t0">1. Three consecutive reads - row activate, row hit, row miss, next hit</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '22222222222222222222222', data:['X',0,1,2,3,4,5,6,7,0,1,4,5,6,7,0,1,2,3,4,5,6,7,0]},
{name: 'FCLK', wave: 'p......................'},
{name: 'MCLK', wave: '10101010101010101010101', phase: 0.12, period:1.0},
{name: 'A', wave: 'x2......x2....x2......x', phase: 0.12, period:1.0},
{name: '/AS', wave: '.x0....x1x0..x1x0....x1', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '0101010101010101010101010101010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '22222222222222222222222', phase:0, data:[
'NOP','NOP','NOP','ACT','RD','RD','NOP','NOP','NOP','NOP','RD','RD','NOP','NOP','NOP','NOP','PC','ACT','RD','RD','NOP','NOP','NOP','NOP']},
{name: 'RCKE', wave: '1....0101..0101....0101', phase:0},
{name: 'RD', wave: 'z..........x.2.x.2.z...x.2.x.2.z.......x.2.x.2', phase:0, period:0.5},
{name: '/RDOE', wave: '1....0..1..0..1..0....1', phase:0},
{name: 'MCLK', wave: '10101010101010101010101', phase: 0.12, period:1.0},
{name: 'STERM', wave: '1.........x0..x1......x0..x1..........x0..x1..', phase:0, period:0.5},
]}</script><br/><p>
<h3 id="t0">1. Three consecutive reads - non-prefeteched read, two next hits, next hit after idle, row hit</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '22222222222222222222222222222222222', data:[7,0,1,2,3,4,5,6,7,0]},
{name: 'FCLK', wave: 'p..................................'},
{name: 'MCLK', wave: '10101010101010101010101010101010101', phase: 0.12, period:1.0},
{name: 'A', wave: '2...x2..x2..x2x2..x2....x2..x2x2..x', phase: 0.12, period:1.0},
{name: '/AS', wave: '0..x1x0x1x0x1..x0x1x0..x1x0x1..x0x1', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '0101010101010101010101010101010101010101010101010101010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '22222222222222222222222222222222222', phase:0, data:[
'RD','NOP','NOP','NOP','RD','NOP','NOP','NOP','RD','NOP','NOP','NOP','RD','NOP','RD','NOP','NOP','NOP','RD','NOP','RD','NOP']},
{name: 'RCKE', wave: '101......01..0101', phase:0},
{name: 'RD', wave: 'z..........x.2.z...x.2.z...x.2.x.2.z...x.2.x.2.', phase:0, period:0.5},
{name: '/RDOE', wave: '0...1x0.1', phase:0},
{name: 'MCLK', wave: '101010101', phase: 0.12, period:1.0},
{name: 'STERM', wave: '1.x0..x1..x0..x1..', phase:0, period:0.5},
]}</script><br/><p>
<h3 id="t0">2. Three consecutive writes - row activate, row hit, row miss</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '22222222222222222222', data:['X',0,1,4,5,6,7,0,1,4,5,6,7,0,1,4,5,6,7,0]},
{name: 'FCLK', wave: 'p...................'},
{name: 'MCLK', wave: '10101010101010101010', phase: 0.12, period:1.0},
{name: 'A', wave: 'x2....x2....x2....x2', phase: 0.12, period:1.0},
{name: '/AS', wave: '.x0..x1x0..x1x0..x1.', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '0101010101010101010101010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '22222222222222222222', phase:0, data:[
'NOP','NOP','NOP','ACT','WR','NOP','NOP','NOP','NOP','NOP','WR','NOP','NOP','NOP','PC','ACT','WR','NOP','NOP','NOP']},
{name: 'RCKE', wave: '1...................', phase:0},
{name: 'RD', wave: 'z.....x.2.xz......x.2.xz......x.2.xz....', phase:0, period:0.5},
{name: '/RDOE', wave: '1..0.1...0.1...0.1..', phase:0},
{name: 'MCLK', wave: '10101010101010101010', phase: 0.12, period:1.0},
{name: 'STERM', wave: '1..0.1...0.1...0.1..', phase:0},
]}</script><br/><p>
<h3 id="t0">3. MC68030 read row hit, then MC68030 changes its mind -- read, row activate, row hit, row miss</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '22222222222222222222222222222', data:['X',0,1,0,1,2,3,4,5,6,7,0,1,0,1,4,5,6,7,0,1,0,1,2,3,4,5,6,7,0]},
{name: 'FCLK', wave: 'p............................'},
{name: 'MCLK', wave: '10101010101010101010101010101', phase: 0.12, period:1.0},
{name: 'A', wave: 'x2x2......x2x2....x2x2......x', phase: 0.12, period:1.0},
{name: '/AS', wave: '1..x0....x1..x0..x1..x0....x1', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '0101010101010101010101010101010101010101010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '22222222222222222222222222222', phase:0, data:[
'NOP','NOP','RD','NOP','NOP','ACT','RD','NOP','NOP','NOP','NOP','NOP','RD','NOP','RD','NOP','NOP','NOP','NOP','NOP','RD','NOP','PC','ACT','RD','NOP','NOP','NOP','NOP']},
{name: 'RCKE', wave: '1......01......01........01..', phase:0},
{name: 'RD', wave: 'z......x.z.....x.2.z.......x.z.x.2.z..z....x.z.....x.2.z..', phase:0, period:0.5},
{name: '/RDOE', wave: '1....0.....1...0...1...0.....', phase:0},
{name: 'MCLK', wave: '10101010101010101010101010101', phase: 0.12, period:1.0},
{name: 'STERM', wave: '1......0.1.....0.1.......0.1.', phase:0},
]}</script><br/><p>
<h3 id="t0">4. MC68030 read row hit, then MC68030 changes its mind -- write, row miss</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '222222222', data:['X',0,1,0,1,2,3,4,5]},
{name: 'FCLK', wave: 'p........'},
{name: 'MCLK', wave: '101010101', phase: 0.12, period:1.0},
{name: 'A', wave: 'x2x2....x', phase: 0.12, period:1.0},
{name: '/AS', wave: '1..x0..x1', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '222222222', phase:0, data:[
'NOP','NOP','RD','NOP','PC','ACT','WR','NOP','NOP','NOP','NOP','NOP','RD','NOP','RD','NOP','NOP','NOP','NOP','NOP','RD','NOP','PC','ACT','RD','NOP','NOP','NOP','NOP']},
{name: 'RCKE', wave: '1........', phase:0},
{name: 'RD', wave: 'z......x.zx.2.x.z.', phase:0, period:0.5},
{name: '/RDOE', wave: '1....0.1.', phase:0},
{name: 'MCLK', wave: '101010101', phase: 0.12, period:1.0},
{name: 'STERM', wave: '1....0.1.', phase:0},
]}</script><br/><p>
<h3 id="t0">5. MC68030 idle afte read</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '22222222222', data:[5,6,7,0,1,0,1,0,1,0,1]},
{name: 'FCLK', wave: 'p..........'},
{name: 'MCLK', wave: '10101010101', phase: 0.12, period:1.0},
{name: 'A', wave: '2..........', phase: 0.12, period:1.0},
{name: '/AS', wave: '0x1........', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '0101010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '22222222222', phase:0, data:[
'NOP','NOP','NOP','NOP','RD','NOP','RD','NOP','RD','NOP','RD','NOP','NOP','NOP','RD','NOP','RD','NOP','NOP','NOP','NOP','NOP','RD','NOP','PC','ACT','RD','NOP','NOP','NOP','NOP']},
{name: 'RCKE', wave: '1..........', phase:0},
{name: 'RD', wave: '2.....xz...x.z.x.z.x.z', phase:0, period:0.5},
{name: '/RDOE', wave: '0..1........', phase:0},
]}</script><br/><p>
<h3 id="t0">6. MC68030 idle afte write</h3>
<script type="WaveDrom">{signal: [
{name: 'RS', wave: '22222222222', data:[5,6,7,0,1,0,1,0,1,0,1]},
{name: 'FCLK', wave: 'p..........'},
{name: 'MCLK', wave: '10101010101', phase: 0.12, period:1.0},
{name: 'A', wave: '2..........', phase: 0.12, period:1.0},
{name: '/AS', wave: '0x1........', phase: 0.12, period:1.0},
{name: 'RCLK', wave: '0101010101010101010101', phase:0, period:0.5},
{name: 'RCMD', wave: '22222222222', phase:0, data:[
'WR','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','NOP','PC','ACT','NOP','NOP','NOP','NOP','NOP']},
{name: 'RCKE', wave: '1..........', phase:0},
{name: 'RD', wave: '2.xz..................', phase:0, period:0.5},
{name: '/RDOE', wave: '01.........', phase:0},
]}</script><br/><p>
</body>
</html>

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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 2 7
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text HLabel 5250 4200 2 50 Output ~ 0
C16M
Text Label 4050 2600 0 50 ~ 0
D0
Text Label 4050 2700 0 50 ~ 0
D1
Text Label 4050 2800 0 50 ~ 0
D2
Text Label 4050 2900 0 50 ~ 0
D3
Text Label 4050 3000 0 50 ~ 0
D4
Text Label 4050 3100 0 50 ~ 0
D5
Text Label 4050 3200 0 50 ~ 0
D6
Text Label 4050 3300 0 50 ~ 0
D7
Text Label 4050 3400 0 50 ~ 0
D8
Text Label 4050 3500 0 50 ~ 0
D9
Text Label 4050 3600 0 50 ~ 0
D10
Text Label 4050 3700 0 50 ~ 0
D11
Text Label 4050 3800 0 50 ~ 0
D12
Text Label 4050 3900 0 50 ~ 0
D13
Text Label 4050 4000 0 50 ~ 0
D14
Text Label 4050 4100 0 50 ~ 0
D15
Wire Wire Line
4050 4100 4250 4100
Wire Wire Line
4050 4000 4250 4000
Wire Wire Line
4050 3900 4250 3900
Wire Wire Line
4050 3800 4250 3800
Wire Wire Line
4050 3700 4250 3700
Wire Wire Line
4050 3600 4250 3600
Wire Wire Line
4050 3500 4250 3500
Wire Wire Line
4050 3400 4250 3400
Wire Wire Line
4050 3300 4250 3300
Wire Wire Line
4050 3200 4250 3200
Wire Wire Line
4050 3100 4250 3100
Wire Wire Line
4050 3000 4250 3000
Wire Wire Line
4050 2900 4250 2900
Wire Wire Line
4050 2800 4250 2800
Wire Wire Line
4050 2700 4250 2700
Wire Wire Line
4050 2600 4250 2600
Wire Wire Line
1500 4100 1700 4100
Wire Wire Line
1500 4000 1700 4000
Wire Wire Line
1500 3900 1700 3900
Wire Wire Line
1500 3800 1700 3800
Wire Wire Line
1500 3700 1700 3700
Wire Wire Line
1500 3600 1700 3600
Wire Wire Line
1500 3500 1700 3500
Wire Wire Line
1500 3400 1700 3400
Wire Wire Line
1500 3300 1700 3300
Wire Wire Line
1500 3200 1700 3200
Wire Wire Line
1500 3100 1700 3100
Wire Wire Line
1500 3000 1700 3000
Wire Wire Line
1500 2900 1700 2900
Wire Wire Line
1500 2800 1700 2800
Wire Wire Line
1500 2700 1700 2700
Wire Wire Line
1500 2600 1700 2600
Entry Wire Line
1700 4100 1800 4200
Entry Wire Line
1700 4000 1800 4100
Entry Wire Line
1700 3900 1800 4000
Entry Wire Line
1700 3800 1800 3900
Entry Wire Line
1700 3700 1800 3800
Entry Wire Line
1700 3600 1800 3700
Entry Wire Line
1700 3500 1800 3600
Entry Wire Line
1700 3400 1800 3500
Entry Wire Line
1700 3300 1800 3400
Entry Wire Line
1700 3200 1800 3300
Entry Wire Line
1700 3100 1800 3200
Entry Wire Line
1700 3000 1800 3100
Entry Wire Line
1700 2900 1800 3000
Entry Wire Line
1700 2800 1800 2900
Entry Wire Line
1700 2700 1800 2800
Entry Wire Line
1700 2600 1800 2700
Text HLabel 1850 2600 2 50 Output ~ 0
A[31..0]
Wire Wire Line
1500 4800 1700 4800
Wire Wire Line
1500 4700 1700 4700
Wire Wire Line
1500 4600 1700 4600
Wire Wire Line
1500 4500 1700 4500
Wire Wire Line
1500 4400 1700 4400
Wire Wire Line
1500 4300 1700 4300
Wire Wire Line
1500 4200 1700 4200
Entry Wire Line
1700 4800 1800 4900
Entry Wire Line
1700 4700 1800 4800
Entry Wire Line
1700 4600 1800 4700
Entry Wire Line
1700 4500 1800 4600
Entry Wire Line
1700 4400 1800 4500
Entry Wire Line
1700 4300 1800 4400
Entry Wire Line
1700 4200 1800 4300
Text Label 1500 2600 0 50 ~ 0
A1
Text Label 1500 2700 0 50 ~ 0
A2
Text Label 1500 2800 0 50 ~ 0
A3
Text Label 1500 2900 0 50 ~ 0
A4
Text Label 1500 3000 0 50 ~ 0
A5
Text Label 1500 3100 0 50 ~ 0
A6
Text Label 1500 3200 0 50 ~ 0
A7
Text Label 1500 3300 0 50 ~ 0
A8
Text Label 1500 3400 0 50 ~ 0
A9
Text Label 1500 3500 0 50 ~ 0
A10
Text Label 1500 3600 0 50 ~ 0
A11
Text Label 1500 3700 0 50 ~ 0
A12
Text Label 1500 3800 0 50 ~ 0
A13
Text Label 1500 3900 0 50 ~ 0
A14
Text Label 1500 4000 0 50 ~ 0
A15
Text Label 1500 4100 0 50 ~ 0
A16
Text Label 1500 4200 0 50 ~ 0
A17
Text Label 1500 4300 0 50 ~ 0
A18
Text Label 1500 4400 0 50 ~ 0
A19
Text Label 1500 4500 0 50 ~ 0
A20
Text Label 1500 4600 0 50 ~ 0
A21
Text Label 1500 4700 0 50 ~ 0
A22
Text Label 1500 4800 0 50 ~ 0
A23
Connection ~ 2100 6400
$Comp
L Device:C_Small C?
U 1 1 616DE7BE
P 2100 6300
AR Path="/616DE7BE" Ref="C?" Part="1"
AR Path="/5F6DA71D/616DE7BE" Ref="C6" Part="1"
F 0 "C6" H 2150 6350 50 0000 L CNN
F 1 "10u" H 2150 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 2100 6300 50 0001 C CNN
F 3 "~" H 2100 6300 50 0001 C CNN
1 2100 6300
1 0 0 -1
$EndComp
Connection ~ 3300 6400
$Comp
L Device:C_Small C?
U 1 1 616DE7C5
P 3300 6300
AR Path="/616DE7C5" Ref="C?" Part="1"
AR Path="/5F6DA71D/616DE7C5" Ref="C9" Part="1"
F 0 "C9" H 3350 6350 50 0000 L CNN
F 1 "10u" H 3350 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 3300 6300 50 0001 C CNN
F 3 "~" H 3300 6300 50 0001 C CNN
1 3300 6300
1 0 0 -1
$EndComp
Wire Wire Line
1700 6400 2100 6400
Wire Wire Line
1300 6400 1700 6400
Connection ~ 1700 6400
Wire Wire Line
1300 6200 1700 6200
$Comp
L Device:C_Small C?
U 1 1 616DE7D1
P 1700 6300
AR Path="/616DE7D1" Ref="C?" Part="1"
AR Path="/5F6DA71D/616DE7D1" Ref="C5" Part="1"
F 0 "C5" H 1750 6350 50 0000 L CNN
F 1 "10u" H 1750 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 1700 6300 50 0001 C CNN
F 3 "~" H 1700 6300 50 0001 C CNN
1 1700 6300
1 0 0 -1
$EndComp
Wire Wire Line
2900 6400 3300 6400
Connection ~ 2900 6400
$Comp
L Device:C_Small C?
U 1 1 616DE7DB
P 2900 6300
AR Path="/616DE7DB" Ref="C?" Part="1"
AR Path="/5F6DA71D/616DE7DB" Ref="C8" Part="1"
F 0 "C8" H 2950 6350 50 0000 L CNN
F 1 "10u" H 2950 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 2900 6300 50 0001 C CNN
F 3 "~" H 2900 6300 50 0001 C CNN
1 2900 6300
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C?
U 1 1 616DE7E8
P 1300 6300
AR Path="/616DE7E8" Ref="C?" Part="1"
AR Path="/5F6DA71D/616DE7E8" Ref="C4" Part="1"
F 0 "C4" H 1350 6350 50 0000 L CNN
F 1 "10u" H 1350 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 1300 6300 50 0001 C CNN
F 3 "~" H 1300 6300 50 0001 C CNN
1 1300 6300
1 0 0 -1
$EndComp
Wire Wire Line
2500 6400 2900 6400
Wire Wire Line
2100 6400 2500 6400
Connection ~ 2500 6400
Wire Wire Line
2100 6200 2500 6200
$Comp
L Device:C_Small C?
U 1 1 616DE7F4
P 2500 6300
AR Path="/616DE7F4" Ref="C?" Part="1"
AR Path="/5F6DA71D/616DE7F4" Ref="C7" Part="1"
F 0 "C7" H 2550 6350 50 0000 L CNN
F 1 "10u" H 2550 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 2500 6300 50 0001 C CNN
F 3 "~" H 2500 6300 50 0001 C CNN
1 2500 6300
1 0 0 -1
$EndComp
$Comp
L power:+5V #PWR0110
U 1 1 616E93B6
P 1300 6200
F 0 "#PWR0110" H 1300 6050 50 0001 C CNN
F 1 "+5V" H 1300 6350 50 0000 C CNN
F 2 "" H 1300 6200 50 0001 C CNN
F 3 "" H 1300 6200 50 0001 C CNN
1 1300 6200
1 0 0 -1
$EndComp
Connection ~ 1300 6200
$Comp
L power:-12V #PWR0111
U 1 1 616F1447
P 3700 6200
F 0 "#PWR0111" H 3700 6300 50 0001 C CNN
F 1 "-12V" H 3700 6350 50 0000 C CNN
F 2 "" H 3700 6200 50 0001 C CNN
F 3 "" H 3700 6200 50 0001 C CNN
1 3700 6200
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 616F27A0
P 4100 6400
AR Path="/616F27A0" Ref="#PWR?" Part="1"
AR Path="/5F6DA71D/616F27A0" Ref="#PWR0112" Part="1"
F 0 "#PWR0112" H 4100 6150 50 0001 C CNN
F 1 "GND" H 4100 6250 50 0000 C CNN
F 2 "" H 4100 6400 50 0001 C CNN
F 3 "" H 4100 6400 50 0001 C CNN
1 4100 6400
-1 0 0 -1
$EndComp
Connection ~ 4100 6400
$Comp
L Device:C_Small C?
U 1 1 616F27A7
P 4100 6300
AR Path="/616F27A7" Ref="C?" Part="1"
AR Path="/5F6DA71D/616F27A7" Ref="C11" Part="1"
F 0 "C11" H 4150 6350 50 0000 L CNN
F 1 "10u" H 4150 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 4100 6300 50 0001 C CNN
F 3 "~" H 4100 6300 50 0001 C CNN
1 4100 6300
1 0 0 -1
$EndComp
Wire Wire Line
3700 6400 4100 6400
Connection ~ 3700 6400
Wire Wire Line
3700 6200 4100 6200
Connection ~ 3700 6200
$Comp
L Device:C_Small C?
U 1 1 616F27B1
P 3700 6300
AR Path="/616F27B1" Ref="C?" Part="1"
AR Path="/5F6DA71D/616F27B1" Ref="C10" Part="1"
F 0 "C10" H 3750 6350 50 0000 L CNN
F 1 "10u" H 3750 6250 50 0000 L CNN
F 2 "stdpads:C_0805" H 3700 6300 50 0001 C CNN
F 3 "~" H 3700 6300 50 0001 C CNN
1 3700 6300
1 0 0 -1
$EndComp
Wire Wire Line
3300 6400 3700 6400
$Comp
L power:-5V #PWR0113
U 1 1 616FD697
P 2100 6200
F 0 "#PWR0113" H 2100 6300 50 0001 C CNN
F 1 "-5V" H 2100 6350 50 0000 C CNN
F 2 "" H 2100 6200 50 0001 C CNN
F 3 "" H 2100 6200 50 0001 C CNN
1 2100 6200
1 0 0 -1
$EndComp
Connection ~ 2100 6200
Wire Wire Line
2900 6200 3300 6200
$Comp
L power:+12V #PWR0114
U 1 1 616F0982
P 2900 6200
F 0 "#PWR0114" H 2900 6050 50 0001 C CNN
F 1 "+12V" H 2900 6350 50 0000 C CNN
F 2 "" H 2900 6200 50 0001 C CNN
F 3 "" H 2900 6200 50 0001 C CNN
1 2900 6200
1 0 0 -1
$EndComp
Connection ~ 2900 6200
Entry Wire Line
4250 2600 4350 2700
Entry Wire Line
4250 2700 4350 2800
Entry Wire Line
4250 2800 4350 2900
Entry Wire Line
4250 2900 4350 3000
Entry Wire Line
4250 3000 4350 3100
Entry Wire Line
4250 3100 4350 3200
Entry Wire Line
4250 3200 4350 3300
Entry Wire Line
4250 3300 4350 3400
Entry Wire Line
4250 3400 4350 3500
Entry Wire Line
4250 3500 4350 3600
Entry Wire Line
4250 3600 4350 3700
Entry Wire Line
4250 3700 4350 3800
Entry Wire Line
4250 3800 4350 3900
Entry Wire Line
4250 3900 4350 4000
Entry Wire Line
4250 4000 4350 4100
Entry Wire Line
4250 4100 4350 4200
Text HLabel 5650 3300 0 50 Output ~ 0
~AS~
Text HLabel 5650 3400 0 50 Output ~ 0
~DS~
Text HLabel 5650 3600 0 50 Input ~ 0
~BERR~
Text HLabel 5650 3800 0 50 Input ~ 0
~DSACK~0
Text HLabel 5650 3900 0 50 Input ~ 0
~DSACK~1
Text HLabel 5650 2700 0 50 Output ~ 0
R~W~
Text HLabel 5650 2500 0 50 Output ~ 0
SIZ[1..0]
Text HLabel 5650 3700 0 50 Input ~ 0
~HALT~
Text HLabel 5650 3500 0 50 BiDi ~ 0
~RESET~
Text HLabel 5650 2800 0 50 Output ~ 0
FC[2..0]
Text HLabel 5650 2600 0 50 Output ~ 0
~RMC~
Text Label 4050 4200 0 50 ~ 0
D16
Text Label 4050 4300 0 50 ~ 0
D17
Text Label 4050 4400 0 50 ~ 0
D18
Text Label 4050 4500 0 50 ~ 0
D19
Text Label 4050 4600 0 50 ~ 0
D20
Text Label 4050 4700 0 50 ~ 0
D21
Text Label 4050 4800 0 50 ~ 0
D22
Text Label 4050 4900 0 50 ~ 0
D23
Text Label 4050 5000 0 50 ~ 0
D24
Text Label 4050 5100 0 50 ~ 0
D25
Text Label 4050 5200 0 50 ~ 0
D26
Text Label 4050 5300 0 50 ~ 0
D27
Text Label 4050 5400 0 50 ~ 0
D28
Text Label 4050 5500 0 50 ~ 0
D29
Text Label 4050 5600 0 50 ~ 0
D30
Text Label 4050 5700 0 50 ~ 0
D31
Wire Wire Line
4050 5700 4250 5700
Wire Wire Line
4050 5600 4250 5600
Wire Wire Line
4050 5500 4250 5500
Wire Wire Line
4050 5400 4250 5400
Wire Wire Line
4050 5300 4250 5300
Wire Wire Line
4050 5200 4250 5200
Wire Wire Line
4050 5100 4250 5100
Wire Wire Line
4050 5000 4250 5000
Wire Wire Line
4050 4900 4250 4900
Wire Wire Line
4050 4800 4250 4800
Wire Wire Line
4050 4700 4250 4700
Wire Wire Line
4050 4600 4250 4600
Wire Wire Line
4050 4500 4250 4500
Wire Wire Line
4050 4400 4250 4400
Wire Wire Line
4050 4300 4250 4300
Wire Wire Line
4050 4200 4250 4200
Entry Wire Line
4250 4200 4350 4300
Entry Wire Line
4250 4300 4350 4400
Entry Wire Line
4250 4400 4350 4500
Entry Wire Line
4250 4500 4350 4600
Entry Wire Line
4250 4600 4350 4700
Entry Wire Line
4250 4700 4350 4800
Entry Wire Line
4250 4800 4350 4900
Entry Wire Line
4250 4900 4350 5000
Entry Wire Line
4250 5000 4350 5100
Entry Wire Line
4250 5100 4350 5200
Entry Wire Line
4250 5200 4350 5300
Entry Wire Line
4250 5300 4350 5400
Entry Wire Line
4250 5400 4350 5500
Entry Wire Line
4250 5500 4350 5600
Entry Wire Line
4250 5600 4350 5700
Entry Wire Line
4250 5700 4350 5800
Text HLabel 4400 2700 2 50 BiDi ~ 0
D[31..0]
Wire Wire Line
1500 2500 1700 2500
Text Label 1500 2500 0 50 ~ 0
A0
Entry Wire Line
1700 2500 1800 2600
Wire Bus Line
1850 2600 1800 2600
Wire Bus Line
4400 2700 4350 2700
Wire Wire Line
1500 5200 1700 5200
Wire Wire Line
1500 5100 1700 5100
Wire Wire Line
1500 5000 1700 5000
Entry Wire Line
1700 5200 1800 5300
Entry Wire Line
1700 5100 1800 5200
Entry Wire Line
1700 5000 1800 5100
Entry Wire Line
1700 4900 1800 5000
Text Label 1500 5000 0 50 ~ 0
A25
Text Label 1500 5100 0 50 ~ 0
A26
Text Label 1500 5200 0 50 ~ 0
A27
Wire Wire Line
1500 4900 1700 4900
Text Label 1500 4900 0 50 ~ 0
A24
Wire Wire Line
2400 3450 2600 3450
Wire Wire Line
2400 3350 2600 3350
Entry Wire Line
2600 3450 2700 3550
Entry Wire Line
2600 3350 2700 3450
Text HLabel 2750 3350 2 50 Output ~ 0
~IPL~[2..0]
Wire Wire Line
2400 3250 2600 3250
Text Label 2400 3250 0 50 ~ 0
~IPL~2
Entry Wire Line
2600 3250 2700 3350
Wire Bus Line
2750 3350 2700 3350
Text Label 2400 3350 0 50 ~ 0
~IPL~1
Text Label 2400 3450 0 50 ~ 0
~IPL~0
Wire Wire Line
1500 5400 1700 5400
Wire Wire Line
1500 5300 1700 5300
Entry Wire Line
1700 5400 1800 5500
Entry Wire Line
1700 5300 1800 5400
Text Label 1500 5300 0 50 ~ 0
A30
Text Label 1500 5400 0 50 ~ 0
A31
Wire Bus Line
2700 3350 2700 3550
Wire Bus Line
1800 2600 1800 5500
Wire Bus Line
4350 2700 4350 5800
$EndSCHEMATC

1881
PDSBuf.sch Normal file
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560
RAM.sch Normal file
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@ -0,0 +1,560 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 4 7
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Label 2400 2500 2 50 ~ 0
RA0
Text Label 2400 2600 2 50 ~ 0
RA1
Text Label 2400 2700 2 50 ~ 0
RA2
Text Label 2400 2900 2 50 ~ 0
RA4
Text Label 2400 2800 2 50 ~ 0
RA3
Text Label 2400 3000 2 50 ~ 0
RA5
$Comp
L GW_RAM:SDRAM-16Mx16-TSOP2-54 U4
U 1 1 6326A531
P 2900 3200
F 0 "U4" H 2900 4350 50 0000 C CNN
F 1 "W9825G6KH-6" V 2900 3200 50 0000 C CNN
F 2 "stdpads:Winbond_TSOPII-54" H 2900 1550 50 0001 C CIN
F 3 "" H 2900 2950 50 0001 C CNN
1 2900 3200
1 0 0 -1
$EndComp
Text Label 2400 3100 2 50 ~ 0
RA6
Text Label 2400 3200 2 50 ~ 0
RA7
Text Label 2400 3300 2 50 ~ 0
RA8
Text Label 2400 3400 2 50 ~ 0
RA9
Text Label 2400 3500 2 50 ~ 0
RA10
Text Label 2400 3600 2 50 ~ 0
RA11
Text Label 2400 3700 2 50 ~ 0
RA12
Text Label 2400 3800 2 50 ~ 0
BA0
Text Label 2400 3900 2 50 ~ 0
BA1
Text Label 3400 2200 0 50 ~ 0
D0
Text Label 3400 2300 0 50 ~ 0
D1
Text Label 3400 2400 0 50 ~ 0
D2
Text Label 3400 2500 0 50 ~ 0
D3
Text Label 3400 2600 0 50 ~ 0
D4
Text Label 3400 2700 0 50 ~ 0
D5
Text Label 3400 2800 0 50 ~ 0
D6
Text Label 3400 2900 0 50 ~ 0
D7
Text Label 3400 3000 0 50 ~ 0
D8
Text Label 3400 3100 0 50 ~ 0
D9
Text Label 3400 3200 0 50 ~ 0
D10
Text Label 3400 3300 0 50 ~ 0
D11
Text Label 3400 3400 0 50 ~ 0
D12
Text Label 3400 3500 0 50 ~ 0
D13
Text Label 3400 3600 0 50 ~ 0
D14
Text Label 3400 3700 0 50 ~ 0
D15
Text Label 3400 3800 0 50 ~ 0
DQM0
Text Label 3400 3900 0 50 ~ 0
DQM1
Text HLabel 3400 4200 2 50 Input ~ 0
~CS~
Text HLabel 3400 4300 2 50 Input ~ 0
~WE~
Text HLabel 3400 4400 2 50 Input ~ 0
~CAS~
Text HLabel 3400 4500 2 50 Input ~ 0
~RAS~
Text HLabel 2400 4100 0 50 Input ~ 0
CKE
Text HLabel 2400 4200 0 50 Input ~ 0
CLK01
$Comp
L power:GND #PWR0126
U 1 1 632755E1
P 2400 4500
F 0 "#PWR0126" H 2400 4250 50 0001 C CNN
F 1 "GND" H 2400 4350 50 0000 C CNN
F 2 "" H 2400 4500 50 0001 C CNN
F 3 "" H 2400 4500 50 0001 C CNN
1 2400 4500
1 0 0 -1
$EndComp
Wire Wire Line
2400 4500 2400 4400
$Comp
L power:+3V3 #PWR0127
U 1 1 632761AA
P 2400 2200
F 0 "#PWR0127" H 2400 2050 50 0001 C CNN
F 1 "+3V3" H 2400 2350 50 0000 C CNN
F 2 "" H 2400 2200 50 0001 C CNN
F 3 "" H 2400 2200 50 0001 C CNN
1 2400 2200
1 0 0 -1
$EndComp
Wire Wire Line
2400 2200 2400 2300
Wire Wire Line
3400 3700 3600 3700
Entry Wire Line
3600 3700 3700 3800
Wire Wire Line
3400 3600 3600 3600
Entry Wire Line
3600 3600 3700 3700
Wire Wire Line
3400 3500 3600 3500
Entry Wire Line
3600 3500 3700 3600
Wire Wire Line
3400 3400 3600 3400
Entry Wire Line
3600 3400 3700 3500
Wire Wire Line
3400 3300 3600 3300
Entry Wire Line
3600 3300 3700 3400
Wire Wire Line
3400 3200 3600 3200
Entry Wire Line
3600 3200 3700 3300
Wire Wire Line
3400 3100 3600 3100
Entry Wire Line
3600 3100 3700 3200
Wire Wire Line
3400 3000 3600 3000
Entry Wire Line
3600 3000 3700 3100
Wire Wire Line
3400 2900 3600 2900
Entry Wire Line
3600 2900 3700 3000
Wire Wire Line
3400 2800 3600 2800
Entry Wire Line
3600 2800 3700 2900
Wire Wire Line
3400 2700 3600 2700
Entry Wire Line
3600 2700 3700 2800
Wire Wire Line
3400 2600 3600 2600
Entry Wire Line
3600 2600 3700 2700
Wire Wire Line
3400 2500 3600 2500
Entry Wire Line
3600 2500 3700 2600
Wire Wire Line
3400 2400 3600 2400
Entry Wire Line
3600 2400 3700 2500
Wire Wire Line
3400 2300 3600 2300
Entry Wire Line
3600 2300 3700 2400
Wire Wire Line
3400 2200 3600 2200
Entry Wire Line
3600 2200 3700 2300
Wire Wire Line
3400 3900 3600 3900
Entry Wire Line
3600 3900 3700 4000
Wire Wire Line
3400 3800 3600 3800
Entry Wire Line
3600 3800 3700 3900
Wire Wire Line
2400 3900 2200 3900
Entry Wire Line
2200 3900 2100 4000
Wire Wire Line
2400 3800 2200 3800
Entry Wire Line
2200 3800 2100 3900
Wire Wire Line
2400 3700 2200 3700
Entry Wire Line
2200 3700 2100 3800
Wire Wire Line
2400 3600 2200 3600
Entry Wire Line
2200 3600 2100 3700
Wire Wire Line
2400 3500 2200 3500
Entry Wire Line
2200 3500 2100 3600
Wire Wire Line
2400 3400 2200 3400
Entry Wire Line
2200 3400 2100 3500
Wire Wire Line
2400 3300 2200 3300
Entry Wire Line
2200 3300 2100 3400
Wire Wire Line
2400 3200 2200 3200
Entry Wire Line
2200 3200 2100 3300
Wire Wire Line
2400 3100 2200 3100
Entry Wire Line
2200 3100 2100 3200
Wire Wire Line
2400 3000 2200 3000
Entry Wire Line
2200 3000 2100 3100
Wire Wire Line
2400 2900 2200 2900
Entry Wire Line
2200 2900 2100 3000
Wire Wire Line
2400 2800 2200 2800
Entry Wire Line
2200 2800 2100 2900
Wire Wire Line
2400 2700 2200 2700
Entry Wire Line
2200 2700 2100 2800
Wire Wire Line
2400 2600 2200 2600
Entry Wire Line
2200 2600 2100 2700
Wire Wire Line
2400 2500 2200 2500
Entry Wire Line
2200 2500 2100 2600
Wire Bus Line
3700 3900 3700 4000
Wire Bus Line
2100 3900 2100 4000
Wire Bus Line
3700 2300 3750 2300
Wire Bus Line
2100 2600 2050 2600
Wire Bus Line
2100 3900 2050 3900
Text HLabel 4250 2600 0 50 Input ~ 0
RA[12..0]
Text HLabel 3750 2300 2 50 BiDi ~ 0
D[31..0]
Text HLabel 5950 2300 2 50 BiDi ~ 0
D[31..0]
Wire Bus Line
4300 3900 4250 3900
Wire Bus Line
4300 2600 4250 2600
Connection ~ 4600 2200
Wire Bus Line
5900 2300 5950 2300
Wire Bus Line
5900 3900 5900 4000
Wire Bus Line
4300 4000 4300 3900
Entry Wire Line
4400 2500 4300 2600
Wire Wire Line
4600 2500 4400 2500
Entry Wire Line
4400 2600 4300 2700
Wire Wire Line
4600 2600 4400 2600
Entry Wire Line
4400 2700 4300 2800
Wire Wire Line
4600 2700 4400 2700
Entry Wire Line
4400 2800 4300 2900
Wire Wire Line
4600 2800 4400 2800
Entry Wire Line
4400 2900 4300 3000
Wire Wire Line
4600 2900 4400 2900
Entry Wire Line
4400 3000 4300 3100
Wire Wire Line
4600 3000 4400 3000
Entry Wire Line
4400 3100 4300 3200
Wire Wire Line
4600 3100 4400 3100
Entry Wire Line
4400 3200 4300 3300
Wire Wire Line
4600 3200 4400 3200
Entry Wire Line
4400 3300 4300 3400
Wire Wire Line
4600 3300 4400 3300
Entry Wire Line
4400 3400 4300 3500
Wire Wire Line
4600 3400 4400 3400
Entry Wire Line
4400 3500 4300 3600
Wire Wire Line
4600 3500 4400 3500
Entry Wire Line
4400 3600 4300 3700
Wire Wire Line
4600 3600 4400 3600
Entry Wire Line
4400 3700 4300 3800
Wire Wire Line
4600 3700 4400 3700
Entry Wire Line
4400 3800 4300 3900
Wire Wire Line
4600 3800 4400 3800
Entry Wire Line
4400 3900 4300 4000
Wire Wire Line
4600 3900 4400 3900
Entry Wire Line
5800 3800 5900 3900
Wire Wire Line
5600 3800 5800 3800
Entry Wire Line
5800 3900 5900 4000
Wire Wire Line
5600 3900 5800 3900
Entry Wire Line
5800 3000 5900 3100
Wire Wire Line
5600 3000 5800 3000
Entry Wire Line
5800 3100 5900 3200
Wire Wire Line
5600 3100 5800 3100
Entry Wire Line
5800 3200 5900 3300
Wire Wire Line
5600 3200 5800 3200
Entry Wire Line
5800 3300 5900 3400
Wire Wire Line
5600 3300 5800 3300
Entry Wire Line
5800 3400 5900 3500
Wire Wire Line
5600 3400 5800 3400
Entry Wire Line
5800 3500 5900 3600
Wire Wire Line
5600 3500 5800 3500
Entry Wire Line
5800 3600 5900 3700
Wire Wire Line
5600 3600 5800 3600
Entry Wire Line
5800 3700 5900 3800
Wire Wire Line
5600 3700 5800 3700
Entry Wire Line
5800 2200 5900 2300
Wire Wire Line
5600 2200 5800 2200
Entry Wire Line
5800 2300 5900 2400
Wire Wire Line
5600 2300 5800 2300
Entry Wire Line
5800 2400 5900 2500
Wire Wire Line
5600 2400 5800 2400
Entry Wire Line
5800 2500 5900 2600
Wire Wire Line
5600 2500 5800 2500
Entry Wire Line
5800 2600 5900 2700
Wire Wire Line
5600 2600 5800 2600
Entry Wire Line
5800 2700 5900 2800
Wire Wire Line
5600 2700 5800 2700
Entry Wire Line
5800 2800 5900 2900
Wire Wire Line
5600 2800 5800 2800
Entry Wire Line
5800 2900 5900 3000
Wire Wire Line
5600 2900 5800 2900
Wire Wire Line
4600 2200 4600 2300
$Comp
L power:+3V3 #PWR0128
U 1 1 63276882
P 4600 2200
F 0 "#PWR0128" H 4600 2050 50 0001 C CNN
F 1 "+3V3" H 4600 2350 50 0000 C CNN
F 2 "" H 4600 2200 50 0001 C CNN
F 3 "" H 4600 2200 50 0001 C CNN
1 4600 2200
1 0 0 -1
$EndComp
Connection ~ 4600 4500
Wire Wire Line
4600 4500 4600 4400
$Comp
L power:GND #PWR0129
U 1 1 63274829
P 4600 4500
F 0 "#PWR0129" H 4600 4250 50 0001 C CNN
F 1 "GND" H 4600 4350 50 0000 C CNN
F 2 "" H 4600 4500 50 0001 C CNN
F 3 "" H 4600 4500 50 0001 C CNN
1 4600 4500
1 0 0 -1
$EndComp
Text HLabel 4600 4200 0 50 Input ~ 0
CLK23
Text HLabel 4600 4100 0 50 Input ~ 0
CKE
Text HLabel 5600 4500 2 50 Input ~ 0
~RAS~
Text HLabel 5600 4400 2 50 Input ~ 0
~CAS~
Text HLabel 5600 4300 2 50 Input ~ 0
~WE~
Text HLabel 5600 4200 2 50 Input ~ 0
~CS~
Text Label 5600 3700 0 50 ~ 0
D31
Text Label 5600 3600 0 50 ~ 0
D30
Text Label 5600 3500 0 50 ~ 0
D29
Text Label 5600 3400 0 50 ~ 0
D28
Text Label 5600 3300 0 50 ~ 0
D27
Text Label 5600 3200 0 50 ~ 0
D26
Text Label 5600 3100 0 50 ~ 0
D25
Text Label 5600 3000 0 50 ~ 0
D24
Text Label 5600 2900 0 50 ~ 0
D23
Text Label 5600 2800 0 50 ~ 0
D22
Text Label 5600 2700 0 50 ~ 0
D21
Text Label 5600 2600 0 50 ~ 0
D20
Text Label 5600 2500 0 50 ~ 0
D19
Text Label 5600 2400 0 50 ~ 0
D18
Text Label 5600 2300 0 50 ~ 0
D17
Text Label 5600 2200 0 50 ~ 0
D16
Text Label 5600 3900 0 50 ~ 0
DQM3
Text Label 5600 3800 0 50 ~ 0
DQM2
Text Label 4600 3900 2 50 ~ 0
BA1
Text Label 4600 3800 2 50 ~ 0
BA0
Text Label 4600 3700 2 50 ~ 0
RA12
Text Label 4600 3600 2 50 ~ 0
RA11
Text Label 4600 3500 2 50 ~ 0
RA10
Text Label 4600 3400 2 50 ~ 0
RA9
Text Label 4600 3300 2 50 ~ 0
RA8
Text Label 4600 3200 2 50 ~ 0
RA7
Text Label 4600 3100 2 50 ~ 0
RA6
Text Label 4600 3000 2 50 ~ 0
RA5
Text Label 4600 2800 2 50 ~ 0
RA3
Text Label 4600 2900 2 50 ~ 0
RA4
Text Label 4600 2700 2 50 ~ 0
RA2
Text Label 4600 2600 2 50 ~ 0
RA1
Text Label 4600 2500 2 50 ~ 0
RA0
Text HLabel 2050 2600 0 50 Input ~ 0
RA[12..0]
Text HLabel 2050 3900 0 50 Input ~ 0
BA[1..0]
Text HLabel 4250 3900 0 50 Input ~ 0
BA[1..0]
Wire Bus Line
3700 4000 3750 4000
Wire Bus Line
5900 4000 5950 4000
Text HLabel 3750 4000 2 50 Input ~ 0
DQM[3..0]
Text HLabel 5950 4000 2 50 Input ~ 0
DQM[3..0]
$Comp
L GW_RAM:SDRAM-16Mx16-TSOP2-54 U5
U 1 1 6327223F
P 5100 3200
F 0 "U5" H 5100 4350 50 0000 C CNN
F 1 "W9825G6KH-6" V 5100 3200 50 0000 C CNN
F 2 "stdpads:Winbond_TSOPII-54" H 5100 1550 50 0001 C CIN
F 3 "" H 5100 2950 50 0001 C CNN
1 5100 3200
1 0 0 -1
$EndComp
Wire Bus Line
3700 2300 3700 3800
Wire Bus Line
2100 2600 2100 3800
Wire Bus Line
4300 2600 4300 3800
Wire Bus Line
5900 2300 5900 3800
$EndSCHEMATC

856
SE-030-cache.lib Normal file
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@ -0,0 +1,856 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_Small
#
DEF Device_R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "Device_R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 50 50 1 1 P
X ~ 2 0 -100 30 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# FPGA_Xilinx_Spartan6_XC6SLX9-FTG256
#
DEF FPGA_Xilinx_Spartan6_XC6SLX9-FTG256 U 0 40 Y Y 4 L N
F0 "U" 0 50 50 H V C CNN
F1 "FPGA_Xilinx_Spartan6_XC6SLX9-FTG256" 0 -50 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H V C CNN
DRAW
S -1750 2850 1750 -3100 1 1 10 f
S -1750 2850 1750 -3100 2 1 10 f
S -1250 600 1250 -600 3 1 10 f
S -750 1200 750 -1200 4 1 10 f
X IO_L35N_GCLK16_0 A10 -2000 400 250 R 50 50 1 1 B
X IO_L39N_0 A11 -2000 -400 250 R 50 50 1 1 B
X IO_L62N_VREF_0 A12 -2000 -800 250 R 50 50 1 1 B
X IO_L63N_SCP6_0 A13 -2000 -1000 250 R 50 50 1 1 B
X IO_L65N_SCP2_0 A14 -2000 -1400 250 R 50 50 1 1 B
X IO_L1N_VREF_0 A4 -2000 2200 250 R 50 50 1 1 B
X IO_L2N_0 A5 -2000 2000 250 R 50 50 1 1 B
X IO_L4N_0 A6 -2000 1600 250 R 50 50 1 1 B
X IO_L6N_0 A7 -2000 1200 250 R 50 50 1 1 B
X IO_L33N_0 A8 -2000 800 250 R 50 50 1 1 B
X IO_L34N_GCLK18_0 A9 -2000 600 250 R 50 50 1 1 B
X IO_L35P_GCLK17_0 B10 -2000 500 250 R 50 50 1 1 B
X IO_L62P_0 B12 -2000 -700 250 R 50 50 1 1 B
X VCCO_0 B13 -1400 3100 250 D 50 50 1 1 W
X IO_L65P_SCP3_0 B14 -2000 -1300 250 R 50 50 1 1 B
X IO_L29P_A23_M1A13_1 B15 2000 2100 250 L 50 50 1 1 B
X IO_L29N_A22_M1A14_1 B16 2000 2000 250 L 50 50 1 1 B
X VCCO_0 B4 -1600 3100 250 D 50 50 1 1 W
X IO_L2P_0 B5 -2000 2100 250 R 50 50 1 1 B
X IO_L4P_0 B6 -2000 1700 250 R 50 50 1 1 B
X IO_L33P_0 B8 -2000 900 250 R 50 50 1 1 B
X VCCO_0 B9 -1500 3100 250 D 50 50 1 1 W
X IO_L37N_GCLK12_0 C10 -2000 0 250 R 50 50 1 1 B
X IO_L39P_0 C11 -2000 -300 250 R 50 50 1 1 B
X IO_L63P_SCP7_0 C13 -2000 -900 250 R 50 50 1 1 B
X IO_L33P_A15_M1A10_1 C15 2000 1300 250 L 50 50 1 1 B
X IO_L33N_A14_M1A4_1 C16 2000 1200 250 L 50 50 1 1 B
X IO_L1P_HSWAPEN_0 C4 -2000 2300 250 R 50 50 1 1 B
X IO_L3N_0 C5 -2000 1800 250 R 50 50 1 1 B
X IO_L7N_0 C6 -2000 1000 250 R 50 50 1 1 B
X IO_L6P_0 C7 -2000 1300 250 R 50 50 1 1 B
X IO_L38N_VREF_0 C8 -2000 -200 250 R 50 50 1 1 B
X IO_L34P_GCLK19_0 C9 -2000 700 250 R 50 50 1 1 B
X VCCO_0 D10 -1200 3100 250 D 50 50 1 1 W
X IO_L66P_SCP1_0 D11 -2000 -1500 250 R 50 50 1 1 B
X IO_L66N_SCP0_0 D12 -2000 -1600 250 R 50 50 1 1 B
X IO_L31P_A19_M1CKE_1 D14 2000 1700 250 L 50 50 1 1 B
X VCCO_1 D15 1100 3100 250 D 50 50 1 1 W
X IO_L31N_A18_M1A12_1 D16 2000 1600 250 L 50 50 1 1 B
X IO_L3P_0 D5 -2000 1900 250 R 50 50 1 1 B
X IO_L7P_0 D6 -2000 1100 250 R 50 50 1 1 B
X VCCO_0 D7 -1300 3100 250 D 50 50 1 1 W
X IO_L38P_0 D8 -2000 -100 250 R 50 50 1 1 B
X IO_L40N_0 D9 -2000 -600 250 R 50 50 1 1 B
X IO_L37P_GCLK13_0 E10 -2000 100 250 R 50 50 1 1 B
X IO_L64N_SCP4_0 E11 -2000 -1200 250 R 50 50 1 1 B
X IO_L1N_A24_VREF_1 E12 2000 2200 250 L 50 50 1 1 B
X IO_L1P_A25_1 E13 2000 2300 250 L 50 50 1 1 B
X IO_L34P_A13_M1WE_1 E15 2000 1100 250 L 50 50 1 1 B
X IO_L34N_A12_M1BA2_1 E16 2000 1000 250 L 50 50 1 1 B
X IO_L5N_0 E6 -2000 1400 250 R 50 50 1 1 B
X IO_L36P_GCLK15_0 E7 -2000 300 250 R 50 50 1 1 B
X IO_L36N_GCLK14_0 E8 -2000 200 250 R 50 50 1 1 B
X IO_L64P_SCP5_0 F10 -2000 -1100 250 R 50 50 1 1 B
X IO_L30P_A21_M1RESET_1 F12 2000 1900 250 L 50 50 1 1 B
X IO_L32P_A17_M1A8_1 F13 2000 1500 250 L 50 50 1 1 B
X IO_L32N_A16_M1A9_1 F14 2000 1400 250 L 50 50 1 1 B
X IO_L35P_A11_M1A7_1 F15 2000 900 250 L 50 50 1 1 B
X IO_L35N_A10_M1A2_1 F16 2000 800 250 L 50 50 1 1 B
X IO_L5P_0 F7 -2000 1500 250 R 50 50 1 1 B
X IO_L40P_0 F9 -2000 -500 250 R 50 50 1 1 B
X IO_L30N_A20_M1A11_1 G11 2000 1800 250 L 50 50 1 1 B
X IO_L38P_A5_M1CLK_1 G12 2000 300 250 L 50 50 1 1 B
X VCCO_1 G13 1200 3100 250 D 50 50 1 1 W
X IO_L36P_A9_M1BA0_1 G14 2000 700 250 L 50 50 1 1 B
X IO_L36N_A8_M1BA1_1 G16 2000 600 250 L 50 50 1 1 B
X IO_L38N_A4_M1CLKN_1 H11 2000 200 250 L 50 50 1 1 B
X IO_L39P_M1A3_1 H13 2000 100 250 L 50 50 1 1 B
X IO_L39N_M1ODT_1 H14 2000 0 250 L 50 50 1 1 B
X IO_L37P_A7_M1A0_1 H15 2000 500 250 L 50 50 1 1 B
X IO_L37N_A6_M1A1_1 H16 2000 400 250 L 50 50 1 1 B
X IO_L40P_GCLK11_M1A5_1 J11 2000 -100 250 L 50 50 1 1 B
X IO_L40N_GCLK10_M1A6_1 J12 2000 -200 250 L 50 50 1 1 B
X IO_L41P_GCLK9_IRDY1_M1RASN_1 J13 2000 -300 250 L 50 50 1 1 B
X IO_L43P_GCLK5_M1DQ4_1 J14 2000 -700 250 L 50 50 1 1 B
X VCCO_1 J15 1300 3100 250 D 50 50 1 1 W
X IO_L43N_GCLK4_M1DQ5_1 J16 2000 -800 250 L 50 50 1 1 B
X IO_L42N_GCLK6_TRDY1_M1LDM_1 K11 2000 -600 250 L 50 50 1 1 B
X IO_L42P_GCLK7_M1UDM_1 K12 2000 -500 250 L 50 50 1 1 B
X VCCO_1 K13 1400 3100 250 D 50 50 1 1 W
X IO_L41N_GCLK8_M1CASN_1 K14 2000 -400 250 L 50 50 1 1 B
X IO_L44P_A3_M1DQ6_1 K15 2000 -900 250 L 50 50 1 1 B
X IO_L44N_A2_M1DQ7_1 K16 2000 -1000 250 L 50 50 1 1 B
X IO_L53P_1 L12 2000 -2700 250 L 50 50 1 1 B
X IO_L53N_VREF_1 L13 2000 -2800 250 L 50 50 1 1 B
X IO_L47P_FWE_B_M1DQ0_1 L14 2000 -1500 250 L 50 50 1 1 B
X IO_L47N_LDC_M1DQ1_1 L16 2000 -1600 250 L 50 50 1 1 B
X IO_L74P_AWAKE_1 M13 2000 -2900 250 L 50 50 1 1 B
X IO_L74N_DOUT_BUSY_1 M14 2000 -3000 250 L 50 50 1 1 B
X IO_L46P_FCS_B_M1DQ2_1 M15 2000 -1300 250 L 50 50 1 1 B
X IO_L46N_FOE_B_M1DQ3_1 M16 2000 -1400 250 L 50 50 1 1 B
X IO_L45P_A1_M1LDQS_1 N14 2000 -1100 250 L 50 50 1 1 B
X VCCO_1 N15 1500 3100 250 D 50 50 1 1 W
X IO_L45N_A0_M1LDQSN_1 N16 2000 -1200 250 L 50 50 1 1 B
X IO_L48P_HDC_M1DQ8_1 P15 2000 -1700 250 L 50 50 1 1 B
X IO_L48N_M1DQ9_1 P16 2000 -1800 250 L 50 50 1 1 B
X IO_L52P_M1DQ14_1 R12 2000 -2500 250 L 50 50 1 1 B
X VCCO_1 R13 1600 3100 250 D 50 50 1 1 W
X IO_L50P_M1UDQS_1 R14 2000 -2100 250 L 50 50 1 1 B
X IO_L49P_M1DQ10_1 R15 2000 -1900 250 L 50 50 1 1 B
X IO_L49N_M1DQ11_1 R16 2000 -2000 250 L 50 50 1 1 B
X IO_L52N_M1DQ15_1 T12 2000 -2600 250 L 50 50 1 1 B
X IO_L51N_M1DQ13_1 T13 2000 -2400 250 L 50 50 1 1 B
X IO_L51P_M1DQ12_1 T14 2000 -2300 250 L 50 50 1 1 B
X IO_L50N_M1UDQSN_1 T15 2000 -2200 250 L 50 50 1 1 B
X IO_L52N_M3A9_3 A2 2000 -2200 250 L 50 50 2 1 B
X IO_L83N_VREF_3 A3 2000 -3000 250 L 50 50 2 1 B
X IO_L50N_M3BA2_3 B1 2000 -1800 250 L 50 50 2 1 B
X IO_L52P_M3A8_3 B2 2000 -2100 250 L 50 50 2 1 B
X IO_L83P_3 B3 2000 -2900 250 L 50 50 2 1 B
X IO_L50P_M3WE_3 C1 2000 -1700 250 L 50 50 2 1 B
X IO_L48N_M3BA1_3 C2 2000 -1400 250 L 50 50 2 1 B
X IO_L48P_M3BA0_3 C3 2000 -1300 250 L 50 50 2 1 B
X IO_L49N_M3A2_3 D1 2000 -1600 250 L 50 50 2 1 B
X VCCO_3 D2 1200 3100 250 D 50 50 2 1 W
X IO_L49P_M3A7_3 D3 2000 -1500 250 L 50 50 2 1 B
X IO_L46N_M3CLKN_3 E1 2000 -1000 250 L 50 50 2 1 B
X IO_L46P_M3CLK_3 E2 2000 -900 250 L 50 50 2 1 B
X IO_L54N_M3A11_3 E3 2000 -2600 250 L 50 50 2 1 B
X IO_L54P_M3RESET_3 E4 2000 -2500 250 L 50 50 2 1 B
X IO_L41N_GCLK26_M3DQ5_3 F1 2000 0 250 L 50 50 2 1 B
X IO_L41P_GCLK27_M3DQ4_3 F2 2000 100 250 L 50 50 2 1 B
X IO_L53N_M3A12_3 F3 2000 -2400 250 L 50 50 2 1 B
X IO_L53P_M3CKE_3 F4 2000 -2300 250 L 50 50 2 1 B
X IO_L55N_M3A14_3 F5 2000 -2800 250 L 50 50 2 1 B
X IO_L55P_M3A13_3 F6 2000 -2700 250 L 50 50 2 1 B
X IO_L40N_M3DQ7_3 G1 2000 200 250 L 50 50 2 1 B
X IO_L40P_M3DQ6_3 G3 2000 300 250 L 50 50 2 1 B
X VCCO_3 G4 1300 3100 250 D 50 50 2 1 W
X IO_L51N_M3A4_3 G5 2000 -2000 250 L 50 50 2 1 B
X IO_L51P_M3A10_3 G6 2000 -1900 250 L 50 50 2 1 B
X IO_L39N_M3LDQSN_3 H1 2000 400 250 L 50 50 2 1 B
X IO_L39P_M3LDQS_3 H2 2000 500 250 L 50 50 2 1 B
X IO_L44N_GCLK20_M3A6_3 H3 2000 -600 250 L 50 50 2 1 B
X IO_L44P_GCLK21_M3A5_3 H4 2000 -500 250 L 50 50 2 1 B
X IO_L43N_GCLK22_IRDY2_M3CASN_3 H5 2000 -400 250 L 50 50 2 1 B
X IO_L38N_M3DQ3_3 J1 2000 600 250 L 50 50 2 1 B
X VCCO_3 J2 1400 3100 250 D 50 50 2 1 W
X IO_L38P_M3DQ2_3 J3 2000 700 250 L 50 50 2 1 B
X IO_L42N_GCLK24_M3LDM_3 J4 2000 -200 250 L 50 50 2 1 B
X IO_L43P_GCLK23_M3RASN_3 J6 2000 -300 250 L 50 50 2 1 B
X IO_L37N_M3DQ1_3 K1 2000 800 250 L 50 50 2 1 B
X IO_L37P_M3DQ0_3 K2 2000 900 250 L 50 50 2 1 B
X IO_L42P_GCLK25_TRDY2_M3UDM_3 K3 2000 -100 250 L 50 50 2 1 B
X VCCO_3 K4 1500 3100 250 D 50 50 2 1 W
X IO_L47P_M3A0_3 K5 2000 -1100 250 L 50 50 2 1 B
X IO_L47N_M3A1_3 K6 2000 -1200 250 L 50 50 2 1 B
X IO_L36N_M3DQ9_3 L1 2000 1000 250 L 50 50 2 1 B
X IO_L16P_2 L10 -2000 900 250 R 50 50 2 1 B
X IO_L36P_M3DQ8_3 L3 2000 1100 250 L 50 50 2 1 B
X IO_L45P_M3A3_3 L4 2000 -700 250 L 50 50 2 1 B
X IO_L45N_M3ODT_3 L5 2000 -800 250 L 50 50 2 1 B
X IO_L62N_D6_2 L7 -2000 -800 250 R 50 50 2 1 B
X IO_L62P_D5_2 L8 -2000 -700 250 R 50 50 2 1 B
X IO_L35N_M3DQ11_3 M1 2000 1200 250 L 50 50 2 1 B
X IO_L16N_VREF_2 M10 -2000 800 250 R 50 50 2 1 B
X IO_L2N_CMPMOSI_2 M11 -2000 2000 250 R 50 50 2 1 B
X IO_L2P_CMPCLK_2 M12 -2000 2100 250 R 50 50 2 1 B
X IO_L35P_M3DQ10_3 M2 2000 1300 250 L 50 50 2 1 B
X IO_L1N_VREF_3 M3 2000 2200 250 L 50 50 2 1 B
X IO_L1P_3 M4 2000 2300 250 L 50 50 2 1 B
X IO_L2P_3 M5 2000 2100 250 L 50 50 2 1 B
X IO_L64P_D8_2 M6 -2000 -1100 250 R 50 50 2 1 B
X IO_L31N_GCLK30_D15_2 M7 -2000 200 250 R 50 50 2 1 B
X IO_L29P_GCLK3_2 M9 -2000 700 250 R 50 50 2 1 B
X IO_L34N_M3UDQSN_3 N1 2000 1400 250 L 50 50 2 1 B
X VCCO_2 N10 -1500 3100 250 D 50 50 2 1 W
X IO_L13P_M1_2 N11 -2000 1500 250 R 50 50 2 1 B
X IO_L12P_D1_MISO2_2 N12 -2000 1700 250 R 50 50 2 1 B
X VCCO_3 N2 1600 3100 250 D 50 50 2 1 W
X IO_L34P_M3UDQS_3 N3 2000 1500 250 L 50 50 2 1 B
X IO_L2N_3 N4 2000 2000 250 L 50 50 2 1 B
X IO_L49P_D3_2 N5 -2000 -500 250 R 50 50 2 1 B
X IO_L64N_D9_2 N6 -2000 -1200 250 R 50 50 2 1 B
X VCCO_2 N7 -1600 3100 250 D 50 50 2 1 W
X IO_L29N_GCLK2_2 N8 -2000 600 250 R 50 50 2 1 B
X IO_L14P_D11_2 N9 -2000 1300 250 R 50 50 2 1 B
X IO_L33N_M3DQ13_3 P1 2000 1600 250 L 50 50 2 1 B
X IO_L3P_D0_DIN_MISO_MISO1_2 P10 -2000 1900 250 R 50 50 2 1 B
X IO_L13N_D10_2 P11 -2000 1400 250 R 50 50 2 1 B
X IO_L12N_D2_MISO3_2 P12 -2000 1600 250 R 50 50 2 1 B
X IO_L33P_M3DQ12_3 P2 2000 1700 250 L 50 50 2 1 B
X IO_L63P_2 P4 -2000 -900 250 R 50 50 2 1 B
X IO_L49N_D4_2 P5 -2000 -600 250 R 50 50 2 1 B
X IO_L47P_2 P6 -2000 -100 250 R 50 50 2 1 B
X IO_L31P_GCLK31_D14_2 P7 -2000 300 250 R 50 50 2 1 B
X IO_L30P_GCLK1_D13_2 P8 -2000 500 250 R 50 50 2 1 B
X IO_L14N_D12_2 P9 -2000 1200 250 R 50 50 2 1 B
X IO_L32N_M3DQ15_3 R1 2000 1800 250 L 50 50 2 1 B
X IO_L1P_CCLK_2 R11 -2000 2300 250 R 50 50 2 1 B
X IO_L32P_M3DQ14_3 R2 2000 1900 250 L 50 50 2 1 B
X IO_L65P_INIT_B_2 R3 -2000 -1300 250 R 50 50 2 1 B
X VCCO_2 R4 -1400 3100 250 D 50 50 2 1 W
X IO_L48P_D7_2 R5 -2000 -300 250 R 50 50 2 1 B
X IO_L32P_GCLK29_2 R7 -2000 100 250 R 50 50 2 1 B
X VCCO_2 R8 -1300 3100 250 D 50 50 2 1 W
X IO_L23P_2 R9 -2000 1100 250 R 50 50 2 1 B
X IO_L3N_MOSI_CSI_B_MISO0_2 T10 -2000 1800 250 R 50 50 2 1 B
X IO_L1N_M0_CMPMISO_2 T11 -2000 2200 250 R 50 50 2 1 B
X IO_L65N_CSO_B_2 T3 -2000 -1400 250 R 50 50 2 1 B
X IO_L63N_2 T4 -2000 -1000 250 R 50 50 2 1 B
X IO_L48N_RDWR_B_VREF_2 T5 -2000 -400 250 R 50 50 2 1 B
X IO_L47N_2 T6 -2000 -200 250 R 50 50 2 1 B
X IO_L32N_GCLK28_2 T7 -2000 0 250 R 50 50 2 1 B
X IO_L30N_GCLK0_USERCCLK_2 T8 -2000 400 250 R 50 50 2 1 B
X IO_L23N_2 T9 -2000 1000 250 R 50 50 2 1 B
X TMS A15 1500 300 250 L 50 50 3 1 B
X TDI C12 1500 500 250 L 50 50 3 1 B
X TCK C14 1500 200 250 L 50 50 3 1 B
X TDO E14 1500 400 250 L 50 50 3 1 B
X CMPCS_B_2 L11 1500 -500 250 L 50 50 3 1 B
X DONE_2 P13 1500 0 250 L 50 50 3 1 B
X SUSPEND P14 1500 -300 250 L 50 50 3 1 B
X PROGRAM_B_2 T2 1500 -100 250 L 50 50 3 1 B
X GND A1 -1000 100 250 R 50 50 4 1 W
X GND A16 -1000 0 250 R 50 50 4 1 W
X GND B11 -1000 -200 250 R 50 50 4 1 W
X GND B7 -1000 -100 250 R 50 50 4 1 W
X GND D13 -1000 -400 250 R 50 50 4 1 W
X GND D4 -1000 -300 250 R 50 50 4 1 W
X VCCAUX E5 -1000 1100 250 R 50 50 4 1 W
X GND E9 -1000 -500 250 R 50 50 4 1 W
X VCCAUX F11 -1000 900 250 R 50 50 4 1 W
X VCCAUX F8 -1000 1000 250 R 50 50 4 1 W
X VCCAUX G10 -1000 800 250 R 50 50 4 1 W
X GND G15 -1000 -800 250 R 50 50 4 1 W
X GND G2 -1000 -600 250 R 50 50 4 1 W
X VCCINT G7 1000 1100 250 L 50 50 4 1 W
X GND G8 -1000 -700 250 R 50 50 4 1 W
X VCCINT G9 1000 1000 250 L 50 50 4 1 W
X VCCINT H10 1000 800 250 L 50 50 4 1 W
X GND H12 -1000 -1100 250 R 50 50 4 1 W
X VCCAUX H6 -1000 700 250 R 50 50 4 1 W
X GND H7 -1000 -900 250 R 50 50 4 1 W
X VCCINT H8 1000 900 250 L 50 50 4 1 W
X GND H9 -1000 -1000 250 R 50 50 4 1 W
X VCCAUX J10 -1000 600 250 R 50 50 4 1 W
X GND J5 1000 100 250 L 50 50 4 1 W
X VCCINT J7 1000 700 250 L 50 50 4 1 W
X GND J8 1000 0 250 L 50 50 4 1 W
X VCCINT J9 1000 600 250 L 50 50 4 1 W
X VCCINT K10 1000 400 250 L 50 50 4 1 W
X GND K7 1000 -100 250 L 50 50 4 1 W
X VCCINT K8 1000 500 250 L 50 50 4 1 W
X GND K9 1000 -200 250 L 50 50 4 1 W
X GND L15 1000 -400 250 L 50 50 4 1 W
X GND L2 1000 -300 250 L 50 50 4 1 W
X VCCAUX L6 -1000 500 250 R 50 50 4 1 W
X VCCAUX L9 -1000 400 250 R 50 50 4 1 W
X GND M8 1000 -500 250 L 50 50 4 1 W
X GND N13 1000 -600 250 L 50 50 4 1 W
X GND P3 1000 -700 250 L 50 50 4 1 W
X GND R10 1000 -900 250 L 50 50 4 1 W
X GND R6 1000 -800 250 L 50 50 4 1 W
X GND T1 1000 -1000 250 L 50 50 4 1 W
X GND T16 1000 -1100 250 L 50 50 4 1 W
ENDDRAW
ENDDEF
#
# GW_CPU_MC68030FE
#
DEF GW_CPU_MC68030FE U 0 40 Y Y 1 F N
F0 "U" 50 2600 50 H V C CNN
F1 "GW_CPU_MC68030FE" 50 2500 50 H V C CNN
F2 "stdpads:Motorola_CQFP-132" 0 500 40 H I C CNN
F3 "" 0 500 50 H I C CNN
DRAW
S 1200 -2400 -1200 3250 0 1 10 f
X GND 1 -750 -2550 150 U 50 50 1 1 W
X FC1 10 -1350 2700 150 R 50 50 1 1 T
X GND 100 750 -2550 150 U 50 50 1 1 W
X D20 101 1350 550 150 L 50 50 1 1 B
X D21 102 1350 650 150 L 50 50 1 1 B
X D22 103 1350 750 150 L 50 50 1 1 B
X D23 104 1350 850 150 L 50 50 1 1 B
X Vcc 105 250 3400 150 D 50 50 1 1 W
X D24 106 1350 950 150 L 50 50 1 1 B
X D25 107 1350 1050 150 L 50 50 1 1 B
X D26 108 1350 1150 150 L 50 50 1 1 B
X D27 109 1350 1250 150 L 50 50 1 1 B
X GND 11 -450 -2550 150 U 50 50 1 1 W
X GND 110 850 -2550 150 U 50 50 1 1 W
X D28 111 1350 1350 150 L 50 50 1 1 B
X D29 112 1350 1450 150 L 50 50 1 1 B
X D30 113 1350 1550 150 L 50 50 1 1 B
X D31 114 1350 1650 150 L 50 50 1 1 B
X Vcc 115 350 3400 150 D 50 50 1 1 W
X Vcc 116 450 3400 150 D 50 50 1 1 W
X R~W~ 117 1350 1850 150 L 50 50 1 1 T
X ~ECS~ 118 1350 1950 150 L 50 50 1 1 T
X SIZ1 119 1350 2050 150 L 50 50 1 1 T
X FC0 12 -1350 2600 150 R 50 50 1 1 T
X SIZ0 120 1350 2150 150 L 50 50 1 1 T
X ~DBEN~ 121 1350 2250 150 L 50 50 1 1 O
X ~CIIN~ 122 1350 2350 150 L 50 50 1 1 I
X GND 123 950 -2550 150 U 50 50 1 1 W
X ~DS~ 124 1350 2450 150 L 50 50 1 1 T
X ~AS~ 125 1350 2550 150 L 50 50 1 1 T
X ~CBREQ~ 126 1350 2650 150 L 50 50 1 1 T
X ~CBACK~ 127 1350 2750 150 L 50 50 1 1 I
X Vcc 128 550 3400 150 D 50 50 1 1 W
X ~HALT~ 129 1350 2850 150 L 50 50 1 1 I
X ~RMC~ 13 -1350 2500 150 R 50 50 1 1 T
X ~BERR~ 130 1350 2950 150 L 50 50 1 1 I
X ~STERM~ 131 1350 3050 150 L 50 50 1 1 I
X ~DSACK~1 132 1350 3150 150 L 50 50 1 1 I
X ~OCS~ 14 -1350 2400 150 R 50 50 1 1 T
X ~CIOUT~ 15 -1350 2300 150 R 50 50 1 1 T
X ~BG~ 16 -1350 2200 150 R 50 50 1 1 O
X ~BGACK~ 17 -1350 2100 150 R 50 50 1 1 I
X Vcc 18 -350 3400 150 D 50 50 1 1 W
X GND 19 -350 -2550 150 U 50 50 1 1 W
X GND 2 -650 -2550 150 U 50 50 1 1 W
X ~BR~ 20 -1350 2000 150 R 50 50 1 1 I
X A0 21 -1350 1800 150 R 50 50 1 1 T
X A1 22 -1350 1700 150 R 50 50 1 1 T
X A31 23 -1350 1600 150 R 50 50 1 1 T
X A30 24 -1350 1500 150 R 50 50 1 1 T
X GND 25 -250 -2550 150 U 50 50 1 1 W
X A29 26 -1350 1400 150 R 50 50 1 1 T
X A28 27 -1350 1300 150 R 50 50 1 1 T
X A27 28 -1350 1200 150 R 50 50 1 1 T
X A26 29 -1350 1100 150 R 50 50 1 1 T
X ~DSACK~0 3 -1350 3100 150 R 50 50 1 1 I
X Vcc 30 -250 3400 150 D 50 50 1 1 W
X A25 31 -1350 1000 150 R 50 50 1 1 T
X A24 32 -1350 900 150 R 50 50 1 1 T
X A23 33 -1350 800 150 R 50 50 1 1 T
X A22 34 -1350 700 150 R 50 50 1 1 T
X GND 35 -150 -2550 150 U 50 50 1 1 W
X A21 36 -1350 600 150 R 50 50 1 1 T
X A20 37 -1350 500 150 R 50 50 1 1 T
X A19 38 -1350 400 150 R 50 50 1 1 T
X A18 39 -1350 300 150 R 50 50 1 1 T
X Vcc 4 -550 3400 150 D 50 50 1 1 W
X A17 40 -1350 200 150 R 50 50 1 1 T
X A16 41 -1350 100 150 R 50 50 1 1 T
X A15 42 -1350 0 150 R 50 50 1 1 T
X A14 43 -1350 -100 150 R 50 50 1 1 T
X GND 44 -50 -2550 150 U 50 50 1 1 W
X A13 45 -1350 -200 150 R 50 50 1 1 T
X A12 46 -1350 -300 150 R 50 50 1 1 T
X A11 47 -1350 -400 150 R 50 50 1 1 T
X A10 48 -1350 -500 150 R 50 50 1 1 T
X Vcc 49 -150 3400 150 D 50 50 1 1 W
X GND 5 -550 -2550 150 U 50 50 1 1 W
X A9 51 -1350 -600 150 R 50 50 1 1 T
X A8 52 -1350 -700 150 R 50 50 1 1 T
X A7 53 -1350 -800 150 R 50 50 1 1 T
X A6 54 -1350 -900 150 R 50 50 1 1 T
X A5 55 -1350 -1000 150 R 50 50 1 1 T
X A4 56 -1350 -1100 150 R 50 50 1 1 T
X GND 57 50 -2550 150 U 50 50 1 1 W
X A3 58 -1350 -1200 150 R 50 50 1 1 T
X A2 59 -1350 -1300 150 R 50 50 1 1 T
X CLK 6 -1350 3000 150 R 50 50 1 1 I
X GND 60 150 -2550 150 U 50 50 1 1 W
X ~IPEND~ 62 -1350 -1500 150 R 50 50 1 1 O
X Vcc 63 -50 3400 150 D 50 50 1 1 W
X ~RESET~ 64 -1350 -1600 150 R 50 50 1 1 C
X ~MMUDIS~ 65 -1350 -1700 150 R 50 50 1 1 I
X GND 66 250 -2550 150 U 50 50 1 1 W
X GND 67 350 -2550 150 U 50 50 1 1 W
X ~IPL~2 68 -1350 -1800 150 R 50 50 1 1 I
X ~IPL~1 69 -1350 -1900 150 R 50 50 1 1 I
X ~AVEC~ 7 -1350 2900 150 R 50 50 1 1 I
X ~IPL~0 70 -1350 -2000 150 R 50 50 1 1 I
X ~CDIS~ 71 -1350 -2100 150 R 50 50 1 1 I
X Vcc 72 50 3400 150 D 50 50 1 1 W
X ~REFILL~ 73 -1350 -2200 150 R 50 50 1 1 O
X ~STATUS~ 74 -1350 -2300 150 R 50 50 1 1 O
X D0 75 1350 -1450 150 L 50 50 1 1 B
X D1 76 1350 -1350 150 L 50 50 1 1 B
X GND 77 450 -2550 150 U 50 50 1 1 W
X D2 78 1350 -1250 150 L 50 50 1 1 B
X D3 79 1350 -1150 150 L 50 50 1 1 B
X Vcc 8 -450 3400 150 D 50 50 1 1 W
X D4 80 1350 -1050 150 L 50 50 1 1 B
X D5 81 1350 -950 150 L 50 50 1 1 B
X D6 82 1350 -850 150 L 50 50 1 1 B
X D7 83 1350 -750 150 L 50 50 1 1 B
X Vcc 85 150 3400 150 D 50 50 1 1 W
X D8 86 1350 -650 150 L 50 50 1 1 B
X D9 87 1350 -550 150 L 50 50 1 1 B
X D10 88 1350 -450 150 L 50 50 1 1 B
X D11 89 1350 -350 150 L 50 50 1 1 B
X FC2 9 -1350 2800 150 R 50 50 1 1 T
X GND 90 550 -2550 150 U 50 50 1 1 W
X D12 91 1350 -250 150 L 50 50 1 1 B
X D13 92 1350 -150 150 L 50 50 1 1 B
X D14 93 1350 -50 150 L 50 50 1 1 B
X D15 94 1350 50 150 L 50 50 1 1 B
X GND 95 650 -2550 150 U 50 50 1 1 W
X D16 96 1350 150 150 L 50 50 1 1 B
X D17 97 1350 250 150 L 50 50 1 1 B
X D18 98 1350 350 150 L 50 50 1 1 B
X D19 99 1350 450 150 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# GW_CPU_MC68882FN
#
DEF GW_CPU_MC68882FN U 0 40 Y Y 1 F N
F0 "U" 0 1200 50 H V C CNN
F1 "GW_CPU_MC68882FN" 0 1100 50 H V C CNN
F2 "stdpads:PLCC-68" -50 -900 40 H I C CNN
F3 "" -50 -900 50 H I C CNN
DRAW
S 750 -1650 -750 1650 0 1 10 f
X D2 1 900 -1350 150 L 50 50 1 1 B
X Vcc 10 -350 1800 150 D 50 50 1 1 W
X CLK 11 -900 1300 150 R 50 50 1 1 I
X GND 12 -150 -1800 150 U 50 50 1 1 W
X ~RESET~ 13 -900 -400 150 R 50 50 1 1 I
X GND 14 -50 -1800 150 U 50 50 1 1 W
X NC 15 -900 -1100 150 R 50 50 1 1 N
X Vcc 16 -250 1800 150 D 50 50 1 1 W
X Vcc 17 -150 1800 150 D 50 50 1 1 W
X SIZE 18 -900 -800 150 R 50 50 1 1 I
X GND 19 50 -1800 150 U 50 50 1 1 W
X D1 2 900 -1450 150 L 50 50 1 1 B
X ~DS~ 20 -900 1000 150 R 50 50 1 1 T
X ~AS~ 21 -900 1100 150 R 50 50 1 1 T
X A4 22 -900 600 150 R 50 50 1 1 T
X A3 23 -900 500 150 R 50 50 1 1 T
X A2 24 -900 400 150 R 50 50 1 1 T
X A1 25 -900 300 150 R 50 50 1 1 T
X A0 26 -900 100 150 R 50 50 1 1 T
X Vcc 27 -50 1800 150 D 50 50 1 1 W
X R~W~ 28 -900 800 150 R 50 50 1 1 T
X ~CS~ 29 -900 900 150 R 50 50 1 1 I
X D0 3 900 -1550 150 L 50 50 1 1 B
X GND 30 150 -1800 150 U 50 50 1 1 W
X ~DSACK~0 31 -900 -200 150 R 50 50 1 1 I
X ~DSACK~1 32 -900 -100 150 R 50 50 1 1 I
X D31 33 900 1550 150 L 50 50 1 1 B
X D30 34 900 1450 150 L 50 50 1 1 B
X D29 35 900 1350 150 L 50 50 1 1 B
X D28 36 900 1250 150 L 50 50 1 1 B
X D27 37 900 1150 150 L 50 50 1 1 B
X D26 38 900 1050 150 L 50 50 1 1 B
X D25 39 900 950 150 L 50 50 1 1 B
X ~SENSE~ 4 -900 -600 150 R 50 50 1 1 C
X D24 40 900 850 150 L 50 50 1 1 B
X GND 41 250 -1800 150 U 50 50 1 1 W
X D23 42 900 750 150 L 50 50 1 1 B
X Vcc 43 50 1800 150 D 50 50 1 1 W
X D22 44 900 650 150 L 50 50 1 1 B
X D21 45 900 550 150 L 50 50 1 1 B
X D20 46 900 450 150 L 50 50 1 1 B
X D19 47 900 350 150 L 50 50 1 1 B
X D18 48 900 250 150 L 50 50 1 1 B
X D17 49 900 150 150 L 50 50 1 1 B
X GND 5 -650 -1800 150 U 50 50 1 1 W
X D16 50 900 50 150 L 50 50 1 1 B
X GND 51 350 -1800 150 U 50 50 1 1 W
X Vcc 52 150 1800 150 D 50 50 1 1 W
X Vcc 53 250 1800 150 D 50 50 1 1 W
X D15 54 900 -50 150 L 50 50 1 1 B
X D14 55 900 -150 150 L 50 50 1 1 B
X D13 56 900 -250 150 L 50 50 1 1 B
X D12 57 900 -350 150 L 50 50 1 1 B
X D11 58 900 -450 150 L 50 50 1 1 B
X D10 59 900 -550 150 L 50 50 1 1 B
X GND 6 -550 -1800 150 U 50 50 1 1 W
X D9 60 900 -650 150 L 50 50 1 1 B
X Vcc 61 350 1800 150 D 50 50 1 1 W
X D8 62 900 -750 150 L 50 50 1 1 B
X GND 63 450 -1800 150 U 50 50 1 1 W
X D7 64 900 -850 150 L 50 50 1 1 B
X D6 65 900 -950 150 L 50 50 1 1 B
X D5 66 900 -1050 150 L 50 50 1 1 B
X D4 67 900 -1150 150 L 50 50 1 1 B
X D3 68 900 -1250 150 L 50 50 1 1 B
X GND 7 -450 -1800 150 U 50 50 1 1 W
X GND 8 -350 -1800 150 U 50 50 1 1 W
X GND 9 -250 -1800 150 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
# GW_Logic_741G125GW
#
DEF GW_Logic_741G125GW U 0 40 Y Y 1 F N
F0 "U" 0 250 50 H V C CNN
F1 "GW_Logic_741G125GW" 0 -250 50 H V C CNN
F2 "stdpads:SOT-353" 0 -300 50 H I C TNN
F3 "" 0 -200 60 H I C CNN
DRAW
S 200 -200 -200 200 0 1 10 f
X ~OE~ 1 -400 100 200 R 50 50 1 1 I
X A 2 -400 0 200 R 50 50 1 1 I
X GND 3 -400 -100 200 R 50 50 1 1 W
X Y 4 400 -100 200 L 50 50 1 1 O
X Vcc 5 400 100 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# GW_Logic_74244
#
DEF GW_Logic_74244 U 0 40 Y Y 1 F N
F0 "U" 0 600 50 H V C CNN
F1 "GW_Logic_74244" 0 -600 50 H V C CNN
F2 "stdpads:TSSOP-20_4.4x6.5mm_P0.65mm" 0 -650 50 H I C TNN
F3 "" 0 100 60 H I C CNN
DRAW
S -200 550 200 -550 0 1 10 f
X 1~OE~ 1 400 450 200 L 50 50 1 1 I
X GND 10 -400 -450 200 R 50 50 1 1 W
X 2A3 11 400 -350 200 L 50 50 1 1 I
X 1Y3 12 -400 350 200 R 50 50 1 1 T
X 2A2 13 400 -250 200 L 50 50 1 1 I
X 1Y2 14 -400 250 200 R 50 50 1 1 T
X 2A1 15 400 -150 200 L 50 50 1 1 I
X 1Y1 16 -400 150 200 R 50 50 1 1 T
X 2A0 17 400 -50 200 L 50 50 1 1 I
X 1Y0 18 -400 50 200 R 50 50 1 1 T
X 2~OE~ 19 400 -450 200 L 50 50 1 1 I
X 1A0 2 400 350 200 L 50 50 1 1 I
X Vcc 20 -400 450 200 R 50 50 1 1 W
X 2Y0 3 -400 -50 200 R 50 50 1 1 T
X 1A1 4 400 250 200 L 50 50 1 1 I
X 2Y1 5 -400 -150 200 R 50 50 1 1 T
X 1A2 6 400 150 200 L 50 50 1 1 I
X 2Y2 7 -400 -250 200 R 50 50 1 1 T
X 1A3 8 400 50 200 L 50 50 1 1 I
X 2Y3 9 -400 -350 200 R 50 50 1 1 T
ENDDRAW
ENDDEF
#
# GW_Logic_74245
#
DEF GW_Logic_74245 U 0 40 Y Y 1 F N
F0 "U" 0 600 50 H V C CNN
F1 "GW_Logic_74245" 0 -600 50 H V C CNN
F2 "" 0 -650 50 H I C TNN
F3 "" 0 100 60 H I C CNN
DRAW
S -200 550 200 -550 0 1 10 f
X AtoB 1 -400 450 200 R 50 50 1 1 I
X GND 10 -400 -450 200 R 50 50 1 1 W
X B7 11 400 -450 200 L 50 50 1 1 B
X B6 12 400 -350 200 L 50 50 1 1 B
X B5 13 400 -250 200 L 50 50 1 1 B
X B4 14 400 -150 200 L 50 50 1 1 B
X B3 15 400 -50 200 L 50 50 1 1 B
X B2 16 400 50 200 L 50 50 1 1 B
X B1 17 400 150 200 L 50 50 1 1 B
X B0 18 400 250 200 L 50 50 1 1 B
X ~OE~ 19 400 350 200 L 50 50 1 1 I
X A0 2 -400 350 200 R 50 50 1 1 B
X Vcc 20 400 450 200 L 50 50 1 1 W
X A1 3 -400 250 200 R 50 50 1 1 B
X A2 4 -400 150 200 R 50 50 1 1 B
X A3 5 -400 50 200 R 50 50 1 1 B
X A4 6 -400 -50 200 R 50 50 1 1 B
X A5 7 -400 -150 200 R 50 50 1 1 B
X A6 8 -400 -250 200 R 50 50 1 1 B
X A7 9 -400 -350 200 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
# GW_Logic_74573
#
DEF GW_Logic_74573 U 0 40 Y Y 1 F N
F0 "U" 0 600 50 H V C CNN
F1 "GW_Logic_74573" 0 -600 50 H V C CNN
F2 "" 0 -650 50 H I C TNN
F3 "" 0 100 60 H I C CNN
DRAW
S -200 550 200 -550 0 1 10 f
X ~OE~ 1 -400 450 200 R 50 50 1 1 I
X GND 10 -400 -450 200 R 50 50 1 1 W
X ~LE~ 11 400 -450 200 L 50 50 1 1 I
X Q7 12 400 -350 200 L 50 50 1 1 T
X Q6 13 400 -250 200 L 50 50 1 1 T
X Q5 14 400 -150 200 L 50 50 1 1 T
X Q4 15 400 -50 200 L 50 50 1 1 T
X Q3 16 400 50 200 L 50 50 1 1 T
X Q2 17 400 150 200 L 50 50 1 1 T
X Q1 18 400 250 200 L 50 50 1 1 T
X Q0 19 400 350 200 L 50 50 1 1 T
X D0 2 -400 350 200 R 50 50 1 1 I
X Vcc 20 400 450 200 L 50 50 1 1 W
X D1 3 -400 250 200 R 50 50 1 1 I
X D2 4 -400 150 200 R 50 50 1 1 I
X D3 5 -400 50 200 R 50 50 1 1 I
X D4 6 -400 -50 200 R 50 50 1 1 I
X D5 7 -400 -150 200 R 50 50 1 1 I
X D6 8 -400 -250 200 R 50 50 1 1 I
X D7 9 -400 -350 200 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# GW_Logic_Oscillator_4P
#
DEF GW_Logic_Oscillator_4P U 0 40 Y Y 1 F N
F0 "U" 0 250 50 H V C CNN
F1 "GW_Logic_Oscillator_4P" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -250 200 250 -100 0 1 10 f
X EN 1 -350 100 100 R 50 50 1 1 I
X GND 2 -350 0 100 R 50 50 1 1 W
X Output 3 350 0 100 L 50 50 1 1 O
X Vdd 4 350 100 100 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# GW_RAM_SDRAM-16Mx16-TSOP2-54
#
DEF GW_RAM_SDRAM-16Mx16-TSOP2-54 U 0 40 Y Y 1 F N
F0 "U" 0 1150 50 H V C CNN
F1 "GW_RAM_SDRAM-16Mx16-TSOP2-54" 0 0 50 V V C CNN
F2 "stdpads:Winbond_TSOPII-54" 0 -1650 50 H I C CIN
F3 "" 0 -250 50 H I C CNN
DRAW
S -300 1100 300 -1400 0 1 10 f
X VDD 1 -500 1000 200 R 50 50 1 1 W
X DQ5 10 500 500 200 L 50 50 1 1 B
X DQ6 11 500 400 200 L 50 50 1 1 B
X VSSQ 12 -500 -1300 200 R 50 50 1 1 W N
X DQ7 13 500 300 200 L 50 50 1 1 B
X VDD 14 -500 1000 200 R 50 50 1 1 W N
X DQML 15 500 -600 200 L 50 50 1 1 I
X ~WE~ 16 500 -1100 200 L 50 50 1 1 I
X ~CAS~ 17 500 -1200 200 L 50 50 1 1 I
X ~RAS~ 18 500 -1300 200 L 50 50 1 1 I
X ~CS~ 19 500 -1000 200 L 50 50 1 1 I
X DQ0 2 500 1000 200 L 50 50 1 1 B
X BA0 20 -500 -600 200 R 50 50 1 1 I
X BA1 21 -500 -700 200 R 50 50 1 1 I
X A10 22 -500 -300 200 R 50 50 1 1 I
X A0 23 -500 700 200 R 50 50 1 1 I
X A1 24 -500 600 200 R 50 50 1 1 I
X A2 25 -500 500 200 R 50 50 1 1 I
X A3 26 -500 400 200 R 50 50 1 1 I
X VDD 27 -500 1000 200 R 50 50 1 1 W N
X VSS 28 -500 -1200 200 R 50 50 1 1 W
X A4 29 -500 300 200 R 50 50 1 1 I
X VDDQ 3 -500 900 200 R 50 50 1 1 W
X A5 30 -500 200 200 R 50 50 1 1 I
X A6 31 -500 100 200 R 50 50 1 1 I
X A7 32 -500 0 200 R 50 50 1 1 I
X A8 33 -500 -100 200 R 50 50 1 1 I
X A9 34 -500 -200 200 R 50 50 1 1 I
X A11 35 -500 -400 200 R 50 50 1 1 I
X A12 36 -500 -500 200 R 50 50 1 1 I
X CKE 37 -500 -900 200 R 50 50 1 1 I
X CLK 38 -500 -1000 200 R 50 50 1 1 I
X DQMH 39 500 -700 200 L 50 50 1 1 I
X DQ1 4 500 900 200 L 50 50 1 1 B
X VSS 41 -500 -1200 200 R 50 50 1 1 W N
X DQ8 42 500 200 200 L 50 50 1 1 B
X VDDQ 43 -500 900 200 R 50 50 1 1 W N
X DQ9 44 500 100 200 L 50 50 1 1 B
X DQ10 45 500 0 200 L 50 50 1 1 B
X VSSQ 46 -500 -1300 200 R 50 50 1 1 W N
X DQ11 47 500 -100 200 L 50 50 1 1 B
X DQ12 48 500 -200 200 L 50 50 1 1 B
X VDDQ 49 -500 900 200 R 50 50 1 1 W N
X DQ2 5 500 800 200 L 50 50 1 1 B
X DQ13 50 500 -300 200 L 50 50 1 1 B
X DQ14 51 500 -400 200 L 50 50 1 1 B
X VSSQ 52 -500 -1300 200 R 50 50 1 1 W N
X DQ15 53 500 -500 200 L 50 50 1 1 B
X VSS 54 -500 -1200 200 R 50 50 1 1 W N
X VSSQ 6 -500 -1300 200 R 50 50 1 1 W
X DQ3 7 500 700 200 L 50 50 1 1 B
X DQ4 8 500 600 200 L 50 50 1 1 B
X VDDQ 9 -500 900 200 R 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# Mechanical_Fiducial
#
DEF Mechanical_Fiducial FID 0 20 Y Y 1 F N
F0 "FID" 0 200 50 H V C CNN
F1 "Mechanical_Fiducial" 0 125 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Fiducial*
$ENDFPLIST
DRAW
C 0 0 50 0 1 20 f
ENDDRAW
ENDDEF
#
# Mechanical_MountingHole_Pad
#
DEF Mechanical_MountingHole_Pad H 0 40 N N 1 F N
F0 "H" 0 250 50 H V C CNN
F1 "Mechanical_MountingHole_Pad" 0 175 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
MountingHole*Pad*
$ENDFPLIST
DRAW
C 0 50 50 0 1 50 N
X 1 1 0 -100 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_+12V
#
DEF power_+12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+1V2
#
DEF power_+1V2 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+1V2" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +1V2 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+3V3
#
DEF power_+3V3 #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3V3" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_-12V
#
DEF power_-12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 100 50 H I C CNN
F1 "power_-12V" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
X -12V 1 0 0 0 U 50 50 0 0 W N
ENDDRAW
ENDDEF
#
# power_-5V
#
DEF power_-5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 100 50 H I C CNN
F1 "power_-5V" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 30 50 0 100 -30 50 0 50 F
X -5V 1 0 0 0 U 50 50 0 0 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

13378
SE-030.kicad_pcb Normal file
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File diff suppressed because it is too large Load Diff

269
SE-030.pro Normal file
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@ -0,0 +1,269 @@
update=Friday, October 22, 2021 at 05:54:57 AM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=SE-030.net
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.15
MinViaDiameter=0.5
MinViaDrill=0.2
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.15
TrackWidth2=0.2
TrackWidth3=0.25
TrackWidth4=0.3
TrackWidth5=0.35
TrackWidth6=0.4
TrackWidth7=0.45
TrackWidth8=0.5
TrackWidth9=0.55
TrackWidth10=0.6
TrackWidth11=0.8
TrackWidth12=1
TrackWidth13=1.27
TrackWidth14=1.524
ViaDiameter1=0.5
ViaDrill1=0.2
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.8
ViaDrill3=0.4
ViaDiameter4=1
ViaDrill4=0.5
ViaDiameter5=1.524
ViaDrill5=0.762
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.1524
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.07619999999999999
SolderMaskMinWidth=0.09999999999999999
SolderPasteClearance=-0.03809999999999999
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=1
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.15
TrackWidth=0.15
ViaDiameter=0.5
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

529
SE-030.sch Normal file
View File

@ -0,0 +1,529 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr USLetter 11000 8500
encoding utf-8
Sheet 1 7
Title "RAM2E II"
Date "2020-07-25"
Rev "1.0"
Comp "Garrett's Workshop"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Mechanical:MountingHole_Pad H5
U 1 1 5ED15A93
P 1950 7250
F 0 "H5" H 2050 7301 50 0000 L CNN
F 1 " " H 2050 7210 50 0000 L CNN
F 2 "stdpads:PasteHole_1.1mm_PTH" H 1950 7250 50 0001 C CNN
F 3 "~" H 1950 7250 50 0001 C CNN
1 1950 7250
1 0 0 -1
$EndComp
$Comp
L Mechanical:Fiducial FID1
U 1 1 5CC47A28
P 750 7550
F 0 "FID1" H 850 7596 50 0000 L CNN
F 1 "Fiducial" H 850 7505 50 0000 L CNN
F 2 "stdpads:Fiducial" H 750 7550 50 0001 C CNN
F 3 "~" H 750 7550 50 0001 C CNN
1 750 7550
1 0 0 -1
$EndComp
$Comp
L Mechanical:Fiducial FID3
U 1 1 5CC4921D
P 1250 7550
F 0 "FID3" H 1350 7596 50 0000 L CNN
F 1 "Fiducial" H 1350 7505 50 0000 L CNN
F 2 "stdpads:Fiducial" H 1250 7550 50 0001 C CNN
F 3 "~" H 1250 7550 50 0001 C CNN
1 1250 7550
1 0 0 -1
$EndComp
$Comp
L Mechanical:Fiducial FID2
U 1 1 5CC4DBD8
P 750 7750
F 0 "FID2" H 850 7796 50 0000 L CNN
F 1 "Fiducial" H 850 7705 50 0000 L CNN
F 2 "stdpads:Fiducial" H 750 7750 50 0001 C CNN
F 3 "~" H 750 7750 50 0001 C CNN
1 750 7750
1 0 0 -1
$EndComp
$Comp
L Mechanical:Fiducial FID4
U 1 1 5CC4DBDF
P 1250 7750
F 0 "FID4" H 1350 7796 50 0000 L CNN
F 1 "Fiducial" H 1350 7705 50 0000 L CNN
F 2 "stdpads:Fiducial" H 1250 7750 50 0001 C CNN
F 3 "~" H 1250 7750 50 0001 C CNN
1 1250 7750
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole_Pad H1
U 1 1 5CC53461
P 750 7250
F 0 "H1" H 850 7301 50 0000 L CNN
F 1 " " H 850 7210 50 0000 L CNN
F 2 "stdpads:PasteHole_1.1mm_PTH" H 750 7250 50 0001 C CNN
F 3 "~" H 750 7250 50 0001 C CNN
1 750 7250
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole_Pad H2
U 1 1 5CC795A2
P 1050 7250
F 0 "H2" H 1150 7301 50 0000 L CNN
F 1 " " H 1150 7210 50 0000 L CNN
F 2 "stdpads:PasteHole_1.1mm_PTH" H 1050 7250 50 0001 C CNN
F 3 "~" H 1050 7250 50 0001 C CNN
1 1050 7250
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole_Pad H3
U 1 1 5CC7E0B9
P 1350 7250
F 0 "H3" H 1450 7301 50 0000 L CNN
F 1 " " H 1450 7210 50 0000 L CNN
F 2 "stdpads:PasteHole_1.1mm_PTH" H 1350 7250 50 0001 C CNN
F 3 "~" H 1350 7250 50 0001 C CNN
1 1350 7250
1 0 0 -1
$EndComp
$Comp
L Mechanical:MountingHole_Pad H4
U 1 1 5CC7E0C0
P 1650 7250
F 0 "H4" H 1750 7301 50 0000 L CNN
F 1 " " H 1750 7210 50 0000 L CNN
F 2 "stdpads:PasteHole_1.1mm_PTH" H 1650 7250 50 0001 C CNN
F 3 "~" H 1650 7250 50 0001 C CNN
1 1650 7250
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0101
U 1 1 5CC8BAFD
P 1650 7350
F 0 "#PWR0101" H 1650 7100 50 0001 C CNN
F 1 "GND" H 1655 7177 50 0000 C CNN
F 2 "" H 1650 7350 50 0001 C CNN
F 3 "" H 1650 7350 50 0001 C CNN
1 1650 7350
1 0 0 -1
$EndComp
Wire Wire Line
1050 7350 750 7350
Connection ~ 1050 7350
Connection ~ 1350 7350
Wire Wire Line
1350 7350 1050 7350
Wire Wire Line
1950 7350 1650 7350
Wire Wire Line
1650 7350 1350 7350
Connection ~ 1650 7350
Wire Bus Line
1100 700 1300 700
Wire Bus Line
1100 800 1300 800
Wire Wire Line
1100 900 1300 900
Wire Bus Line
1100 1600 1300 1600
Wire Wire Line
1100 1000 1300 1000
Wire Wire Line
1100 5000 1300 5000
Wire Wire Line
1300 2100 1100 2100
Wire Wire Line
1300 2200 1100 2200
Wire Wire Line
1300 2500 1100 2500
Wire Wire Line
1300 2600 1100 2600
$Sheet
S 550 600 550 5700
U 5F6DA71D
F0 "PDS" 50
F1 "PDS.sch" 50
F2 "A[31..0]" I R 1100 800 50
F3 "~AS~" I R 1100 2100 50
F4 "R~W~" I R 1100 900 50
F5 "~RESET~" B R 1100 3400 50
F6 "~BERR~" O R 1100 5900 50
F7 "C16M" O R 1100 5000 50
F8 "~DS~" I R 1100 2200 50
F9 "~DSACK~0" B R 1100 2600 50
F10 "~DSACK~1" O R 1100 2500 50
F11 "SIZ[1..0]" I R 1100 1600 50
F12 "~HALT~" O R 1100 5800 50
F13 "FC[2..0]" I R 1100 700 50
F14 "~RMC~" I R 1100 1000 50
F15 "D[31..0]" B R 1100 3100 50
F16 "~IPL~[2..0]" O R 1100 6200 50
$EndSheet
Wire Bus Line
1100 3100 1300 3100
Wire Wire Line
1200 3400 1300 3400
Connection ~ 1200 3400
Wire Wire Line
1100 3400 1200 3400
Wire Bus Line
4300 3100 4300 3500
Wire Bus Line
2500 700 4000 700
Wire Wire Line
4400 1800 3900 1800
Wire Bus Line
4300 3500 4400 3500
Wire Wire Line
2500 900 4200 900
Wire Bus Line
4000 700 4000 1200
Wire Bus Line
4000 1200 3900 1200
Connection ~ 4000 700
Wire Bus Line
4000 700 4400 700
Wire Bus Line
3900 1300 4100 1300
Wire Bus Line
4100 1300 4100 800
Connection ~ 4100 800
Wire Bus Line
4100 800 4400 800
Wire Wire Line
4200 900 4200 1400
Wire Wire Line
4200 1400 3900 1400
Connection ~ 4200 900
Wire Wire Line
4200 900 4400 900
Wire Bus Line
2500 800 4100 800
$Sheet
S 5750 600 550 5700
U 5F72F108
F0 "MC68k" 50
F1 "MC68k.sch" 50
F2 "~AS~" O L 5750 2100 50
F3 "~RESET~" B L 5750 6100 50
F4 "~BERR~" I L 5750 5900 50
F5 "~CBREQ~" O L 5750 2300 50
F6 "D[31..0]" B L 5750 3100 50
F7 "~CIOUT~" O L 5750 1700 50
F8 "R~W~" O L 5750 900 50
F9 "~RMC~" O L 5750 1000 50
F10 "A[31..0]" O L 5750 800 50
F11 "FC[2..0]" O L 5750 700 50
F12 "SIZ[1..0]" O L 5750 1600 50
F13 "~DSACK~1" B L 5750 2500 50
F14 "~DSACK~0" B L 5750 2600 50
F15 "~IPL~[2..0]" I L 5750 6200 50
F16 "~DS~" O L 5750 2200 50
F17 "CPUCLK" I L 5750 5000 50
F18 "~CIIN~" I L 5750 5700 50
F19 "~STERM~" I L 5750 5500 50
F20 "~HALT~" I L 5750 5800 50
F21 "~CBACK~" I L 5750 5600 50
F22 "~ECS~" O L 5750 2000 50
F23 "FPUCLK" I L 5750 5200 50
F24 "FPU~CS~" I L 5750 5300 50
$EndSheet
Connection ~ 4300 3100
Wire Bus Line
4300 3100 4400 3100
Wire Bus Line
4400 1600 3900 1600
Wire Wire Line
4400 1700 3900 1700
Wire Wire Line
1200 6100 5750 6100
Wire Bus Line
1100 6200 5750 6200
Wire Wire Line
3900 2900 4400 2900
Wire Wire Line
3900 3000 4400 3000
Wire Wire Line
3900 2100 4400 2100
Wire Wire Line
3900 2000 4400 2000
Wire Wire Line
3900 2300 4400 2300
Wire Wire Line
3900 2200 4400 2200
Wire Wire Line
3900 2600 4400 2600
Wire Wire Line
3900 2700 4400 2700
Wire Wire Line
3900 2500 4400 2500
Wire Bus Line
3900 3100 4300 3100
Wire Wire Line
3900 5000 5750 5000
Wire Wire Line
3900 5200 5750 5200
Wire Wire Line
3900 5300 5750 5300
Wire Wire Line
3900 5600 5750 5600
Wire Wire Line
3900 5500 5750 5500
Wire Wire Line
3900 5700 5750 5700
Wire Wire Line
3900 5900 5750 5900
Wire Wire Line
3900 5800 5750 5800
Wire Wire Line
2600 5000 2500 5000
Wire Wire Line
2600 3400 2500 3400
Wire Wire Line
2600 3300 2500 3300
Wire Wire Line
2600 5900 2500 5900
Wire Wire Line
2600 5800 2500 5800
Wire Bus Line
2500 1300 2600 1300
Wire Bus Line
2600 1600 2500 1600
Wire Wire Line
2600 1800 2500 1800
Wire Wire Line
2600 1900 2500 1900
Wire Wire Line
2600 2100 2500 2100
Wire Wire Line
2600 2200 2500 2200
Wire Wire Line
2600 2500 2500 2500
Wire Wire Line
2600 2600 2500 2600
Wire Wire Line
2600 2900 2500 2900
Wire Wire Line
2600 3000 2500 3000
Wire Bus Line
2500 3100 2600 3100
Wire Bus Line
5650 3100 5750 3100
Wire Wire Line
5750 2600 5650 2600
Wire Wire Line
5750 2500 5650 2500
Wire Wire Line
5750 2300 5650 2300
Wire Wire Line
5750 2200 5650 2200
Wire Wire Line
5750 2100 5650 2100
Wire Wire Line
5750 2000 5650 2000
Wire Wire Line
5750 1700 5650 1700
Wire Bus Line
5650 1600 5750 1600
Wire Wire Line
5750 1000 5650 1000
Wire Wire Line
5750 900 5650 900
Wire Bus Line
5650 800 5750 800
Wire Bus Line
5650 700 5750 700
$Sheet
S 4400 3400 1250 1500
U 63261D60
F0 "RAM" 50
F1 "RAM.sch" 50
F2 "~RAS~" I L 4400 3800 50
F3 "~CAS~" I L 4400 3900 50
F4 "~CS~" I L 4400 3700 50
F5 "~WE~" I L 4400 4000 50
F6 "CKE" I L 4400 4100 50
F7 "CLK01" I L 4400 4700 50
F8 "RA[12..0]" I L 4400 4400 50
F9 "D[31..0]" B L 4400 3500 50
F10 "CLK23" I L 4400 4800 50
F11 "BA[1..0]" I L 4400 4300 50
F12 "DQM[3..0]" I L 4400 4500 50
$EndSheet
Wire Wire Line
3900 4800 4400 4800
Wire Wire Line
3900 4700 4400 4700
Wire Bus Line
4400 4500 3900 4500
Wire Bus Line
4400 4400 3900 4400
Wire Bus Line
4400 4300 3900 4300
Wire Wire Line
3900 4100 4400 4100
Wire Wire Line
3900 4000 4400 4000
Wire Wire Line
3900 3900 4400 3900
Wire Wire Line
3900 3800 4400 3800
Wire Wire Line
3900 3700 4400 3700
Wire Wire Line
1100 5900 1300 5900
Wire Wire Line
1300 5800 1100 5800
Wire Wire Line
1200 3400 1200 6100
$Sheet
S 1300 600 1200 5400
U 60941922
F0 "PDSBuf" 50
F1 "PDSBuf.sch" 50
F2 "A~OE~" I R 2500 1800 50
F3 "ADoutLE" I R 2500 1900 50
F4 "IOB_R~W~" O L 1300 900 50
F5 "IOB_SIZ[1..0]" O L 1300 1600 50
F6 "IOB_FC[2..0]" O L 1300 700 50
F7 "IOB_C16M" I L 1300 5000 50
F8 "IOB_~RESET~" B L 1300 3400 50
F9 "IOB_~HALT~" I L 1300 5800 50
F10 "IOB_~DSACK~1" I L 1300 2500 50
F11 "IOB_~DSACK~0" I L 1300 2600 50
F12 "IOB_~AS~" O L 1300 2100 50
F13 "D~OE~" I R 2500 2900 50
F14 "IOB_D[31..0]" B L 1300 3100 50
F15 "DDIR" I R 2500 3000 50
F16 "IOB_~DS~" O L 1300 2200 50
F17 "IOC_SIZ[1..0]" I R 2500 1600 50
F18 "IOC_~AS~" I R 2500 2100 50
F19 "IOC_~DS~" I R 2500 2200 50
F20 "FSB_R~W~" I R 2500 900 50
F21 "IOC_D[31..0]" B R 2500 3100 50
F22 "IOB_A[31..0]" O L 1300 800 50
F23 "IOC_C16M" O R 2500 5000 50
F24 "FSB_~RESET~" O R 2500 3400 50
F25 "IOC_~HALT~" O R 2500 5800 50
F26 "IOC_~DSACK~1" O R 2500 2500 50
F27 "IOC_~DSACK~0" O R 2500 2600 50
F28 "IOB_~RMC~" I L 1300 1000 50
F29 "IOC_~BERR~" O R 2500 5900 50
F30 "FSB_A[31..4]" I R 2500 800 50
F31 "IOC_A[3..0]" I R 2500 1300 50
F32 "FSB_FC[2..0]" I R 2500 700 50
F33 "IOB_~BERR~" I L 1300 5900 50
F34 "RESET~OE~" I R 2500 3300 50
$EndSheet
$Sheet
S 2600 1100 1300 4900
U 5F723173
F0 "Control" 50
F1 "Control.sch" 50
F2 "IOB_A~OE~" I L 2600 1800 50
F3 "IOC_~AS~" O L 2600 2100 50
F4 "IOC_~DS~" O L 2600 2200 50
F5 "FSB_R~W~" B R 3900 1400 50
F6 "IOB_D[31..0]" B L 2600 3100 50
F7 "FSB_A[31..0]" B R 3900 1300 50
F8 "IOB_C16M" I L 2600 5000 50
F9 "IOB_~HALT~" I L 2600 5800 50
F10 "IOB_~DSACK~1" I L 2600 2500 50
F11 "IOB_~DSACK~0" I L 2600 2600 50
F12 "FSB_~RMC~" B R 3900 1500 50
F13 "IOB_~BERR~" I L 2600 5900 50
F14 "IOB_A[3..0]" O L 2600 1300 50
F15 "FSB_FC[2..0]" B R 3900 1200 50
F16 "RESET~OE~" O L 2600 3300 50
F17 "IOB_ADoutLE" I L 2600 1900 50
F18 "IOB_DDIR" I L 2600 3000 50
F19 "IOB_D~OE~" I L 2600 2900 50
F20 "~RESET~" I L 2600 3400 50
F21 "IOB_SIZ[1..0]" O L 2600 1600 50
F22 "FSB_D[31..0]" B R 3900 3100 50
F23 "FSB_~DS~" I R 3900 2200 50
F24 "FSB_~AS~" I R 3900 2100 50
F25 "FSB_~CIOUT~" I R 3900 1700 50
F26 "FSB_SIZ[1..0]" I R 3900 1600 50
F27 "FSB_~CBREQ~" I R 3900 2300 50
F28 "CPU_~DSACK~1" O R 3900 2500 50
F29 "CPU_~DSACK~0" O R 3900 2600 50
F30 "FSB_~ECS~" I R 3900 2000 50
F31 "DSACK~OE~" O R 3900 2700 50
F32 "CPU_D~OE~" O R 3900 2900 50
F33 "CPU_DDIR" O R 3900 3000 50
F34 "CPU_A~OE~" O R 3900 1800 50
F35 "CPUCLK" O R 3900 5000 50
F36 "FPUCLK" O R 3900 5200 50
F37 "FPU~CS~" O R 3900 5300 50
F38 "CPU_~STERM~" O R 3900 5500 50
F39 "CPU_~CBACK~" O R 3900 5600 50
F40 "CPU_~CIIN~" O R 3900 5700 50
F41 "CPU_~HALT~" O R 3900 5800 50
F42 "CPU_~BERR~" O R 3900 5900 50
F43 "RAM_~CS~" O R 3900 3700 50
F44 "RAM_~RAS~" O R 3900 3800 50
F45 "RAM_~CAS~" O R 3900 3900 50
F46 "RAM_~WE~" O R 3900 4000 50
F47 "RAM_CKE" O R 3900 4100 50
F48 "RAM_BA[1..0]" O R 3900 4300 50
F49 "RAM_RA[12..0]" O R 3900 4400 50
F50 "RAM_DQM[3..0]" O R 3900 4500 50
F51 "RAM_CLK01" O R 3900 4700 50
F52 "RAM_CLK23" O R 3900 4800 50
$EndSheet
$Sheet
S 4400 600 1250 2600
U 629B918A
F0 "CPUBuf" 50
F1 "CPUBuf.sch" 50
F2 "D~OE~" I L 4400 2900 50
F3 "DDIR" I L 4400 3000 50
F4 "CPU_D[31..0]" B R 5650 3100 50
F5 "A~OE~" I L 4400 1800 50
F6 "CPU_~CBREQ~" I R 5650 2300 50
F7 "CPU_~DS~" I R 5650 2200 50
F8 "CPU_~AS~" I R 5650 2100 50
F9 "CPU_~CIOUT~" I R 5650 1700 50
F10 "CPU_R~W~" I R 5650 900 50
F11 "CPU_~RMC~" I R 5650 1000 50
F12 "FSB_~DS~" O L 4400 2200 50
F13 "FSB_~AS~" O L 4400 2100 50
F14 "FSB_R~W~" T L 4400 900 50
F15 "FSB_~RMC~" T L 4400 1500 50
F16 "FSB_~CIOUT~" O L 4400 1700 50
F17 "FSB_A[31..0]" T L 4400 800 50
F18 "CPU_A[31..0]" I R 5650 800 50
F19 "FSB_FC[2..0]" T L 4400 700 50
F20 "FSB_SIZ[1..0]" O L 4400 1600 50
F21 "FSB_~CBREQ~" O L 4400 2300 50
F22 "FSB_D[31..0]" B L 4400 3100 50
F23 "CPU_FC[2..0]" I R 5650 700 50
F24 "CPU_SIZ[1..0]" I R 5650 1600 50
F25 "DSACK~OE~" I L 4400 2700 50
F26 "CPU_~DSACK~1" T R 5650 2500 50
F27 "CPU_~DSACK~0" T R 5650 2600 50
F28 "FSB_~DSACK~1" I L 4400 2500 50
F29 "FSB_~DSACK~0" I L 4400 2600 50
F30 "CPU_~ECS~" I R 5650 2000 50
F31 "FSB_~ECS~" O L 4400 2000 50
$EndSheet
Wire Wire Line
3900 1500 4400 1500
$EndSCHEMATC

3
fp-lib-table Normal file
View File

@ -0,0 +1,3 @@
(fp_lib_table
(lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../../stdpads.pretty")(options "")(descr ""))
)

67
sterminator/STERMINATOR.v Normal file
View File

@ -0,0 +1,67 @@
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 06:35:56 10/26/2021
// Design Name:
// Module Name: STERMINATOR
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module STERMINATOR(
input [2:0] FC,
input [31:2] A,
input nWE,
input nAS,
input CLK,
input CLKdat,
input [1:0] CMD,
input STERM,
output nSTERM,
output nFPUCS);
wire ROMCS = FC[2] && ~FC[0] && A[31:28]==4'b0100;
wire RAMCS = FC[2] && ~FC[0] && A[31:30]==2'b00;
wire RAMROMCS = RAMCS || ROMCS;
reg NA;
reg [1:0] NB;
reg [12:0] NR;
reg [8:0] NC;
wire [1:0] AB = A[25:24];
wire [12:0] AR = A[23:11];
wire [8:0] AC = A[10:2];
always @(posedge CLK) begin
if (CMD==1) begin
NA <= 1;
NB <= AB;
NR <= AR;
NC <= AC+1;
end else if (CMD==2) begin
NA <= 0;
end else if (CMD==3) begin
NA <= 0;
end
end
wire NSEL = RAMROMCS && NA && AB==NB && AR==NR && AC==NC;
assign nSTERM = ~(STERM || NSEL);
wire FPUCS = FC[02:00]==3'h7 && A[19:16]==4'h2 && A[15:13]==3'h1;
assign nFPUCS = ~((FPUCS && ~CLKdat) || (FPUCS && ~nAS));
endmodule

36
sterminator/XC9572XL/STERMINATOR.bld Normal file
View File

@ -0,0 +1,36 @@
Release 14.7 ngdbuild P.20131013 (nt)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Command Line: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\ngdbuild.exe -intstyle
ise -dd _ngo -i -p xc9572xl-VQ64-5 STERMINATOR.ngc STERMINATOR.ngd
Reading NGO file
"C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.ngc"
...
Gathering constraint information from source properties...
Done.
Resolving constraint associations...
Checking Constraint Associations...
Done...
Checking expanded design ...
Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------
NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 0
Total memory usage is 130104 kilobytes
Writing NGD file "STERMINATOR.ngd" ...
Total REAL time to NGDBUILD completion: 1 sec
Total CPU time to NGDBUILD completion: 1 sec
Writing NGDBUILD log file "STERMINATOR.bld"...

110
sterminator/XC9572XL/STERMINATOR.cmd_log Normal file
View File

@ -0,0 +1,110 @@
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
taengine -intstyle ise -f STERMINATOR -w --format html1 -l STERMINATOR_html/tim/timing_report.htm
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
taengine -intstyle ise -f STERMINATOR -w --format html1 -l STERMINATOR_html/tim/timing_report.htm
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
taengine -intstyle ise -f STERMINATOR -w --format html1 -l STERMINATOR_html/tim/timing_report.htm
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
taengine -intstyle ise -f STERMINATOR -w --format html1 -l STERMINATOR_html/tim/timing_report.htm
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-10 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-10-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-5 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-5-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
taengine -intstyle ise -f STERMINATOR -w --format html1 -l STERMINATOR_html/tim/timing_report.htm
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
xst -intstyle ise -ifn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.xst" -ofn "C:/Users/zanek/Documents/GitHub/SE-030/sterminator/XC9572XL/STERMINATOR.syr"
ngdbuild -intstyle ise -dd _ngo -i -p xc9572xl-VQ64-5 STERMINATOR.ngc STERMINATOR.ngd
cpldfit -intstyle ise -p xc9572xl-5-VQ64 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper STERMINATOR.ngd
XSLTProcess STERMINATOR_build.xml
tsim -intstyle ise STERMINATOR STERMINATOR.nga
hprep6 -s IEEE1149 -n STERMINATOR -i STERMINATOR
taengine -intstyle ise -f STERMINATOR -w --format html1 -l STERMINATOR_html/tim/timing_report.htm

130
sterminator/XC9572XL/STERMINATOR.gise Normal file
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@ -0,0 +1,130 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
<!-- -->
<!-- For tool use only. Do not edit. -->
<!-- -->
<!-- ProjectNavigator created generated project file. -->
<!-- For use in tracking generated file and other information -->
<!-- allowing preservation of process status. -->
<!-- -->
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="STERMINATOR.xise"/>
<files xmlns="http://www.xilinx.com/XMLSchema">
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="STERMINATOR.bld"/>
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="STERMINATOR.cmd_log"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_GYD" xil_pn:name="STERMINATOR.gyd"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_JEDEC" xil_pn:name="STERMINATOR.jed"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="STERMINATOR.lso"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MFD" xil_pn:name="STERMINATOR.mfd"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGA" xil_pn:name="STERMINATOR.nga"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="STERMINATOR.ngc"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="STERMINATOR.ngd"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="STERMINATOR.ngr"/>
<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="STERMINATOR.pad"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PNX" xil_pn:name="STERMINATOR.pnx"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="STERMINATOR.prj"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="STERMINATOR.rpt"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="STERMINATOR.stx"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="STERMINATOR.syr"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="STERMINATOR.tim"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="STERMINATOR.tspec"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VM6" xil_pn:name="STERMINATOR.vm6"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="STERMINATOR.xml"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="STERMINATOR.xst"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="STERMINATOR_build.xml"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="STERMINATOR_envsettings.html"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="STERMINATOR_html"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="STERMINATOR_ngdbuild.xrpt"/>
<file xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="STERMINATOR_pad.csv"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="STERMINATOR_summary.html"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="STERMINATOR_xst.xrpt"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
<transform xil_pn:end_ts="1635245672" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1635245672">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1635245672" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-5445405998419299105" xil_pn:start_ts="1635245672">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1635296505" xil_pn:in_ck="-928331514634735609" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-3919841149502868206" xil_pn:start_ts="1635296502">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="STERMINATOR.lso"/>
<outfile xil_pn:name="STERMINATOR.ngc"/>
<outfile xil_pn:name="STERMINATOR.ngr"/>
<outfile xil_pn:name="STERMINATOR.prj"/>
<outfile xil_pn:name="STERMINATOR.stx"/>
<outfile xil_pn:name="STERMINATOR.syr"/>
<outfile xil_pn:name="STERMINATOR.xst"/>
<outfile xil_pn:name="STERMINATOR_xst.xrpt"/>
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
<transform xil_pn:end_ts="1635245676" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-5856082998463696326" xil_pn:start_ts="1635245676">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1635296508" xil_pn:in_ck="-7782956398540830978" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="-3408397811283534289" xil_pn:start_ts="1635296505">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="STERMINATOR.bld"/>
<outfile xil_pn:name="STERMINATOR.ngd"/>
<outfile xil_pn:name="STERMINATOR_ngdbuild.xrpt"/>
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
<transform xil_pn:end_ts="1635296516" xil_pn:in_ck="-7782956398540830977" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-3829131459437891296" xil_pn:start_ts="1635296508">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="STERMINATOR.gyd"/>
<outfile xil_pn:name="STERMINATOR.mfd"/>
<outfile xil_pn:name="STERMINATOR.nga"/>
<outfile xil_pn:name="STERMINATOR.pad"/>
<outfile xil_pn:name="STERMINATOR.pnx"/>
<outfile xil_pn:name="STERMINATOR.rpt"/>
<outfile xil_pn:name="STERMINATOR.tim"/>
<outfile xil_pn:name="STERMINATOR.tspec"/>
<outfile xil_pn:name="STERMINATOR.vm6"/>
<outfile xil_pn:name="STERMINATOR.xml"/>
<outfile xil_pn:name="STERMINATOR_build.xml"/>
<outfile xil_pn:name="STERMINATOR_html"/>
<outfile xil_pn:name="STERMINATOR_pad.csv"/>
</transform>
<transform xil_pn:end_ts="1635296518" xil_pn:in_ck="-7782956398540822113" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1635296516">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="STERMINATOR.jed"/>
</transform>
<transform xil_pn:end_ts="1635296522" xil_pn:in_ck="-7782956398540822113" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1635296520">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
</transforms>
</generated_project>

61
sterminator/XC9572XL/STERMINATOR.gyd Normal file
View File

@ -0,0 +1,61 @@
Pin Freeze File: version P.20131013
9572XL64 XC9572XL-5-VQ64
A<10> S:PIN57
A<11> S:PIN2
A<12> S:PIN64
A<13> S:PIN44
A<14> S:PIN51
A<15> S:PIN4
A<16> S:PIN34
A<17> S:PIN58
A<18> S:PIN49
A<19> S:PIN42
A<20> S:PIN36
A<21> S:PIN50
A<22> S:PIN35
A<23> S:PIN48
A<24> S:PIN52
A<25> S:PIN10
A<28> S:PIN46
A<29> S:PIN61
A<2> S:PIN40
A<30> S:PIN62
A<31> S:PIN1
A<3> S:PIN43
A<4> S:PIN20
A<5> S:PIN63
A<6> S:PIN47
A<7> S:PIN7
A<8> S:PIN9
A<9> S:PIN11
CLK S:PIN15
CLKdat S:PIN5
CMD<0> S:PIN39
CMD<1> S:PIN16
FC<0> S:PIN31
FC<1> S:PIN45
FC<2> S:PIN56
STERM S:PIN59
nAS S:PIN6
nFPUCS S:PIN22
nSTERM S:PIN60
;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_8 EXP6_ EXP7_ EXP8_ EXP9_
EXP10_ $OpTx$BIN_STEP$409 EXP11_ EXP12_
EXP13_ EXP14_ EXP15_
PARTITION FB2_2 nSTERM_OBUF
PARTITION FB2_11 NR<9> NR<1> NR<12> NR<11>
NR<10> NR<0> NB<1> NB<0>
PARTITION FB3_1 NR<8> nFPUCS_OBUF NR<7> NR<6>
NR<5> NR<4> NR<3> NR<2>
NC<0> NA NC<8> NC<7>
NC<6> NC<5> NC<4> NC<3>
NC<2> NC<1>

1685
sterminator/XC9572XL/STERMINATOR.jed Normal file
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File diff suppressed because it is too large Load Diff

1
sterminator/XC9572XL/STERMINATOR.lso Normal file
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@ -0,0 +1 @@
work

670
sterminator/XC9572XL/STERMINATOR.mfd Normal file
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@ -0,0 +1,670 @@
MDF Database: version 1.0
MDF_INFO | STERMINATOR | XC9572XL-5-VQ64
MACROCELL | 1 | 17 | NB<0>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 2 | 0 | 10 | 0 | 13
INPUTS | 3 | A<24> | CMD<0> | CMD<1>
INPUTP | 3 | 75 | 54 | 21
EQ | 3 |
NB<0>.D = A<24>;
NB<0>.CLK = CLK; // GCK
NB<0>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 16 | NB<1>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 14
INPUTS | 3 | A<25> | CMD<0> | CMD<1>
INPUTP | 3 | 13 | 54 | 21
EQ | 3 |
NB<1>.D = A<25>;
NB<1>.CLK = CLK; // GCK
NB<1>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 8 | NC<0>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 9
INPUTS | 3 | A<2> | CMD<0> | CMD<1>
INPUTP | 3 | 55 | 54 | 21
EQ | 3 |
NC<0>.D = !A<2>;
NC<0>.CLK = CLK; // GCK
NC<0>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 17 | NC<1>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 15
INPUTS | 4 | A<2> | A<3> | CMD<0> | CMD<1>
INPUTP | 4 | 55 | 62 | 54 | 21
EQ | 4 |
NC<1>.D = A<2>
$ A<3>;
NC<1>.CLK = CLK; // GCK
NC<1>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 16 | NC<2>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 13
INPUTS | 5 | A<4> | A<2> | A<3> | CMD<0> | CMD<1>
INPUTP | 5 | 27 | 55 | 62 | 54 | 21
EQ | 4 |
NC<2>.D = A<4>
$ A<2> & A<3>;
NC<2>.CLK = CLK; // GCK
NC<2>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 15 | NC<3>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 11
INPUTS | 6 | A<5> | A<2> | A<3> | A<4> | CMD<0> | CMD<1>
INPUTP | 6 | 90 | 55 | 62 | 27 | 54 | 21
EQ | 4 |
NC<3>.D = A<5>
$ A<2> & A<3> & A<4>;
NC<3>.CLK = CLK; // GCK
NC<3>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 14 | NC<4>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 14
INPUTS | 7 | A<6> | A<2> | A<3> | A<4> | A<5> | CMD<0> | CMD<1>
INPUTP | 7 | 67 | 55 | 62 | 27 | 90 | 54 | 21
EQ | 4 |
NC<4>.D = A<6>
$ A<2> & A<3> & A<4> & A<5>;
NC<4>.CLK = CLK; // GCK
NC<4>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 13 | NC<5>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 8
INPUTS | 8 | A<7> | A<2> | A<3> | A<4> | A<5> | A<6> | CMD<0> | CMD<1>
INPUTP | 8 | 10 | 55 | 62 | 27 | 90 | 67 | 54 | 21
EQ | 4 |
NC<5>.D = A<7>
$ A<2> & A<3> & A<4> & A<5> & A<6>;
NC<5>.CLK = CLK; // GCK
NC<5>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 12 | NC<6>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 13
INPUTS | 9 | A<8> | A<2> | A<3> | A<4> | A<5> | A<6> | A<7> | CMD<0> | CMD<1>
INPUTP | 9 | 12 | 55 | 62 | 27 | 90 | 67 | 10 | 54 | 21
EQ | 4 |
NC<6>.D = A<8>
$ A<2> & A<3> & A<4> & A<5> & A<6> & A<7>;
NC<6>.CLK = CLK; // GCK
NC<6>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 11 | NC<7>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 11
INPUTS | 10 | A<9> | A<2> | A<3> | A<4> | A<5> | A<6> | A<7> | A<8> | CMD<0> | CMD<1>
INPUTP | 10 | 15 | 55 | 62 | 27 | 90 | 67 | 10 | 12 | 54 | 21
EQ | 5 |
NC<7>.D = A<9>
$ A<2> & A<3> & A<4> & A<5> & A<6> & A<7> &
A<8>;
NC<7>.CLK = CLK; // GCK
NC<7>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 10 | NC<8>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 2 | 0 | 7 | 0 | 16
INPUTS | 11 | A<10> | A<2> | A<3> | A<4> | A<5> | A<6> | A<7> | A<8> | A<9> | CMD<0> | CMD<1>
INPUTP | 11 | 83 | 55 | 62 | 27 | 90 | 67 | 10 | 12 | 15 | 54 | 21
EQ | 5 |
NC<8>.D = A<10>
$ A<2> & A<3> & A<4> & A<5> & A<6> & A<7> &
A<8> & A<9>;
NC<8>.CLK = CLK; // GCK
NC<8>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 15 | NR<0>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 8
INPUTS | 3 | A<11> | CMD<0> | CMD<1>
INPUTP | 3 | 3 | 54 | 21
EQ | 3 |
NR<0>.D = A<11>;
NR<0>.CLK = CLK; // GCK
NR<0>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 14 | NR<10>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 10
INPUTS | 3 | A<21> | CMD<0> | CMD<1>
INPUTP | 3 | 72 | 54 | 21
EQ | 3 |
NR<10>.D = A<21>;
NR<10>.CLK = CLK; // GCK
NR<10>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 13 | NR<11>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 17
INPUTS | 3 | A<22> | CMD<0> | CMD<1>
INPUTP | 3 | 49 | 54 | 21
EQ | 3 |
NR<11>.D = A<22>;
NR<11>.CLK = CLK; // GCK
NR<11>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 12 | NR<12>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 10
INPUTS | 3 | A<23> | CMD<0> | CMD<1>
INPUTP | 3 | 68 | 54 | 21
EQ | 3 |
NR<12>.D = A<23>;
NR<12>.CLK = CLK; // GCK
NR<12>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 11 | NR<1>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 17
INPUTS | 3 | A<12> | CMD<0> | CMD<1>
INPUTP | 3 | 92 | 54 | 21
EQ | 3 |
NR<1>.D = A<12>;
NR<1>.CLK = CLK; // GCK
NR<1>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 7 | NR<2>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 9
INPUTS | 3 | A<13> | CMD<0> | CMD<1>
INPUTP | 3 | 63 | 54 | 21
EQ | 3 |
NR<2>.D = A<13>;
NR<2>.CLK = CLK; // GCK
NR<2>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 6 | NR<3>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 16
INPUTS | 3 | A<14> | CMD<0> | CMD<1>
INPUTP | 3 | 74 | 54 | 21
EQ | 3 |
NR<3>.D = A<14>;
NR<3>.CLK = CLK; // GCK
NR<3>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 5 | NR<4>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 12
INPUTS | 3 | A<15> | CMD<0> | CMD<1>
INPUTP | 3 | 5 | 54 | 21
EQ | 3 |
NR<4>.D = A<15>;
NR<4>.CLK = CLK; // GCK
NR<4>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 4 | NR<5>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 2 | 0 | 9 | 0 | 14
INPUTS | 3 | A<16> | CMD<0> | CMD<1>
INPUTP | 3 | 47 | 54 | 21
EQ | 3 |
NR<5>.D = A<16>;
NR<5>.CLK = CLK; // GCK
NR<5>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 3 | NR<6>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 2 | 0 | 7 | 0 | 17
INPUTS | 3 | A<17> | CMD<0> | CMD<1>
INPUTP | 3 | 84 | 54 | 21
EQ | 3 |
NR<6>.D = A<17>;
NR<6>.CLK = CLK; // GCK
NR<6>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 2 | NR<7>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 2 | 0 | 8 | 0 | 15
INPUTS | 3 | A<18> | CMD<0> | CMD<1>
INPUTP | 3 | 70 | 54 | 21
EQ | 3 |
NR<7>.D = A<18>;
NR<7>.CLK = CLK; // GCK
NR<7>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 0 | NR<8>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 2 | 0 | 12 | 0 | 11
INPUTS | 3 | A<19> | CMD<0> | CMD<1>
INPUTP | 3 | 59 | 54 | 21
EQ | 3 |
NR<8>.D = A<19>;
NR<8>.CLK = CLK; // GCK
NR<8>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 1 | 10 | NR<9>
ATTRIBUTES | 8553280 | 0
OUTPUTMC | 1 | 0 | 16
INPUTS | 3 | A<20> | CMD<0> | CMD<1>
INPUTP | 3 | 50 | 54 | 21
EQ | 3 |
NR<9>.D = A<20>;
NR<9>.CLK = CLK; // GCK
NR<9>.CE = CMD<0> & !CMD<1>;
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 9 | NA
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 2 | 2 | 9 | 1 | 1
INPUTS | 3 | CMD<0> | CMD<1> | NA
INPUTMC | 1 | 2 | 9
INPUTP | 2 | 54 | 21
EQ | 3 |
NA.D = CMD<0> & !CMD<1>
# !CMD<1> & NA;
NA.CLK = CLK; // GCK
GLOBALS | 1 | 2 | CLK
MACROCELL | 2 | 1 | nFPUCS_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 12 | FC<1> | FC<0> | A<17> | A<13> | A<14> | A<15> | A<16> | A<18> | A<19> | FC<2> | nAS | CLKdat
INPUTP | 12 | 65 | 43 | 84 | 63 | 74 | 5 | 47 | 70 | 59 | 82 | 9 | 7
EQ | 4 |
!nFPUCS = FC<1> & FC<0> & A<17> & A<13> & !A<14> & !A<15> &
!A<16> & !A<18> & !A<19> & FC<2> & !nAS
# FC<1> & FC<0> & A<17> & A<13> & !A<14> & !A<15> &
!A<16> & !A<18> & !A<19> & FC<2> & !CLKdat;
MACROCELL | 1 | 1 | nSTERM_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 4 | STERM | $OpTx$BIN_STEP$409 | FC<0> | NA
INPUTMC | 2 | 0 | 12 | 2 | 9
INPUTP | 2 | 86 | 43
EQ | 2 |
!nSTERM = STERM & !$OpTx$BIN_STEP$409
# !FC<0> & NA & !$OpTx$BIN_STEP$409;
MACROCELL | 0 | 12 | $OpTx$BIN_STEP$409
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 1 | 1
INPUTS | 9 | A<31> | STERM | FC<2> | A<15> | NR<4> | A<19> | NR<8> | EXP10_.EXP | EXP11_.EXP
INPUTMC | 4 | 2 | 5 | 2 | 0 | 0 | 11 | 0 | 13
INPUTP | 5 | 1 | 86 | 82 | 5 | 59
IMPORTS | 2 | 0 | 11 | 0 | 13
EQ | 62 |
$OpTx$BIN_STEP$409 = !FC<2> & !STERM
# A<31> & !STERM
# A<15> & !NR<4> & !STERM
# !A<15> & NR<4> & !STERM
# !A<19> & NR<8> & !STERM
;Imported pterms FB1_12
# A<5> & !NC<3> & !STERM
# !A<5> & NC<3> & !STERM
# A<9> & !NC<7> & !STERM
# !A<9> & NC<7> & !STERM
# A<19> & !NR<8> & !STERM
;Imported pterms FB1_11
# A<24> & !NB<0> & !STERM
# A<21> & !NR<10> & !STERM
# !A<21> & NR<10> & !STERM
# A<23> & !NR<12> & !STERM
# !A<23> & NR<12> & !STERM
;Imported pterms FB1_10
# A<13> & !NR<2> & !STERM
# !A<13> & NR<2> & !STERM
# A<2> & !NC<0> & !STERM
# !A<2> & NC<0> & !STERM
# A<16> & !NR<5> & !STERM
;Imported pterms FB1_9
# A<7> & !NC<5> & !STERM
# !A<7> & NC<5> & !STERM
# A<11> & !NR<0> & !STERM
# !A<11> & NR<0> & !STERM
# A<18> & !NR<7> & !STERM
;Imported pterms FB1_8
# !A<17> & NR<6> & !STERM
# A<10> & !NC<8> & !STERM
;Imported pterms FB1_14
# !A<24> & NB<0> & !STERM
# A<4> & !NC<2> & !STERM
# !A<4> & NC<2> & !STERM
# A<8> & !NC<6> & !STERM
# !A<8> & NC<6> & !STERM
;Imported pterms FB1_15
# A<25> & !NB<1> & !STERM
# !A<25> & NB<1> & !STERM
# A<6> & !NC<4> & !STERM
# !A<6> & NC<4> & !STERM
# !A<16> & NR<5> & !STERM
;Imported pterms FB1_16
# A<3> & !NC<1> & !STERM
# !A<3> & NC<1> & !STERM
# !A<18> & NR<7> & !STERM
# A<30> & A<29> & !STERM
# A<30> & A<28> & !STERM
;Imported pterms FB1_17
# !A<10> & NC<8> & !STERM
# A<14> & !NR<3> & !STERM
# !A<14> & NR<3> & !STERM
# A<20> & !NR<9> & !STERM
# !A<20> & NR<9> & !STERM
;Imported pterms FB1_18
# A<17> & !NR<6> & !STERM
# A<22> & !NR<11> & !STERM
# !A<22> & NR<11> & !STERM
# A<12> & !NR<1> & !STERM
# !A<12> & NR<1> & !STERM;
MACROCELL | 0 | 7 | EXP6_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 8
INPUTS | 5 | A<17> | NR<6> | STERM | A<10> | NC<8>
INPUTMC | 2 | 2 | 3 | 2 | 10
INPUTP | 3 | 84 | 86 | 83
EXPORTS | 1 | 0 | 8
EQ | 2 |
EXP6_.EXP = !A<17> & NR<6> & !STERM
# A<10> & !NC<8> & !STERM
MACROCELL | 0 | 8 | EXP7_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 9
INPUTS | 8 | A<7> | NC<5> | STERM | A<11> | NR<0> | A<18> | NR<7> | EXP6_.EXP
INPUTMC | 4 | 2 | 13 | 1 | 15 | 2 | 2 | 0 | 7
INPUTP | 4 | 10 | 86 | 3 | 70
EXPORTS | 1 | 0 | 9
IMPORTS | 1 | 0 | 7
EQ | 8 |
EXP7_.EXP = A<7> & !NC<5> & !STERM
# !A<7> & NC<5> & !STERM
# A<11> & !NR<0> & !STERM
# !A<11> & NR<0> & !STERM
# A<18> & !NR<7> & !STERM
;Imported pterms FB1_8
# !A<17> & NR<6> & !STERM
# A<10> & !NC<8> & !STERM
MACROCELL | 0 | 9 | EXP8_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 10
INPUTS | 8 | A<13> | NR<2> | STERM | A<2> | NC<0> | A<16> | NR<5> | EXP7_.EXP
INPUTMC | 4 | 2 | 7 | 2 | 8 | 2 | 4 | 0 | 8
INPUTP | 4 | 63 | 86 | 55 | 47
EXPORTS | 1 | 0 | 10
IMPORTS | 1 | 0 | 8
EQ | 14 |
EXP8_.EXP = A<13> & !NR<2> & !STERM
# !A<13> & NR<2> & !STERM
# A<2> & !NC<0> & !STERM
# !A<2> & NC<0> & !STERM
# A<16> & !NR<5> & !STERM
;Imported pterms FB1_9
# A<7> & !NC<5> & !STERM
# !A<7> & NC<5> & !STERM
# A<11> & !NR<0> & !STERM
# !A<11> & NR<0> & !STERM
# A<18> & !NR<7> & !STERM
;Imported pterms FB1_8
# !A<17> & NR<6> & !STERM
# A<10> & !NC<8> & !STERM
MACROCELL | 0 | 10 | EXP9_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 11
INPUTS | 8 | A<24> | NB<0> | STERM | A<21> | NR<10> | A<23> | NR<12> | EXP8_.EXP
INPUTMC | 4 | 1 | 17 | 1 | 14 | 1 | 12 | 0 | 9
INPUTP | 4 | 75 | 86 | 72 | 68
EXPORTS | 1 | 0 | 11
IMPORTS | 1 | 0 | 9
EQ | 20 |
EXP9_.EXP = A<24> & !NB<0> & !STERM
# A<21> & !NR<10> & !STERM
# !A<21> & NR<10> & !STERM
# A<23> & !NR<12> & !STERM
# !A<23> & NR<12> & !STERM
;Imported pterms FB1_10
# A<13> & !NR<2> & !STERM
# !A<13> & NR<2> & !STERM
# A<2> & !NC<0> & !STERM
# !A<2> & NC<0> & !STERM
# A<16> & !NR<5> & !STERM
;Imported pterms FB1_9
# A<7> & !NC<5> & !STERM
# !A<7> & NC<5> & !STERM
# A<11> & !NR<0> & !STERM
# !A<11> & NR<0> & !STERM
# A<18> & !NR<7> & !STERM
;Imported pterms FB1_8
# !A<17> & NR<6> & !STERM
# A<10> & !NC<8> & !STERM
MACROCELL | 0 | 11 | EXP10_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 12
INPUTS | 8 | A<5> | NC<3> | STERM | A<9> | NC<7> | A<19> | NR<8> | EXP9_.EXP
INPUTMC | 4 | 2 | 15 | 2 | 11 | 2 | 0 | 0 | 10
INPUTP | 4 | 90 | 86 | 15 | 59
EXPORTS | 1 | 0 | 12
IMPORTS | 1 | 0 | 10
EQ | 26 |
EXP10_.EXP = A<5> & !NC<3> & !STERM
# !A<5> & NC<3> & !STERM
# A<9> & !NC<7> & !STERM
# !A<9> & NC<7> & !STERM
# A<19> & !NR<8> & !STERM
;Imported pterms FB1_11
# A<24> & !NB<0> & !STERM
# A<21> & !NR<10> & !STERM
# !A<21> & NR<10> & !STERM
# A<23> & !NR<12> & !STERM
# !A<23> & NR<12> & !STERM
;Imported pterms FB1_10
# A<13> & !NR<2> & !STERM
# !A<13> & NR<2> & !STERM
# A<2> & !NC<0> & !STERM
# !A<2> & NC<0> & !STERM
# A<16> & !NR<5> & !STERM
;Imported pterms FB1_9
# A<7> & !NC<5> & !STERM
# !A<7> & NC<5> & !STERM
# A<11> & !NR<0> & !STERM
# !A<11> & NR<0> & !STERM
# A<18> & !NR<7> & !STERM
;Imported pterms FB1_8
# !A<17> & NR<6> & !STERM
# A<10> & !NC<8> & !STERM
MACROCELL | 0 | 13 | EXP11_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 12
INPUTS | 8 | A<24> | NB<0> | STERM | A<4> | NC<2> | A<8> | NC<6> | EXP12_.EXP
INPUTMC | 4 | 1 | 17 | 2 | 16 | 2 | 12 | 0 | 14
INPUTP | 4 | 75 | 86 | 27 | 12
EXPORTS | 1 | 0 | 12
IMPORTS | 1 | 0 | 14
EQ | 29 |
EXP11_.EXP = !A<24> & NB<0> & !STERM
# A<4> & !NC<2> & !STERM
# !A<4> & NC<2> & !STERM
# A<8> & !NC<6> & !STERM
# !A<8> & NC<6> & !STERM
;Imported pterms FB1_15
# A<25> & !NB<1> & !STERM
# !A<25> & NB<1> & !STERM
# A<6> & !NC<4> & !STERM
# !A<6> & NC<4> & !STERM
# !A<16> & NR<5> & !STERM
;Imported pterms FB1_16
# A<3> & !NC<1> & !STERM
# !A<3> & NC<1> & !STERM
# !A<18> & NR<7> & !STERM
# A<30> & A<29> & !STERM
# A<30> & A<28> & !STERM
;Imported pterms FB1_17
# !A<10> & NC<8> & !STERM
# A<14> & !NR<3> & !STERM
# !A<14> & NR<3> & !STERM
# A<20> & !NR<9> & !STERM
# !A<20> & NR<9> & !STERM
;Imported pterms FB1_18
# A<17> & !NR<6> & !STERM
# A<22> & !NR<11> & !STERM
# !A<22> & NR<11> & !STERM
# A<12> & !NR<1> & !STERM
# !A<12> & NR<1> & !STERM
MACROCELL | 0 | 14 | EXP12_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 13
INPUTS | 8 | A<25> | NB<1> | STERM | A<6> | NC<4> | A<16> | NR<5> | EXP13_.EXP
INPUTMC | 4 | 1 | 16 | 2 | 14 | 2 | 4 | 0 | 15
INPUTP | 4 | 13 | 86 | 67 | 47
EXPORTS | 1 | 0 | 13
IMPORTS | 1 | 0 | 15
EQ | 23 |
EXP12_.EXP = A<25> & !NB<1> & !STERM
# !A<25> & NB<1> & !STERM
# A<6> & !NC<4> & !STERM
# !A<6> & NC<4> & !STERM
# !A<16> & NR<5> & !STERM
;Imported pterms FB1_16
# A<3> & !NC<1> & !STERM
# !A<3> & NC<1> & !STERM
# !A<18> & NR<7> & !STERM
# A<30> & A<29> & !STERM
# A<30> & A<28> & !STERM
;Imported pterms FB1_17
# !A<10> & NC<8> & !STERM
# A<14> & !NR<3> & !STERM
# !A<14> & NR<3> & !STERM
# A<20> & !NR<9> & !STERM
# !A<20> & NR<9> & !STERM
;Imported pterms FB1_18
# A<17> & !NR<6> & !STERM
# A<22> & !NR<11> & !STERM
# !A<22> & NR<11> & !STERM
# A<12> & !NR<1> & !STERM
# !A<12> & NR<1> & !STERM
MACROCELL | 0 | 15 | EXP13_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 14
INPUTS | 9 | A<3> | NC<1> | STERM | A<18> | NR<7> | A<30> | A<29> | A<28> | EXP14_.EXP
INPUTMC | 3 | 2 | 17 | 2 | 2 | 0 | 16
INPUTP | 6 | 62 | 86 | 70 | 89 | 88 | 66
EXPORTS | 1 | 0 | 14
IMPORTS | 1 | 0 | 16
EQ | 17 |
EXP13_.EXP = A<3> & !NC<1> & !STERM
# !A<3> & NC<1> & !STERM
# !A<18> & NR<7> & !STERM
# A<30> & A<29> & !STERM
# A<30> & A<28> & !STERM
;Imported pterms FB1_17
# !A<10> & NC<8> & !STERM
# A<14> & !NR<3> & !STERM
# !A<14> & NR<3> & !STERM
# A<20> & !NR<9> & !STERM
# !A<20> & NR<9> & !STERM
;Imported pterms FB1_18
# A<17> & !NR<6> & !STERM
# A<22> & !NR<11> & !STERM
# !A<22> & NR<11> & !STERM
# A<12> & !NR<1> & !STERM
# !A<12> & NR<1> & !STERM
MACROCELL | 0 | 16 | EXP14_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 15
INPUTS | 8 | A<10> | NC<8> | STERM | A<14> | NR<3> | A<20> | NR<9> | EXP15_.EXP
INPUTMC | 4 | 2 | 10 | 2 | 6 | 1 | 10 | 0 | 17
INPUTP | 4 | 83 | 86 | 74 | 50
EXPORTS | 1 | 0 | 15
IMPORTS | 1 | 0 | 17
EQ | 11 |
EXP14_.EXP = !A<10> & NC<8> & !STERM
# A<14> & !NR<3> & !STERM
# !A<14> & NR<3> & !STERM
# A<20> & !NR<9> & !STERM
# !A<20> & NR<9> & !STERM
;Imported pterms FB1_18
# A<17> & !NR<6> & !STERM
# A<22> & !NR<11> & !STERM
# !A<22> & NR<11> & !STERM
# A<12> & !NR<1> & !STERM
# !A<12> & NR<1> & !STERM
MACROCELL | 0 | 17 | EXP15_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 16
INPUTS | 7 | A<17> | NR<6> | STERM | A<22> | NR<11> | A<12> | NR<1>
INPUTMC | 3 | 2 | 3 | 1 | 13 | 1 | 11
INPUTP | 4 | 84 | 86 | 49 | 92
EXPORTS | 1 | 0 | 16
EQ | 5 |
EXP15_.EXP = A<17> & !NR<6> & !STERM
# A<22> & !NR<11> & !STERM
# !A<22> & NR<11> & !STERM
# A<12> & !NR<1> & !STERM
# !A<12> & NR<1> & !STERM
PIN | FC<1> | 64 | 0 | N/A | 65 | 1 | 2 | 1
PIN | FC<0> | 64 | 0 | N/A | 43 | 2 | 2 | 1 | 1 | 1
PIN | A<17> | 64 | 0 | N/A | 84 | 4 | 2 | 3 | 2 | 1 | 0 | 7 | 0 | 17
PIN | A<13> | 64 | 0 | N/A | 63 | 3 | 2 | 7 | 2 | 1 | 0 | 9
PIN | A<24> | 64 | 0 | N/A | 75 | 3 | 1 | 17 | 0 | 10 | 0 | 13
PIN | CLK | 4096 | 0 | N/A | 20 | 25 | 1 | 17 | 1 | 16 | 2 | 8 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 1 | 15 | 1 | 14 | 1 | 13 | 1 | 12 | 1 | 11 | 2 | 7 | 2 | 6 | 2 | 5 | 2 | 4 | 2 | 3 | 2 | 2 | 2 | 0 | 1 | 10 | 2 | 9
PIN | CMD<0> | 64 | 0 | N/A | 54 | 25 | 1 | 17 | 1 | 16 | 2 | 8 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 1 | 15 | 1 | 14 | 1 | 13 | 1 | 12 | 1 | 11 | 2 | 7 | 2 | 6 | 2 | 5 | 2 | 4 | 2 | 3 | 2 | 2 | 2 | 0 | 1 | 10 | 2 | 9
PIN | CMD<1> | 64 | 0 | N/A | 21 | 25 | 1 | 17 | 1 | 16 | 2 | 8 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 1 | 15 | 1 | 14 | 1 | 13 | 1 | 12 | 1 | 11 | 2 | 7 | 2 | 6 | 2 | 5 | 2 | 4 | 2 | 3 | 2 | 2 | 2 | 0 | 1 | 10 | 2 | 9
PIN | A<25> | 64 | 0 | N/A | 13 | 2 | 1 | 16 | 0 | 14
PIN | A<2> | 64 | 0 | N/A | 55 | 10 | 2 | 8 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 9
PIN | A<3> | 64 | 0 | N/A | 62 | 9 | 2 | 17 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 15
PIN | A<4> | 64 | 0 | N/A | 27 | 8 | 2 | 16 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 13
PIN | A<5> | 64 | 0 | N/A | 90 | 7 | 2 | 15 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 11
PIN | A<6> | 64 | 0 | N/A | 67 | 6 | 2 | 14 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 14
PIN | A<7> | 64 | 0 | N/A | 10 | 5 | 2 | 13 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 8
PIN | A<8> | 64 | 0 | N/A | 12 | 4 | 2 | 12 | 2 | 11 | 2 | 10 | 0 | 13
PIN | A<9> | 64 | 0 | N/A | 15 | 3 | 2 | 11 | 2 | 10 | 0 | 11
PIN | A<10> | 64 | 0 | N/A | 83 | 3 | 2 | 10 | 0 | 7 | 0 | 16
PIN | A<11> | 64 | 0 | N/A | 3 | 2 | 1 | 15 | 0 | 8
PIN | A<21> | 64 | 0 | N/A | 72 | 2 | 1 | 14 | 0 | 10
PIN | A<22> | 64 | 0 | N/A | 49 | 2 | 1 | 13 | 0 | 17
PIN | A<23> | 64 | 0 | N/A | 68 | 2 | 1 | 12 | 0 | 10
PIN | A<12> | 64 | 0 | N/A | 92 | 2 | 1 | 11 | 0 | 17
PIN | A<14> | 64 | 0 | N/A | 74 | 3 | 2 | 6 | 2 | 1 | 0 | 16
PIN | A<15> | 64 | 0 | N/A | 5 | 3 | 2 | 5 | 2 | 1 | 0 | 12
PIN | A<16> | 64 | 0 | N/A | 47 | 4 | 2 | 4 | 2 | 1 | 0 | 9 | 0 | 14
PIN | A<18> | 64 | 0 | N/A | 70 | 4 | 2 | 2 | 2 | 1 | 0 | 8 | 0 | 15
PIN | A<19> | 64 | 0 | N/A | 59 | 4 | 2 | 0 | 2 | 1 | 0 | 12 | 0 | 11
PIN | A<20> | 64 | 0 | N/A | 50 | 2 | 1 | 10 | 0 | 16
PIN | FC<2> | 64 | 0 | N/A | 82 | 2 | 2 | 1 | 0 | 12
PIN | nAS | 64 | 0 | N/A | 9 | 1 | 2 | 1
PIN | CLKdat | 64 | 0 | N/A | 7 | 1 | 2 | 1
PIN | A<30> | 64 | 0 | N/A | 89 | 1 | 0 | 15
PIN | A<29> | 64 | 0 | N/A | 88 | 1 | 0 | 15
PIN | A<28> | 64 | 0 | N/A | 66 | 1 | 0 | 15
PIN | A<31> | 64 | 0 | N/A | 1 | 1 | 0 | 12
PIN | STERM | 64 | 0 | N/A | 86 | 12 | 1 | 1 | 0 | 12 | 0 | 7 | 0 | 8 | 0 | 9 | 0 | 10 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 15 | 0 | 16 | 0 | 17
PIN | nFPUCS | 536871040 | 0 | N/A | 29
PIN | nSTERM | 536871040 | 0 | N/A | 87

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Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
10-26-2021 9:01PM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
character is used as the data field separator.
This file is also designed to support parsing.
Input file: STERMINATOR.ngd
output file: STERMINATOR.pad
Part type: xc9572xl
Speed grade: -5
Package: vq64
Pinout by Pin Number:
-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
Pin Number|Signal Name|Pin Usage|Pin Name|Direction|IO Standard|IO Bank Number|{blank}|Slew Rate|Termination|{blank}|Voltage|Constraint|
P1|A<31>|I|I/O|INPUT|||||||||
P2|A<11>|I|I/O/GTS2|INPUT|||||||||
P3|VCC||VCCINT||||||||||
P4|A<15>|I|I/O|INPUT|||||||||
P5|CLKdat|I|I/O/GTS1|INPUT|||||||||
P6|nAS|I|I/O|INPUT|||||||||
P7|A<7>|I|I/O|INPUT|||||||||
P8|TIE||I/O||||||||||
P9|A<8>|I|I/O|INPUT|||||||||
P10|A<25>|I|I/O|INPUT|||||||||
P11|A<9>|I|I/O|INPUT|||||||||
P12|TIE||I/O||||||||||
P13|TIE||I/O||||||||||
P14|GND||GND||||||||||
P15|CLK|GCK|I/O/GCK1||||||||||
P16|CMD<1>|I|I/O/GCK2|INPUT|||||||||
P17|TIE||I/O/GCK3||||||||||
P18|TIE||I/O||||||||||
P19|TIE||I/O||||||||||
P20|A<4>|I|I/O|INPUT|||||||||
P21|GND||GND||||||||||
P22|nFPUCS|O|I/O|OUTPUT|||||||||
P23|TIE||I/O||||||||||
P24|TIE||I/O||||||||||
P25|TIE||I/O||||||||||
P26|VCC||VCCIO||||||||||
P27|TIE||I/O||||||||||
P28|TDI||TDI||||||||||
P29|TMS||TMS||||||||||
P30|TCK||TCK||||||||||
P31|FC<0>|I|I/O|INPUT|||||||||
P32|TIE||I/O||||||||||
P33|TIE||I/O||||||||||
P34|A<16>|I|I/O|INPUT|||||||||
P35|A<22>|I|I/O|INPUT|||||||||
P36|A<20>|I|I/O|INPUT|||||||||
P37|VCC||VCCINT||||||||||
P38|TIE||I/O||||||||||
P39|CMD<0>|I|I/O|INPUT|||||||||
P40|A<2>|I|I/O|INPUT|||||||||
P41|GND||GND||||||||||
P42|A<19>|I|I/O|INPUT|||||||||
P43|A<3>|I|I/O|INPUT|||||||||
P44|A<13>|I|I/O|INPUT|||||||||
P45|FC<1>|I|I/O|INPUT|||||||||
P46|A<28>|I|I/O|INPUT|||||||||
P47|A<6>|I|I/O|INPUT|||||||||
P48|A<23>|I|I/O|INPUT|||||||||
P49|A<18>|I|I/O|INPUT|||||||||
P50|A<21>|I|I/O|INPUT|||||||||
P51|A<14>|I|I/O|INPUT|||||||||
P52|A<24>|I|I/O|INPUT|||||||||
P53|TDO||TDO||||||||||
P54|GND||GND||||||||||
P55|VCC||VCCIO||||||||||
P56|FC<2>|I|I/O|INPUT|||||||||
P57|A<10>|I|I/O|INPUT|||||||||
P58|A<17>|I|I/O|INPUT|||||||||
P59|STERM|I|I/O|INPUT|||||||||
P60|nSTERM|O|I/O|OUTPUT|||||||||
P61|A<29>|I|I/O|INPUT|||||||||
P62|A<30>|I|I/O|INPUT|||||||||
P63|A<5>|I|I/O|INPUT|||||||||
P64|A<12>|I|I/O/GSR|INPUT|||||||||
To preserve the pinout above for future design iterations in
Project Navigator simply execute the (Lock Pins) process
located under the (Implement Design) process in a toolbox named
(Optional Implementation Tools) or invoke PIN2UCF from the
command line. The location constraints will be written into your
specified UCF file

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<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE ibis [
<!ELEMENT ibis (part, pin+)>
<!ELEMENT part EMPTY>
<!ELEMENT pin EMPTY>
<!ATTLIST part
arch CDATA #REQUIRED
device CDATA #REQUIRED
spg CDATA #REQUIRED
pkg CDATA #REQUIRED>
<!ATTLIST pin
nm CDATA #REQUIRED
no CDATA #REQUIRED
iostd (TTL|LVTTL|LVCMOS2|NA) "NA"
sr (SLOW|FAST|slow|fast) "SLOW"
dir (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
]>
<ibis><part arch="xc9500xl" device="XC9572XL" pkg="VQ64" spg="-5"/><pin dir="input" nm="FC&lt;1&gt;" no="45"/><pin dir="input" nm="FC&lt;0&gt;" no="31"/><pin dir="input" nm="A&lt;17&gt;" no="58"/><pin dir="input" nm="A&lt;13&gt;" no="44"/><pin dir="input" nm="A&lt;24&gt;" no="52"/><pin dir="input" nm="CLK" no="15"/><pin dir="input" nm="CMD&lt;0&gt;" no="39"/><pin dir="input" nm="CMD&lt;1&gt;" no="16"/><pin dir="input" nm="A&lt;25&gt;" no="10"/><pin dir="input" nm="A&lt;2&gt;" no="40"/><pin dir="input" nm="A&lt;3&gt;" no="43"/><pin dir="input" nm="A&lt;4&gt;" no="20"/><pin dir="input" nm="A&lt;5&gt;" no="63"/><pin dir="input" nm="A&lt;6&gt;" no="47"/><pin dir="input" nm="A&lt;7&gt;" no="7"/><pin dir="input" nm="A&lt;8&gt;" no="9"/><pin dir="input" nm="A&lt;9&gt;" no="11"/><pin dir="input" nm="A&lt;10&gt;" no="57"/><pin dir="input" nm="A&lt;11&gt;" no="2"/><pin dir="input" nm="A&lt;21&gt;" no="50"/><pin dir="input" nm="A&lt;22&gt;" no="35"/><pin dir="input" nm="A&lt;23&gt;" no="48"/><pin dir="input" nm="A&lt;12&gt;" no="64"/><pin dir="input" nm="A&lt;14&gt;" no="51"/><pin dir="input" nm="A&lt;15&gt;" no="4"/><pin dir="input" nm="A&lt;16&gt;" no="34"/><pin dir="input" nm="A&lt;18&gt;" no="49"/><pin dir="input" nm="A&lt;19&gt;" no="42"/><pin dir="input" nm="A&lt;20&gt;" no="36"/><pin dir="input" nm="FC&lt;2&gt;" no="56"/><pin dir="input" nm="nAS" no="6"/><pin dir="input" nm="CLKdat" no="5"/><pin dir="input" nm="A&lt;30&gt;" no="62"/><pin dir="input" nm="A&lt;29&gt;" no="61"/><pin dir="input" nm="A&lt;28&gt;" no="46"/><pin dir="input" nm="A&lt;31&gt;" no="1"/><pin dir="input" nm="STERM" no="59"/><pin dir="output" nm="nFPUCS" no="22" sr="fast"/><pin dir="output" nm="nSTERM" no="60" sr="fast"/></ibis>

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verilog work "../STERMINATOR.v"

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cpldfit: version P.20131013 Xilinx Inc.
Fitter Report
Design Name: STERMINATOR Date: 10-26-2021, 9:01PM
Device Used: XC9572XL-5-VQ64
Fitting Status: Successful
************************* Mapped Resource Summary **************************
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
28 /72 ( 39%) 114 /360 ( 32%) 92 /216 ( 43%) 25 /72 ( 35%) 39 /52 ( 75%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO
Block Used/Tot Used/Tot Used/Tot Used/Tot
FB1 1/18 54/54* 52/90 6/13
FB2 9/18 14/54 18/90 13/13*
FB3 18/18* 24/54 44/90 8/14
FB4 0/18 0/54 0/90 12/12*
----- ----- ----- -----
28/72 92/216 114/360 39/52
* - Resource is exhausted
** Global Control Resources **
Signal 'CLK' mapped onto global clock net GCK1.
Global output enable net(s) unused.
Global set/reset net(s) unused.
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 36 36 | I/O : 34 46
Output : 2 2 | GCK/IO : 2 3
Bidirectional : 0 0 | GTS/IO : 2 2
GCK : 1 1 | GSR/IO : 1 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 39 39
** Power Data **
There are 28 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
************************** Errors and Warnings ***************************
WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
use the default filename of 'STERMINATOR.ise'.
************************* Summary of Mapped Logic ************************
** 2 Outputs **
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
nSTERM 2 4 FB2_2 60 I/O O STD FAST
nFPUCS 2 12 FB3_2 22 I/O O STD FAST
** 26 Buried Nodes **
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
$OpTx$BIN_STEP$409 52 54 FB1_13 STD
NR<9> 2 3 FB2_11 STD RESET
NR<1> 2 3 FB2_12 STD RESET
NR<12> 2 3 FB2_13 STD RESET
NR<11> 2 3 FB2_14 STD RESET
NR<10> 2 3 FB2_15 STD RESET
NR<0> 2 3 FB2_16 STD RESET
NB<1> 2 3 FB2_17 STD RESET
NB<0> 2 3 FB2_18 STD RESET
NR<8> 2 3 FB3_1 STD RESET
NR<7> 2 3 FB3_3 STD RESET
NR<6> 2 3 FB3_4 STD RESET
NR<5> 2 3 FB3_5 STD RESET
NR<4> 2 3 FB3_6 STD RESET
NR<3> 2 3 FB3_7 STD RESET
NR<2> 2 3 FB3_8 STD RESET
NC<0> 2 3 FB3_9 STD RESET
NA 2 3 FB3_10 STD RESET
NC<8> 3 11 FB3_11 STD RESET
NC<7> 3 10 FB3_12 STD RESET
NC<6> 3 9 FB3_13 STD RESET
NC<5> 3 8 FB3_14 STD RESET
NC<4> 3 7 FB3_15 STD RESET
NC<3> 3 6 FB3_16 STD RESET
NC<2> 3 5 FB3_17 STD RESET
NC<1> 3 4 FB3_18 STD RESET
** 37 Inputs **
Signal Loc Pin Pin Pin
Name No. Type Use
A<8> FB1_5 9 I/O I
A<25> FB1_6 10 I/O I
A<9> FB1_8 11 I/O I
CLK FB1_9 15~ GCK/I/O GCK
CMD<1> FB1_11 16 GCK/I/O I
A<4> FB1_17 20 I/O I
A<17> FB2_3 58 I/O I
STERM FB2_4 59 I/O I
A<29> FB2_5 61 I/O I
A<30> FB2_6 62 I/O I
A<5> FB2_8 63 I/O I
A<12> FB2_9 64 GSR/I/O I
A<31> FB2_10 1 I/O I
A<11> FB2_11 2 GTS/I/O I
A<15> FB2_12 4 I/O I
CLKdat FB2_14 5 GTS/I/O I
nAS FB2_15 6 I/O I
A<7> FB2_17 7 I/O I
FC<0> FB3_3 31 I/O I
A<16> FB3_6 34 I/O I
CMD<0> FB3_10 39 I/O I
A<2> FB3_12 40 I/O I
A<22> FB3_14 35 I/O I
A<20> FB3_15 36 I/O I
A<19> FB3_16 42 I/O I
A<3> FB4_2 43 I/O I
A<28> FB4_3 46 I/O I
A<6> FB4_4 47 I/O I
A<13> FB4_5 44 I/O I
A<18> FB4_6 49 I/O I
FC<1> FB4_8 45 I/O I
A<14> FB4_10 51 I/O I
A<23> FB4_11 48 I/O I
A<24> FB4_12 52 I/O I
A<21> FB4_14 50 I/O I
FC<2> FB4_15 56 I/O I
A<10> FB4_17 57 I/O I
Legend:
Pin No. - ~ - User Assigned
************************** Function Block Details ************************
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X - Signal used as input to the macrocell logic.
Pin No. - ~ - User Assigned
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 54/0
Number of signals used by logic mapping into function block: 54
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB1_1 (b)
(unused) 0 0 0 5 FB1_2 8 I/O
(unused) 0 0 0 5 FB1_3 12 I/O
(unused) 0 0 0 5 FB1_4 13 I/O
(unused) 0 0 0 5 FB1_5 9 I/O I
(unused) 0 0 0 5 FB1_6 10 I/O I
(unused) 0 0 0 5 FB1_7 (b)
(unused) 0 0 \/2 3 FB1_8 11 I/O I
(unused) 0 0 \/5 0 FB1_9 15 GCK/I/O GCK
(unused) 0 0 \/5 0 FB1_10 18 I/O (b)
(unused) 0 0 \/5 0 FB1_11 16 GCK/I/O I
(unused) 0 0 \/5 0 FB1_12 23 I/O (b)
$OpTx$BIN_STEP$409 52 47<- 0 0 FB1_13 (b) (b)
(unused) 0 0 /\5 0 FB1_14 17 GCK/I/O (b)
(unused) 0 0 /\5 0 FB1_15 19 I/O (b)
(unused) 0 0 /\5 0 FB1_16 (b) (b)
(unused) 0 0 /\5 0 FB1_17 20 I/O I
(unused) 0 0 /\5 0 FB1_18 (b) (b)
Signals Used by Logic in Function Block
1: A<10> 19: A<2> 37: NC<5>
2: A<11> 20: A<30> 38: NC<6>
3: A<12> 21: A<31> 39: NC<7>
4: A<13> 22: A<3> 40: NC<8>
5: A<14> 23: A<4> 41: NR<0>
6: A<15> 24: A<5> 42: NR<10>
7: A<16> 25: A<6> 43: NR<11>
8: A<17> 26: A<7> 44: NR<12>
9: A<18> 27: A<8> 45: NR<1>
10: A<19> 28: A<9> 46: NR<2>
11: A<20> 29: FC<2> 47: NR<3>
12: A<21> 30: NB<0> 48: NR<4>
13: A<22> 31: NB<1> 49: NR<5>
14: A<23> 32: NC<0> 50: NR<6>
15: A<24> 33: NC<1> 51: NR<7>
16: A<25> 34: NC<2> 52: NR<8>
17: A<28> 35: NC<3> 53: NR<9>
18: A<29> 36: NC<4> 54: STERM
Signal 1 2 3 4 5 6 FB
Name 0----+----0----+----0----+----0----+----0----+----0----+----0 Inputs
$OpTx$BIN_STEP$409 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX...... 54
0----+----1----+----2----+----3----+----4----+----5----+----6
0 0 0 0 0 0
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 14/40
Number of signals used by logic mapping into function block: 14
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB2_1 (b)
nSTERM 2 0 0 3 FB2_2 60 I/O O
(unused) 0 0 0 5 FB2_3 58 I/O I
(unused) 0 0 0 5 FB2_4 59 I/O I
(unused) 0 0 0 5 FB2_5 61 I/O I
(unused) 0 0 0 5 FB2_6 62 I/O I
(unused) 0 0 0 5 FB2_7 (b)
(unused) 0 0 0 5 FB2_8 63 I/O I
(unused) 0 0 0 5 FB2_9 64 GSR/I/O I
(unused) 0 0 0 5 FB2_10 1 I/O I
NR<9> 2 0 0 3 FB2_11 2 GTS/I/O I
NR<1> 2 0 0 3 FB2_12 4 I/O I
NR<12> 2 0 0 3 FB2_13 (b) (b)
NR<11> 2 0 0 3 FB2_14 5 GTS/I/O I
NR<10> 2 0 0 3 FB2_15 6 I/O I
NR<0> 2 0 0 3 FB2_16 (b) (b)
NB<1> 2 0 0 3 FB2_17 7 I/O I
NB<0> 2 0 0 3 FB2_18 (b) (b)
Signals Used by Logic in Function Block
1: $OpTx$BIN_STEP$409 6: A<22> 11: CMD<1>
2: A<11> 7: A<23> 12: FC<0>
3: A<12> 8: A<24> 13: NA
4: A<20> 9: A<25> 14: STERM
5: A<21> 10: CMD<0>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
nSTERM X..........XXX.......................... 4
NR<9> ...X.....XX............................. 3
NR<1> ..X......XX............................. 3
NR<12> ......X..XX............................. 3
NR<11> .....X...XX............................. 3
NR<10> ....X....XX............................. 3
NR<0> .X.......XX............................. 3
NB<1> ........XXX............................. 3
NB<0> .......X.XX............................. 3
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 24/30
Number of signals used by logic mapping into function block: 24
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
NR<8> 2 0 0 3 FB3_1 (b) (b)
nFPUCS 2 0 0 3 FB3_2 22 I/O O
NR<7> 2 0 0 3 FB3_3 31 I/O I
NR<6> 2 0 0 3 FB3_4 32 I/O (b)
NR<5> 2 0 0 3 FB3_5 24 I/O (b)
NR<4> 2 0 0 3 FB3_6 34 I/O I
NR<3> 2 0 0 3 FB3_7 (b) (b)
NR<2> 2 0 0 3 FB3_8 25 I/O (b)
NC<0> 2 0 0 3 FB3_9 27 I/O (b)
NA 2 0 0 3 FB3_10 39 I/O I
NC<8> 3 0 0 2 FB3_11 33 I/O (b)
NC<7> 3 0 0 2 FB3_12 40 I/O I
NC<6> 3 0 0 2 FB3_13 (b) (b)
NC<5> 3 0 0 2 FB3_14 35 I/O I
NC<4> 3 0 0 2 FB3_15 36 I/O I
NC<3> 3 0 0 2 FB3_16 42 I/O I
NC<2> 3 0 0 2 FB3_17 38 I/O (b)
NC<1> 3 0 0 2 FB3_18 (b) (b)
Signals Used by Logic in Function Block
1: A<10> 9: A<2> 17: CLKdat
2: A<13> 10: A<3> 18: CMD<0>
3: A<14> 11: A<4> 19: CMD<1>
4: A<15> 12: A<5> 20: FC<0>
5: A<16> 13: A<6> 21: FC<1>
6: A<17> 14: A<7> 22: FC<2>
7: A<18> 15: A<8> 23: NA
8: A<19> 16: A<9> 24: nAS
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
NR<8> .......X.........XX..................... 3
nFPUCS .XXXXXXX........X..XXX.X................ 12
NR<7> ......X..........XX..................... 3
NR<6> .....X...........XX..................... 3
NR<5> ....X............XX..................... 3
NR<4> ...X.............XX..................... 3
NR<3> ..X..............XX..................... 3
NR<2> .X...............XX..................... 3
NC<0> ........X........XX..................... 3
NA .................XX...X................. 3
NC<8> X.......XXXXXXXX.XX..................... 11
NC<7> ........XXXXXXXX.XX..................... 10
NC<6> ........XXXXXXX..XX..................... 9
NC<5> ........XXXXXX...XX..................... 8
NC<4> ........XXXXX....XX..................... 7
NC<3> ........XXXX.....XX..................... 6
NC<2> ........XXX......XX..................... 5
NC<1> ........XX.......XX..................... 4
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB4_1 (b)
(unused) 0 0 0 5 FB4_2 43 I/O I
(unused) 0 0 0 5 FB4_3 46 I/O I
(unused) 0 0 0 5 FB4_4 47 I/O I
(unused) 0 0 0 5 FB4_5 44 I/O I
(unused) 0 0 0 5 FB4_6 49 I/O I
(unused) 0 0 0 5 FB4_7 (b)
(unused) 0 0 0 5 FB4_8 45 I/O I
(unused) 0 0 0 5 FB4_9 (b)
(unused) 0 0 0 5 FB4_10 51 I/O I
(unused) 0 0 0 5 FB4_11 48 I/O I
(unused) 0 0 0 5 FB4_12 52 I/O I
(unused) 0 0 0 5 FB4_13 (b)
(unused) 0 0 0 5 FB4_14 50 I/O I
(unused) 0 0 0 5 FB4_15 56 I/O I
(unused) 0 0 0 5 FB4_16 (b)
(unused) 0 0 0 5 FB4_17 57 I/O I
(unused) 0 0 0 5 FB4_18 (b)
******************************* Equations ********************************
********** Mapped Logic **********
$OpTx$BIN_STEP$409 <= ((EXP9_.EXP)
OR (A(5) AND NOT NC(3) AND NOT STERM)
OR (NOT A(5) AND NC(3) AND NOT STERM)
OR (A(9) AND NOT NC(7) AND NOT STERM)
OR (NOT A(9) AND NC(7) AND NOT STERM)
OR (A(19) AND NOT NR(8) AND NOT STERM)
OR (EXP12_.EXP)
OR (NOT A(24) AND NB(0) AND NOT STERM)
OR (A(4) AND NOT NC(2) AND NOT STERM)
OR (NOT A(4) AND NC(2) AND NOT STERM)
OR (A(8) AND NOT NC(6) AND NOT STERM)
OR (NOT A(8) AND NC(6) AND NOT STERM)
OR (NOT FC(2) AND NOT STERM)
OR (A(31) AND NOT STERM)
OR (A(15) AND NOT NR(4) AND NOT STERM)
OR (NOT A(15) AND NR(4) AND NOT STERM)
OR (NOT A(19) AND NR(8) AND NOT STERM));
FDCPE_NA: FDCPE port map (NA,NA_D,CLK,'0','0');
NA_D <= ((CMD(0) AND NOT CMD(1))
OR (NOT CMD(1) AND NA));
FDCPE_NB0: FDCPE port map (NB(0),A(24),CLK,'0','0',NB_CE(0));
NB_CE(0) <= (CMD(0) AND NOT CMD(1));
FDCPE_NB1: FDCPE port map (NB(1),A(25),CLK,'0','0',NB_CE(1));
NB_CE(1) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC0: FDCPE port map (NC(0),NOT A(2),CLK,'0','0',NC_CE(0));
NC_CE(0) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC1: FDCPE port map (NC(1),NC_D(1),CLK,'0','0',NC_CE(1));
NC_D(1) <= A(2)
XOR
NC_D(1) <= A(3);
NC_CE(1) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC2: FDCPE port map (NC(2),NC_D(2),CLK,'0','0',NC_CE(2));
NC_D(2) <= A(4)
XOR
NC_D(2) <= (A(2) AND A(3));
NC_CE(2) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC3: FDCPE port map (NC(3),NC_D(3),CLK,'0','0',NC_CE(3));
NC_D(3) <= A(5)
XOR
NC_D(3) <= (A(2) AND A(3) AND A(4));
NC_CE(3) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC4: FDCPE port map (NC(4),NC_D(4),CLK,'0','0',NC_CE(4));
NC_D(4) <= A(6)
XOR
NC_D(4) <= (A(2) AND A(3) AND A(4) AND A(5));
NC_CE(4) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC5: FDCPE port map (NC(5),NC_D(5),CLK,'0','0',NC_CE(5));
NC_D(5) <= A(7)
XOR
NC_D(5) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6));
NC_CE(5) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC6: FDCPE port map (NC(6),NC_D(6),CLK,'0','0',NC_CE(6));
NC_D(6) <= A(8)
XOR
NC_D(6) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7));
NC_CE(6) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC7: FDCPE port map (NC(7),NC_D(7),CLK,'0','0',NC_CE(7));
NC_D(7) <= A(9)
XOR
NC_D(7) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7) AND
A(8));
NC_CE(7) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC8: FDCPE port map (NC(8),NC_D(8),CLK,'0','0',NC_CE(8));
NC_D(8) <= A(10)
XOR
NC_D(8) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7) AND
A(8) AND A(9));
NC_CE(8) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR0: FDCPE port map (NR(0),A(11),CLK,'0','0',NR_CE(0));
NR_CE(0) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR1: FDCPE port map (NR(1),A(12),CLK,'0','0',NR_CE(1));
NR_CE(1) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR2: FDCPE port map (NR(2),A(13),CLK,'0','0',NR_CE(2));
NR_CE(2) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR3: FDCPE port map (NR(3),A(14),CLK,'0','0',NR_CE(3));
NR_CE(3) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR4: FDCPE port map (NR(4),A(15),CLK,'0','0',NR_CE(4));
NR_CE(4) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR5: FDCPE port map (NR(5),A(16),CLK,'0','0',NR_CE(5));
NR_CE(5) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR6: FDCPE port map (NR(6),A(17),CLK,'0','0',NR_CE(6));
NR_CE(6) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR7: FDCPE port map (NR(7),A(18),CLK,'0','0',NR_CE(7));
NR_CE(7) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR8: FDCPE port map (NR(8),A(19),CLK,'0','0',NR_CE(8));
NR_CE(8) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR9: FDCPE port map (NR(9),A(20),CLK,'0','0',NR_CE(9));
NR_CE(9) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR10: FDCPE port map (NR(10),A(21),CLK,'0','0',NR_CE(10));
NR_CE(10) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR11: FDCPE port map (NR(11),A(22),CLK,'0','0',NR_CE(11));
NR_CE(11) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR12: FDCPE port map (NR(12),A(23),CLK,'0','0',NR_CE(12));
NR_CE(12) <= (CMD(0) AND NOT CMD(1));
nFPUCS <= NOT (((FC(1) AND FC(0) AND A(17) AND A(13) AND NOT A(14) AND NOT A(15) AND
NOT A(16) AND NOT A(18) AND NOT A(19) AND FC(2) AND NOT nAS)
OR (FC(1) AND FC(0) AND A(17) AND A(13) AND NOT A(14) AND NOT A(15) AND
NOT A(16) AND NOT A(18) AND NOT A(19) AND FC(2) AND NOT CLKdat)));
nSTERM <= NOT (((STERM AND NOT $OpTx$BIN_STEP$409)
OR (NOT FC(0) AND NA AND NOT $OpTx$BIN_STEP$409)));
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE);
FTCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);
****************************** Device Pin Out *****************************
Device : XC9572XL-5-VQ64
-----------------------------------------------
/48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 \
| 49 32 |
| 50 31 |
| 51 30 |
| 52 29 |
| 53 28 |
| 54 27 |
| 55 26 |
| 56 XC9572XL-5-VQ64 25 |
| 57 24 |
| 58 23 |
| 59 22 |
| 60 21 |
| 61 20 |
| 62 19 |
| 63 18 |
| 64 17 |
\ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 /
-----------------------------------------------
Pin Signal Pin Signal
No. Name No. Name
1 A<31> 33 KPR
2 A<11> 34 A<16>
3 VCC 35 A<22>
4 A<15> 36 A<20>
5 CLKdat 37 VCC
6 nAS 38 KPR
7 A<7> 39 CMD<0>
8 KPR 40 A<2>
9 A<8> 41 GND
10 A<25> 42 A<19>
11 A<9> 43 A<3>
12 KPR 44 A<13>
13 KPR 45 FC<1>
14 GND 46 A<28>
15 CLK 47 A<6>
16 CMD<1> 48 A<23>
17 KPR 49 A<18>
18 KPR 50 A<21>
19 KPR 51 A<14>
20 A<4> 52 A<24>
21 GND 53 TDO
22 nFPUCS 54 GND
23 KPR 55 VCC
24 KPR 56 FC<2>
25 KPR 57 A<10>
26 VCC 58 A<17>
27 KPR 59 STERM
28 TDI 60 nSTERM
29 TMS 61 A<29>
30 TCK 62 A<30>
31 FC<0> 63 A<5>
32 KPR 64 A<12>
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
KPR = Unused I/O with weak keeper (leave unconnected)
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc9572xl-5-VQ64
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
Set I/O Pin Termination : KEEPER
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
Input Limit : 54
Pterm Limit : 25

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Release 14.7 - xst P.20131013 (nt)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
--> Parameter TMPDIR set to xst/projnav.tmp
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.08 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.08 secs
--> Reading design: STERMINATOR.prj
TABLE OF CONTENTS
1) Synthesis Options Summary
2) HDL Compilation
3) Design Hierarchy Analysis
4) HDL Analysis
5) HDL Synthesis
5.1) HDL Synthesis Report
6) Advanced HDL Synthesis
6.1) Advanced HDL Synthesis Report
7) Low Level Synthesis
8) Partition Report
9) Final Report
=========================================================================
* Synthesis Options Summary *
=========================================================================
---- Source Parameters
Input File Name : "STERMINATOR.prj"
Input Format : mixed
Ignore Synthesis Constraint File : NO
---- Target Parameters
Output File Name : "STERMINATOR"
Output Format : NGC
Target Device : XC9500XL CPLDs
---- Source Options
Top Module Name : STERMINATOR
Automatic FSM Extraction : YES
FSM Encoding Algorithm : Auto
Safe Implementation : No
Mux Extraction : Yes
Resource Sharing : YES
---- Target Options
Add IO Buffers : YES
MACRO Preserve : YES
XOR Preserve : YES
Equivalent register Removal : YES
---- General Options
Optimization Goal : Speed
Optimization Effort : 1
Keep Hierarchy : Yes
Netlist Hierarchy : As_Optimized
RTL Output : Yes
Hierarchy Separator : /
Bus Delimiter : <>
Case Specifier : Maintain
Verilog 2001 : YES
---- Other Options
Clock Enable : YES
wysiwyg : NO
=========================================================================
=========================================================================
* HDL Compilation *
=========================================================================
Compiling verilog file "../STERMINATOR.v" in library work
Module <STERMINATOR> compiled
No errors in compilation
Analysis of file <"STERMINATOR.prj"> succeeded.
=========================================================================
* Design Hierarchy Analysis *
=========================================================================
Analyzing hierarchy for module <STERMINATOR> in library <work>.
=========================================================================
* HDL Analysis *
=========================================================================
Analyzing top module <STERMINATOR>.
Module <STERMINATOR> is correct for synthesis.
=========================================================================
* HDL Synthesis *
=========================================================================
Performing bidirectional port resolution...
Synthesizing Unit <STERMINATOR>.
Related source file is "../STERMINATOR.v".
WARNING:Xst:647 - Input <A<27:26>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <nWE> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
Found 1-bit register for signal <NA>.
Found 2-bit register for signal <NB>.
Found 9-bit register for signal <NC>.
Found 9-bit adder for signal <NC$add0000> created at line 51.
Found 13-bit register for signal <NR>.
Found 2-bit comparator equal for signal <NSEL$cmp_eq0000> created at line 59.
Found 13-bit comparator equal for signal <NSEL$cmp_eq0001> created at line 59.
Found 9-bit comparator equal for signal <NSEL$cmp_eq0002> created at line 59.
Summary:
inferred 1 D-type flip-flop(s).
inferred 1 Adder/Subtractor(s).
inferred 3 Comparator(s).
Unit <STERMINATOR> synthesized.
=========================================================================
HDL Synthesis Report
Macro Statistics
# Adders/Subtractors : 1
9-bit adder : 1
# Registers : 4
1-bit register : 1
13-bit register : 1
2-bit register : 1
9-bit register : 1
# Comparators : 3
13-bit comparator equal : 1
2-bit comparator equal : 1
9-bit comparator equal : 1
=========================================================================
=========================================================================
* Advanced HDL Synthesis *
=========================================================================
=========================================================================
Advanced HDL Synthesis Report
Macro Statistics
# Adders/Subtractors : 1
9-bit adder : 1
# Registers : 1
Flip-Flops : 1
# Comparators : 3
13-bit comparator equal : 1
2-bit comparator equal : 1
9-bit comparator equal : 1
=========================================================================
=========================================================================
* Low Level Synthesis *
=========================================================================
Optimizing unit <STERMINATOR> ...
=========================================================================
* Partition Report *
=========================================================================
Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------
=========================================================================
* Final Report *
=========================================================================
Final Results
RTL Top Level Output File Name : STERMINATOR.ngr
Top Level Output File Name : STERMINATOR
Output Format : NGC
Optimization Goal : Speed
Keep Hierarchy : Yes
Target Technology : XC9500XL CPLDs
Macro Preserve : YES
XOR Preserve : YES
Clock Enable : YES
wysiwyg : NO
Design Statistics
# IOs : 42
Cell Usage :
# BELS : 102
# AND2 : 14
# AND3 : 5
# AND4 : 2
# AND5 : 1
# AND8 : 2
# GND : 1
# INV : 41
# OR2 : 4
# XOR2 : 32
# FlipFlops/Latches : 25
# FD : 1
# FDCE : 24
# IO Buffers : 39
# IBUF : 37
# OBUF : 2
=========================================================================
Total REAL time to Xst completion: 2.00 secs
Total CPU time to Xst completion: 2.08 secs
-->
Total memory usage is 225560 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 2 ( 0 filtered)
Number of infos : 0 ( 0 filtered)

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AUTO_TS_P2P:FROM:FC<1>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:FC<0>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<17>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<13>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<14>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<15>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<16>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<18>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:A<19>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:FC<2>:TO:nFPUCS:1
AUTO_TS_P2P:FROM:nAS:TO:nFPUCS:1
AUTO_TS_P2P:FROM:CLKdat:TO:nFPUCS:1
AUTO_TS_P2P:FROM:STERM:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<17>:TO:nSTERM:1
AUTO_TS_P2P:FROM:CLK:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<10>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<7>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<11>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<18>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<13>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<2>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<16>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<24>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<21>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<23>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<5>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<9>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<19>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<22>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<12>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<14>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<20>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<3>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<30>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<29>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<28>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<25>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<6>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<4>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<8>:TO:nSTERM:1
AUTO_TS_P2P:FROM:FC<2>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<31>:TO:nSTERM:1
AUTO_TS_P2P:FROM:A<15>:TO:nSTERM:1
AUTO_TS_P2P:FROM:FC<0>:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<6>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<8>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<5>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<0>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<7>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<2>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<0>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<5>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NB<0>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<10>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<12>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<3>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<7>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<8>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<11>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<1>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<3>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<9>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<1>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NB<1>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<4>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<2>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NC<6>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NR<4>.Q:TO:nSTERM:1
AUTO_TS_F2P:FROM:NA.Q:TO:nSTERM:1
AUTO_TS_F2F:FROM:NA.Q:TO:NA.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NA.D:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NA.D:1
AUTO_TS_P2F:FROM:CLK:TO:NA.D:1
AUTO_TS_P2F:FROM:A<24>:TO:NB<0>.D:1
AUTO_TS_P2F:FROM:CLK:TO:FCLKIO_0:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NB<0>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NB<0>.CE:1
AUTO_TS_P2F:FROM:A<25>:TO:NB<1>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NB<1>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NB<1>.CE:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<0>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<0>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<0>.CE:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<1>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<1>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<1>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<1>.CE:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<2>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<2>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<2>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<2>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<2>.CE:1
AUTO_TS_P2F:FROM:A<5>:TO:NC<3>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<3>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<3>.D:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<3>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<3>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<3>.CE:1
AUTO_TS_P2F:FROM:A<6>:TO:NC<4>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<4>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<4>.D:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<4>.D:1
AUTO_TS_P2F:FROM:A<5>:TO:NC<4>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<4>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<4>.CE:1
AUTO_TS_P2F:FROM:A<7>:TO:NC<5>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<5>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<5>.D:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<5>.D:1
AUTO_TS_P2F:FROM:A<5>:TO:NC<5>.D:1
AUTO_TS_P2F:FROM:A<6>:TO:NC<5>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<5>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<5>.CE:1
AUTO_TS_P2F:FROM:A<8>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:A<5>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:A<6>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:A<7>:TO:NC<6>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<6>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<6>.CE:1
AUTO_TS_P2F:FROM:A<9>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<5>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<6>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<7>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:A<8>:TO:NC<7>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<7>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<7>.CE:1
AUTO_TS_P2F:FROM:A<10>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<2>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<3>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<4>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<5>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<6>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<7>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<8>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:A<9>:TO:NC<8>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NC<8>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NC<8>.CE:1
AUTO_TS_P2F:FROM:A<11>:TO:NR<0>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<0>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<0>.CE:1
AUTO_TS_P2F:FROM:A<21>:TO:NR<10>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<10>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<10>.CE:1
AUTO_TS_P2F:FROM:A<22>:TO:NR<11>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<11>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<11>.CE:1
AUTO_TS_P2F:FROM:A<23>:TO:NR<12>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<12>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<12>.CE:1
AUTO_TS_P2F:FROM:A<12>:TO:NR<1>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<1>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<1>.CE:1
AUTO_TS_P2F:FROM:A<13>:TO:NR<2>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<2>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<2>.CE:1
AUTO_TS_P2F:FROM:A<14>:TO:NR<3>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<3>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<3>.CE:1
AUTO_TS_P2F:FROM:A<15>:TO:NR<4>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<4>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<4>.CE:1
AUTO_TS_P2F:FROM:A<16>:TO:NR<5>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<5>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<5>.CE:1
AUTO_TS_P2F:FROM:A<17>:TO:NR<6>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<6>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<6>.CE:1
AUTO_TS_P2F:FROM:A<18>:TO:NR<7>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<7>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<7>.CE:1
AUTO_TS_P2F:FROM:A<19>:TO:NR<8>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<8>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<8>.CE:1
AUTO_TS_P2F:FROM:A<20>:TO:NR<9>.D:1
AUTO_TS_P2F:FROM:CMD<0>:TO:NR<9>.CE:1
AUTO_TS_P2F:FROM:CMD<1>:TO:NR<9>.CE:1

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
<header>
<!-- ISE source project file created by Project Navigator. -->
<!-- -->
<!-- This file contains project source information including a list of -->
<!-- project source files, project and process properties. This file, -->
<!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. -->
<!-- -->
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
</header>
<version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/>
<files>
<file xil_pn:name="../STERMINATOR.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
<association xil_pn:name="Implementation" xil_pn:seqID="1"/>
</file>
</files>
<properties>
<property xil_pn:name="Add I/O Buffers" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unmatched LOC Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Allow Unmatched Timing Group Constraints" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Analysis Effort Level" xil_pn:value="Standard" xil_pn:valueState="default"/>
<property xil_pn:name="Auto Implementation Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Auto Implementation Top" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Automatically Insert glbl Module in the Netlist" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Autosignature Generation" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bring Out Global Set/Reset Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bring Out Global Tristate Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bus Delimiter" xil_pn:value="&lt;>" xil_pn:valueState="default"/>
<property xil_pn:name="Case" xil_pn:value="Maintain" xil_pn:valueState="default"/>
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="25" xil_pn:valueState="default"/>
<property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile for HDL Debugging" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile uni9000 (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Create IEEE 1532 Configuration File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Create Programmable GND Pins on Unused I/O" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Default Powerup Value of Registers" xil_pn:value="Low" xil_pn:valueState="default"/>
<property xil_pn:name="Delay Values To Be Read from SDF" xil_pn:value="Setup Time" xil_pn:valueState="default"/>
<property xil_pn:name="Device" xil_pn:value="xc9572xl" xil_pn:valueState="non-default"/>
<property xil_pn:name="Device Family" xil_pn:value="XC9500XL CPLDs" xil_pn:valueState="non-default"/>
<property xil_pn:name="Device Speed Grade/Select ABS Minimum" xil_pn:value="-5" xil_pn:valueState="default"/>
<property xil_pn:name="Do Not Escape Signal and Instance Names in Netlist" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Enable Message Filtering" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
<property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Schematic" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Architecture Only (No Entity Declaration)" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Multiple Hierarchical Netlist Files" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Post-Fit Simulation Model" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate RTL Schematic" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Generate SAIF File for Power Optimization/Estimation Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generate Testbench File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Generics, Parameters" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Global Set/Reset Port Name" xil_pn:value="GSR_PORT" xil_pn:valueState="default"/>
<property xil_pn:name="Global Tristate Port Name" xil_pn:value="GTS_PORT" xil_pn:valueState="default"/>
<property xil_pn:name="HDL Equations Style" xil_pn:value="Source" xil_pn:valueState="default"/>
<property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
<property xil_pn:name="I/O Pin Termination" xil_pn:value="Keeper" xil_pn:valueState="default"/>
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Template" xil_pn:value="Optimize Balance" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Top" xil_pn:value="Module|STERMINATOR" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top File" xil_pn:value="../STERMINATOR.v" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/STERMINATOR" xil_pn:valueState="non-default"/>
<property xil_pn:name="Include 'uselib Directive in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include SIMPRIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include UNISIM Models in Verilog File" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Include sdf_annotate task in Verilog File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Incremental Compilation" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Insert Buffers to Prevent Pulse Swallowing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Instantiation Template Target Language Xps" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Keep Hierarchy CPLD" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Logic Optimization" xil_pn:value="Speed" xil_pn:valueState="default"/>
<property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Macrocell Power Setting" xil_pn:value="Std" xil_pn:valueState="default"/>
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Max Fanout" xil_pn:value="100000" xil_pn:valueState="non-default"/>
<property xil_pn:name="Maximum Number of Lines in Report" xil_pn:value="1000" xil_pn:valueState="default"/>
<property xil_pn:name="Maximum Signal Name Length" xil_pn:value="20" xil_pn:valueState="default"/>
<property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Map" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Par" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Translate" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compxlib Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other NETGEN Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Ngdbuild Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Programming Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Simulator Commands Fit" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Timing Report Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Output File Name" xil_pn:value="STERMINATOR" xil_pn:valueState="default"/>
<property xil_pn:name="Output Slew Rate" xil_pn:value="Fast" xil_pn:valueState="default"/>
<property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Package" xil_pn:value="VQ64" xil_pn:valueState="non-default"/>
<property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
<property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="STERMINATOR_map.v" xil_pn:valueState="default"/>
<property xil_pn:name="Post Place &amp; Route Simulation Model Name" xil_pn:value="STERMINATOR_timesim.v" xil_pn:valueState="default"/>
<property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="STERMINATOR_synthesis.v" xil_pn:valueState="default"/>
<property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="STERMINATOR_translate.v" xil_pn:valueState="default"/>
<property xil_pn:name="Preferred Language" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Preserve Unused Inputs" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Produce Verbose Report" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Project Description" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Property Specification in Project File" xil_pn:value="Store all values" xil_pn:valueState="default"/>
<property xil_pn:name="Regenerate Core" xil_pn:value="Under Current Project Setting" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Entity to" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Reset On Configuration Pulse Width" xil_pn:value="100" xil_pn:valueState="default"/>
<property xil_pn:name="Resource Sharing" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Retain Hierarchy" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Source Node" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Show All Models" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Signature /User Code" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Model Target" xil_pn:value="Verilog" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time ISim" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Map" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Par" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulation Run Time Translate" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
<property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Fit" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Speed Grade" xil_pn:value="-5" xil_pn:valueState="default"/>
<property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Report Format" xil_pn:value="Summary" xil_pn:valueState="default"/>
<property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
<property xil_pn:name="Tristate On Configuration Pulse Width" xil_pn:value="0" xil_pn:valueState="default"/>
<property xil_pn:name="Use 64-bit PlanAhead on 64-bit Systems" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Project File Fit" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Simulation Command File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Behav" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Fit" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Map" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Par" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Custom Waveform Configuration File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Clocks" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Output Enables" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Global Set/Reset" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Location Constraints" xil_pn:value="Always" xil_pn:valueState="default"/>
<property xil_pn:name="Use Multi-level Logic Optimization" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="User Browsed Strategy Files" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="VCCIO Reference Voltage" xil_pn:value="LVTTL" xil_pn:valueState="default"/>
<property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
<property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
<property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<!-- -->
<!-- The following properties are for internal use only. These should not be modified.-->
<!-- -->
<property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_DesignName" xil_pn:value="STERMINATOR" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="xc9500xl" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_FPGAConfiguration" xil_pn:value="FPGAConfiguration" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostFitSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostMapSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostParSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostSynthSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostXlateSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PreSynthesis" xil_pn:value="PreSynthesis" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2021-10-26T06:33:06" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="17730CFE070848F6A829E56BBD192F9B" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
</properties>
<bindings/>
<libraries/>
<autoManagedFiles>
<!-- The following files are identified by `include statements in verilog -->
<!-- source files and are automatically managed by Project Navigator. -->
<!-- -->
<!-- Do not hand-edit this section, as it will be overwritten when the -->
<!-- project is analyzed based on files automatically identified as -->
<!-- include files. -->
</autoManagedFiles>
</project>

29
sterminator/XC9572XL/STERMINATOR.xst Normal file
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set -tmpdir "xst/projnav.tmp"
set -xsthdpdir "xst"
run
-ifn STERMINATOR.prj
-ifmt mixed
-ofn STERMINATOR
-ofmt NGC
-p xc9500xl
-top STERMINATOR
-opt_mode Speed
-opt_level 1
-iuc NO
-keep_hierarchy Yes
-netlist_hierarchy As_Optimized
-rtlview Yes
-hierarchy_separator /
-bus_delimiter <>
-case Maintain
-verilog2001 YES
-fsm_extract YES -fsm_encoding Auto
-safe_implementation No
-mux_extract Yes
-resource_sharing YES
-iobuf YES
-pld_mp YES
-pld_xp YES
-pld_ce YES
-wysiwyg NO
-equivalent_register_removal YES

238
sterminator/XC9572XL/STERMINATOR_envsettings.html Normal file
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<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD>
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<center><big><big><b>System Settings</b></big></big></center><br>
<A NAME="Environment Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='3'><B> Environment Settings </B></TD>
</tr>
<tr bgcolor='#ffff99'>
<td><b>Environment Variable</b></td>
<td><b>xst</b></td>
<td><b>ngdbuild</b></td>
</tr>
<tr>
<td>PATHEXT</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
</tr>
<tr>
<td>Path</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ispLEVER_Classic2_0\ispcpld\bin;<br>C:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>C:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\WinAVR-20100110\bin;<br>C:\WinAVR-20100110\utils\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Windows\System32\OpenSSH\;<br>C:\Program Files\Microchip\xc8\v2.31\bin;<br>C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;<br>C:\Program Files\PuTTY\;<br>C:\Program Files\WinMerge;<br>C:\Program Files\dotnet\;<br>C:\Users\zanek\AppData\Local\Microsoft\WindowsApps;<br>C:\Users\zanek\AppData\Local\GitHubDesktop\bin;<br>C:\altera\13.0sp1\modelsim_ase\win32aloem;<br>C:\Users\zanek\.dotnet\tools;<br>C:\Program Files (x86)\Skyworks\ClockBuilder Pro\Bin</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\ispLEVER_Classic2_0\ispcpld\bin;<br>C:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>C:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\WinAVR-20100110\bin;<br>C:\WinAVR-20100110\utils\bin;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Windows\System32\OpenSSH\;<br>C:\Program Files\Microchip\xc8\v2.31\bin;<br>C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;<br>C:\Program Files\PuTTY\;<br>C:\Program Files\WinMerge;<br>C:\Program Files\dotnet\;<br>C:\Users\zanek\AppData\Local\Microsoft\WindowsApps;<br>C:\Users\zanek\AppData\Local\GitHubDesktop\bin;<br>C:\altera\13.0sp1\modelsim_ase\win32aloem;<br>C:\Users\zanek\.dotnet\tools;<br>C:\Program Files (x86)\Skyworks\ClockBuilder Pro\Bin</td>
</tr>
<tr>
<td>XILINX</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE\</td>
</tr>
<tr>
<td>XILINX_DSP</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
<td>C:\Xilinx\14.7\ISE_DS\ISE</td>
</tr>
<tr>
<td>XILINX_EDK</td>
<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
<td>C:\Xilinx\14.7\ISE_DS\EDK</td>
</tr>
<tr>
<td>XILINX_PLANAHEAD</td>
<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
<td>C:\Xilinx\14.7\ISE_DS\PlanAhead</td>
</tr>
</TABLE>
<A NAME="Synthesis Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>Synthesis Property Settings </B></TD>
</tr>
<tr bgcolor='#ffff99'>
<td><b>Switch Name</b></td>
<td><b>Property Name</b></td>
<td><b>Value</b></td>
<td><b>Default Value</b></td>
</tr>
<tr>
<td>-ifn</td>
<td>&nbsp;</td>
<td>STERMINATOR.prj</td>
<td>&nbsp;</td>
</tr>
<tr>
<td>-ifmt</td>
<td>&nbsp;</td>
<td>mixed</td>
<td>MIXED</td>
</tr>
<tr>
<td>-ofn</td>
<td>&nbsp;</td>
<td>STERMINATOR</td>
<td>&nbsp;</td>
</tr>
<tr>
<td>-ofmt</td>
<td>&nbsp;</td>
<td>NGC</td>
<td>NGC</td>
</tr>
<tr>
<td>-p</td>
<td>&nbsp;</td>
<td>xc9500xl</td>
<td>&nbsp;</td>
</tr>
<tr>
<td>-top</td>
<td>&nbsp;</td>
<td>STERMINATOR</td>
<td>&nbsp;</td>
</tr>
<tr>
<td>-opt_mode</td>
<td>Optimization Goal</td>
<td>Speed</td>
<td>SPEED</td>
</tr>
<tr>
<td>-opt_level</td>
<td>Optimization Effort</td>
<td>1</td>
<td>1</td>
</tr>
<tr>
<td>-iuc</td>
<td>Use synthesis Constraints File</td>
<td>NO</td>
<td>NO</td>
</tr>
<tr>
<td>-keep_hierarchy</td>
<td>Keep Hierarchy</td>
<td>Yes</td>
<td>YES</td>
</tr>
<tr>
<td>-netlist_hierarchy</td>
<td>Netlist Hierarchy</td>
<td>As_Optimized</td>
<td>as_optimized</td>
</tr>
<tr>
<td>-rtlview</td>
<td>Generate RTL Schematic</td>
<td>Yes</td>
<td>NO</td>
</tr>
<tr>
<td>-bus_delimiter</td>
<td>Bus Delimiter</td>
<td>&lt;&gt;</td>
<td>&lt;&gt;</td>
</tr>
<tr>
<td>-verilog2001</td>
<td>Verilog 2001</td>
<td>YES</td>
<td>YES</td>
</tr>
<tr>
<td>-fsm_extract</td>
<td>&nbsp;</td>
<td>YES</td>
<td>YES</td>
</tr>
<tr>
<td>-fsm_encoding</td>
<td>&nbsp;</td>
<td>Auto</td>
<td>AUTO</td>
</tr>
<tr>
<td>-safe_implementation</td>
<td>&nbsp;</td>
<td>No</td>
<td>NO</td>
</tr>
<tr>
<td>-resource_sharing</td>
<td>&nbsp;</td>
<td>YES</td>
<td>YES</td>
</tr>
<tr>
<td>-iobuf</td>
<td>&nbsp;</td>
<td>YES</td>
<td>YES</td>
</tr>
<tr>
<td>-equivalent_register_removal</td>
<td>&nbsp;</td>
<td>YES</td>
<td>YES</td>
</tr>
</TABLE>
<A NAME="Translation Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD>
</tr>
<tr bgcolor='#ffff99'>
<td><b>Switch Name</b></td>
<td><b>Property Name</b></td>
<td><b>Value</b></td>
<td><b>Default Value</b></td>
</tr>
<tr>
<td>-intstyle</td>
<td>&nbsp;</td>
<td>ise</td>
<td>None</td>
</tr>
<tr>
<td>-dd</td>
<td>&nbsp;</td>
<td>_ngo</td>
<td>None</td>
</tr>
<tr>
<td>-p</td>
<td>&nbsp;</td>
<td>xc9572xl-VQ64-5</td>
<td>None</td>
</tr>
</TABLE>
<A NAME="Operating System Information"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='3'><B> Operating System Information </B></TD>
</tr>
<tr bgcolor='#ffff99'>
<td><b>Operating System Information</b></td>
<td><b>xst</b></td>
<td><b>ngdbuild</b></td>
</tr>
<tr>
<td>CPU Architecture/Speed</td>
<td>Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz/3500 MHz</td>
<td>Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz/3500 MHz</td>
</tr>
<tr>
<td>Host</td>
<td>ZanePC</td>
<td>ZanePC</td>
</tr>
<tr>
<td>OS Name</td>
<td>Microsoft , 64-bit</td>
<td>Microsoft , 64-bit</td>
</tr>
<tr>
<td>OS Release</td>
<td>major release (build 9200)</td>
<td>major release (build 9200)</td>
</tr>
</TABLE>
</BODY> </HTML>

128
sterminator/XC9572XL/STERMINATOR_html/fit/applet.js Normal file
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var tmpStr = "";
var waitWin;
function openWait() {
waitWin = window.open("wait.htm", "wait",
"toolbar=no,location=no,"+
"directories=no,status=no,menubar=no,scrollbars=no,"+
"resizable=no,width=300,height=50" );
}
function closeWait() { if (waitWin) waitWin.close(); }
function setMsg(msg){
parent.leftnav.setAppletMsg( msg );
// now send it reload forces
// call to applet paint
location.reload();
}
function getMsg(){
return( parent.leftnav.getAppletMsg() );
}
function resetMsg(){ parent.leftnav.setAppletMsg(""); }
function printAppletPkg() {
if( isNS() ){
setMsg("cmd printPkg ");
}
else{
document.ChipViewerApplet.PrintPkg();
}
}
function showAppletGraphicMC(mc) {
if( isNS() ){
setMsg("cmd showMac " + mc);
}
else{
document.ChipViewerApplet.ShowMac(mc);
}
}
function ShowMC() { showAppletGraphicMC(tmpStr); }
function showAppletGraphicFB(fb) {
if( isNS() ){
setMsg("cmd showFB " + fb);
}
else{
document.ChipViewerApplet.ShowFB(fb);
}
}
function showAppletGraphicPin(pin) {
if( isNS() ){
setMsg("cmd showPin " + pin);
}
else{
document.ChipViewerApplet.ShowPin(pin);
}
}
function ShowFB() { showAppletGraphicFB(tmpStr); }
function isNS() {
return ((navigator.appName.indexOf("Netscape") >= 0) && (parseFloat(navigator.appVersion) < 5) ) ? true : false;
}
function isIE(){
var agt=navigator.userAgent.toLowerCase();
return( ( (agt.indexOf("msie") != -1) && (agt.indexOf("opera") == -1) ) ? true: false );
}
function waitUntilOK() {
if (!waitWin) openWait();
if (isNS()) {
if (document.ChipViewerApplet.isActive()) closeWait();
else settimeout("waitUntilOK()",100);
}
else {
if (document.ChipViewerApplet.readyState == 4) closeWait();
else settimeout("waitUntilOK()",100);
}
}
// check that the applet if file has been generated
// this can only be done if the applets been loaded.
function fileExists(fileName){
if( document.ChipViewerApplet.readyState != 4 ) {
window.alert("Navigation disabled until the applet is loaded." );
}
if( isIE() ){
if( parent.leftnav.getAppletPermission() == 1 ){
if( document.ChipViewerApplet.TestFileExists(fileName) == 1 ){
window.alert("file exist tests true" );
return( true );
}
}
else{
window.alert("file exist returns true no permission" );
return( true );
}
}
else{
return( true );
}
window.alert("file exist returns false" );
return( false );
}
function setPermission(){
if( isIE() ){
if( document.ChipViewerApplet.granted() ){
parent.leftnav.setAppletPermission();
}
}
else{
return( true );
}
}

14
sterminator/XC9572XL/STERMINATOR_html/fit/appletref.htm Normal file
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<html>
<head>
<title></title>
</head>
<frameset frameborder="NO" framespacing="0" border="0" rows="94,*,0,0" col="*">
<frame name="topnav" src="../tim/topnav.htm" scrolling="no" noresize marginwidth="0" marginheight="0">
<frameset frameborder="NO" framespacing="0" border="0" cols="125,*">
<frame name="leftnav" src="leftnav.htm" noresize marginwidth="0" marginheight="0">
<frame name="content" src="summary.htm">
</frameset>
<frame name="eqns" src="eqns.htm" scrolling="no">
</frameset>
</html>

587
sterminator/XC9572XL/STERMINATOR_html/fit/ascii.htm Normal file
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<html><body>
<pre>
cpldfit: version P.20131013 Xilinx Inc.
Fitter Report
Design Name: STERMINATOR Date: 10-26-2021, 9:01PM
Device Used: XC9572XL-5-VQ64
Fitting Status: Successful
************************* Mapped Resource Summary **************************
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
28 /72 ( 39%) 114 /360 ( 32%) 92 /216 ( 43%) 25 /72 ( 35%) 39 /52 ( 75%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO
Block Used/Tot Used/Tot Used/Tot Used/Tot
FB1 1/18 54/54* 52/90 6/13
FB2 9/18 14/54 18/90 13/13*
FB3 18/18* 24/54 44/90 8/14
FB4 0/18 0/54 0/90 12/12*
----- ----- ----- -----
28/72 92/216 114/360 39/52
* - Resource is exhausted
** Global Control Resources **
Signal 'CLK' mapped onto global clock net GCK1.
Global output enable net(s) unused.
Global set/reset net(s) unused.
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 36 36 | I/O : 34 46
Output : 2 2 | GCK/IO : 2 3
Bidirectional : 0 0 | GTS/IO : 2 2
GCK : 1 1 | GSR/IO : 1 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 39 39
** Power Data **
There are 28 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
************************** Errors and Warnings ***************************
WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
use the default filename of 'STERMINATOR.ise'.
************************* Summary of Mapped Logic ************************
** 2 Outputs **
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
nSTERM 2 4 FB2_2 60 I/O O STD FAST
nFPUCS 2 12 FB3_2 22 I/O O STD FAST
** 26 Buried Nodes **
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
$OpTx$BIN_STEP$409 52 54 FB1_13 STD
NR<9> 2 3 FB2_11 STD RESET
NR<1> 2 3 FB2_12 STD RESET
NR<12> 2 3 FB2_13 STD RESET
NR<11> 2 3 FB2_14 STD RESET
NR<10> 2 3 FB2_15 STD RESET
NR<0> 2 3 FB2_16 STD RESET
NB<1> 2 3 FB2_17 STD RESET
NB<0> 2 3 FB2_18 STD RESET
NR<8> 2 3 FB3_1 STD RESET
NR<7> 2 3 FB3_3 STD RESET
NR<6> 2 3 FB3_4 STD RESET
NR<5> 2 3 FB3_5 STD RESET
NR<4> 2 3 FB3_6 STD RESET
NR<3> 2 3 FB3_7 STD RESET
NR<2> 2 3 FB3_8 STD RESET
NC<0> 2 3 FB3_9 STD RESET
NA 2 3 FB3_10 STD RESET
NC<8> 3 11 FB3_11 STD RESET
NC<7> 3 10 FB3_12 STD RESET
NC<6> 3 9 FB3_13 STD RESET
NC<5> 3 8 FB3_14 STD RESET
NC<4> 3 7 FB3_15 STD RESET
NC<3> 3 6 FB3_16 STD RESET
NC<2> 3 5 FB3_17 STD RESET
NC<1> 3 4 FB3_18 STD RESET
** 37 Inputs **
Signal Loc Pin Pin Pin
Name No. Type Use
A<8> FB1_5 9 I/O I
A<25> FB1_6 10 I/O I
A<9> FB1_8 11 I/O I
CLK FB1_9 15~ GCK/I/O GCK
CMD<1> FB1_11 16 GCK/I/O I
A<4> FB1_17 20 I/O I
A<17> FB2_3 58 I/O I
STERM FB2_4 59 I/O I
A<29> FB2_5 61 I/O I
A<30> FB2_6 62 I/O I
A<5> FB2_8 63 I/O I
A<12> FB2_9 64 GSR/I/O I
A<31> FB2_10 1 I/O I
A<11> FB2_11 2 GTS/I/O I
A<15> FB2_12 4 I/O I
CLKdat FB2_14 5 GTS/I/O I
nAS FB2_15 6 I/O I
A<7> FB2_17 7 I/O I
FC<0> FB3_3 31 I/O I
A<16> FB3_6 34 I/O I
CMD<0> FB3_10 39 I/O I
A<2> FB3_12 40 I/O I
A<22> FB3_14 35 I/O I
A<20> FB3_15 36 I/O I
A<19> FB3_16 42 I/O I
A<3> FB4_2 43 I/O I
A<28> FB4_3 46 I/O I
A<6> FB4_4 47 I/O I
A<13> FB4_5 44 I/O I
A<18> FB4_6 49 I/O I
FC<1> FB4_8 45 I/O I
A<14> FB4_10 51 I/O I
A<23> FB4_11 48 I/O I
A<24> FB4_12 52 I/O I
A<21> FB4_14 50 I/O I
FC<2> FB4_15 56 I/O I
A<10> FB4_17 57 I/O I
Legend:
Pin No. - ~ - User Assigned
************************** Function Block Details ************************
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X - Signal used as input to the macrocell logic.
Pin No. - ~ - User Assigned
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 54/0
Number of signals used by logic mapping into function block: 54
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB1_1 (b)
(unused) 0 0 0 5 FB1_2 8 I/O
(unused) 0 0 0 5 FB1_3 12 I/O
(unused) 0 0 0 5 FB1_4 13 I/O
(unused) 0 0 0 5 FB1_5 9 I/O I
(unused) 0 0 0 5 FB1_6 10 I/O I
(unused) 0 0 0 5 FB1_7 (b)
(unused) 0 0 \/2 3 FB1_8 11 I/O I
(unused) 0 0 \/5 0 FB1_9 15 GCK/I/O GCK
(unused) 0 0 \/5 0 FB1_10 18 I/O (b)
(unused) 0 0 \/5 0 FB1_11 16 GCK/I/O I
(unused) 0 0 \/5 0 FB1_12 23 I/O (b)
$OpTx$BIN_STEP$409 52 47<- 0 0 FB1_13 (b) (b)
(unused) 0 0 /\5 0 FB1_14 17 GCK/I/O (b)
(unused) 0 0 /\5 0 FB1_15 19 I/O (b)
(unused) 0 0 /\5 0 FB1_16 (b) (b)
(unused) 0 0 /\5 0 FB1_17 20 I/O I
(unused) 0 0 /\5 0 FB1_18 (b) (b)
Signals Used by Logic in Function Block
1: A<10> 19: A<2> 37: NC<5>
2: A<11> 20: A<30> 38: NC<6>
3: A<12> 21: A<31> 39: NC<7>
4: A<13> 22: A<3> 40: NC<8>
5: A<14> 23: A<4> 41: NR<0>
6: A<15> 24: A<5> 42: NR<10>
7: A<16> 25: A<6> 43: NR<11>
8: A<17> 26: A<7> 44: NR<12>
9: A<18> 27: A<8> 45: NR<1>
10: A<19> 28: A<9> 46: NR<2>
11: A<20> 29: FC<2> 47: NR<3>
12: A<21> 30: NB<0> 48: NR<4>
13: A<22> 31: NB<1> 49: NR<5>
14: A<23> 32: NC<0> 50: NR<6>
15: A<24> 33: NC<1> 51: NR<7>
16: A<25> 34: NC<2> 52: NR<8>
17: A<28> 35: NC<3> 53: NR<9>
18: A<29> 36: NC<4> 54: STERM
Signal 1 2 3 4 5 6 FB
Name 0----+----0----+----0----+----0----+----0----+----0----+----0 Inputs
$OpTx$BIN_STEP$409 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX...... 54
0----+----1----+----2----+----3----+----4----+----5----+----6
0 0 0 0 0 0
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 14/40
Number of signals used by logic mapping into function block: 14
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB2_1 (b)
nSTERM 2 0 0 3 FB2_2 60 I/O O
(unused) 0 0 0 5 FB2_3 58 I/O I
(unused) 0 0 0 5 FB2_4 59 I/O I
(unused) 0 0 0 5 FB2_5 61 I/O I
(unused) 0 0 0 5 FB2_6 62 I/O I
(unused) 0 0 0 5 FB2_7 (b)
(unused) 0 0 0 5 FB2_8 63 I/O I
(unused) 0 0 0 5 FB2_9 64 GSR/I/O I
(unused) 0 0 0 5 FB2_10 1 I/O I
NR<9> 2 0 0 3 FB2_11 2 GTS/I/O I
NR<1> 2 0 0 3 FB2_12 4 I/O I
NR<12> 2 0 0 3 FB2_13 (b) (b)
NR<11> 2 0 0 3 FB2_14 5 GTS/I/O I
NR<10> 2 0 0 3 FB2_15 6 I/O I
NR<0> 2 0 0 3 FB2_16 (b) (b)
NB<1> 2 0 0 3 FB2_17 7 I/O I
NB<0> 2 0 0 3 FB2_18 (b) (b)
Signals Used by Logic in Function Block
1: $OpTx$BIN_STEP$409 6: A<22> 11: CMD<1>
2: A<11> 7: A<23> 12: FC<0>
3: A<12> 8: A<24> 13: NA
4: A<20> 9: A<25> 14: STERM
5: A<21> 10: CMD<0>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
nSTERM X..........XXX.......................... 4
NR<9> ...X.....XX............................. 3
NR<1> ..X......XX............................. 3
NR<12> ......X..XX............................. 3
NR<11> .....X...XX............................. 3
NR<10> ....X....XX............................. 3
NR<0> .X.......XX............................. 3
NB<1> ........XXX............................. 3
NB<0> .......X.XX............................. 3
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 24/30
Number of signals used by logic mapping into function block: 24
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
NR<8> 2 0 0 3 FB3_1 (b) (b)
nFPUCS 2 0 0 3 FB3_2 22 I/O O
NR<7> 2 0 0 3 FB3_3 31 I/O I
NR<6> 2 0 0 3 FB3_4 32 I/O (b)
NR<5> 2 0 0 3 FB3_5 24 I/O (b)
NR<4> 2 0 0 3 FB3_6 34 I/O I
NR<3> 2 0 0 3 FB3_7 (b) (b)
NR<2> 2 0 0 3 FB3_8 25 I/O (b)
NC<0> 2 0 0 3 FB3_9 27 I/O (b)
NA 2 0 0 3 FB3_10 39 I/O I
NC<8> 3 0 0 2 FB3_11 33 I/O (b)
NC<7> 3 0 0 2 FB3_12 40 I/O I
NC<6> 3 0 0 2 FB3_13 (b) (b)
NC<5> 3 0 0 2 FB3_14 35 I/O I
NC<4> 3 0 0 2 FB3_15 36 I/O I
NC<3> 3 0 0 2 FB3_16 42 I/O I
NC<2> 3 0 0 2 FB3_17 38 I/O (b)
NC<1> 3 0 0 2 FB3_18 (b) (b)
Signals Used by Logic in Function Block
1: A<10> 9: A<2> 17: CLKdat
2: A<13> 10: A<3> 18: CMD<0>
3: A<14> 11: A<4> 19: CMD<1>
4: A<15> 12: A<5> 20: FC<0>
5: A<16> 13: A<6> 21: FC<1>
6: A<17> 14: A<7> 22: FC<2>
7: A<18> 15: A<8> 23: NA
8: A<19> 16: A<9> 24: nAS
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
NR<8> .......X.........XX..................... 3
nFPUCS .XXXXXXX........X..XXX.X................ 12
NR<7> ......X..........XX..................... 3
NR<6> .....X...........XX..................... 3
NR<5> ....X............XX..................... 3
NR<4> ...X.............XX..................... 3
NR<3> ..X..............XX..................... 3
NR<2> .X...............XX..................... 3
NC<0> ........X........XX..................... 3
NA .................XX...X................. 3
NC<8> X.......XXXXXXXX.XX..................... 11
NC<7> ........XXXXXXXX.XX..................... 10
NC<6> ........XXXXXXX..XX..................... 9
NC<5> ........XXXXXX...XX..................... 8
NC<4> ........XXXXX....XX..................... 7
NC<3> ........XXXX.....XX..................... 6
NC<2> ........XXX......XX..................... 5
NC<1> ........XX.......XX..................... 4
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB4_1 (b)
(unused) 0 0 0 5 FB4_2 43 I/O I
(unused) 0 0 0 5 FB4_3 46 I/O I
(unused) 0 0 0 5 FB4_4 47 I/O I
(unused) 0 0 0 5 FB4_5 44 I/O I
(unused) 0 0 0 5 FB4_6 49 I/O I
(unused) 0 0 0 5 FB4_7 (b)
(unused) 0 0 0 5 FB4_8 45 I/O I
(unused) 0 0 0 5 FB4_9 (b)
(unused) 0 0 0 5 FB4_10 51 I/O I
(unused) 0 0 0 5 FB4_11 48 I/O I
(unused) 0 0 0 5 FB4_12 52 I/O I
(unused) 0 0 0 5 FB4_13 (b)
(unused) 0 0 0 5 FB4_14 50 I/O I
(unused) 0 0 0 5 FB4_15 56 I/O I
(unused) 0 0 0 5 FB4_16 (b)
(unused) 0 0 0 5 FB4_17 57 I/O I
(unused) 0 0 0 5 FB4_18 (b)
******************************* Equations ********************************
********** Mapped Logic **********
$OpTx$BIN_STEP$409 <= ((EXP9_.EXP)
OR (A(5) AND NOT NC(3) AND NOT STERM)
OR (NOT A(5) AND NC(3) AND NOT STERM)
OR (A(9) AND NOT NC(7) AND NOT STERM)
OR (NOT A(9) AND NC(7) AND NOT STERM)
OR (A(19) AND NOT NR(8) AND NOT STERM)
OR (EXP12_.EXP)
OR (NOT A(24) AND NB(0) AND NOT STERM)
OR (A(4) AND NOT NC(2) AND NOT STERM)
OR (NOT A(4) AND NC(2) AND NOT STERM)
OR (A(8) AND NOT NC(6) AND NOT STERM)
OR (NOT A(8) AND NC(6) AND NOT STERM)
OR (NOT FC(2) AND NOT STERM)
OR (A(31) AND NOT STERM)
OR (A(15) AND NOT NR(4) AND NOT STERM)
OR (NOT A(15) AND NR(4) AND NOT STERM)
OR (NOT A(19) AND NR(8) AND NOT STERM));
FDCPE_NA: FDCPE port map (NA,NA_D,CLK,'0','0');
NA_D <= ((CMD(0) AND NOT CMD(1))
OR (NOT CMD(1) AND NA));
FDCPE_NB0: FDCPE port map (NB(0),A(24),CLK,'0','0',NB_CE(0));
NB_CE(0) <= (CMD(0) AND NOT CMD(1));
FDCPE_NB1: FDCPE port map (NB(1),A(25),CLK,'0','0',NB_CE(1));
NB_CE(1) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC0: FDCPE port map (NC(0),NOT A(2),CLK,'0','0',NC_CE(0));
NC_CE(0) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC1: FDCPE port map (NC(1),NC_D(1),CLK,'0','0',NC_CE(1));
NC_D(1) <= A(2)
XOR
NC_D(1) <= A(3);
NC_CE(1) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC2: FDCPE port map (NC(2),NC_D(2),CLK,'0','0',NC_CE(2));
NC_D(2) <= A(4)
XOR
NC_D(2) <= (A(2) AND A(3));
NC_CE(2) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC3: FDCPE port map (NC(3),NC_D(3),CLK,'0','0',NC_CE(3));
NC_D(3) <= A(5)
XOR
NC_D(3) <= (A(2) AND A(3) AND A(4));
NC_CE(3) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC4: FDCPE port map (NC(4),NC_D(4),CLK,'0','0',NC_CE(4));
NC_D(4) <= A(6)
XOR
NC_D(4) <= (A(2) AND A(3) AND A(4) AND A(5));
NC_CE(4) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC5: FDCPE port map (NC(5),NC_D(5),CLK,'0','0',NC_CE(5));
NC_D(5) <= A(7)
XOR
NC_D(5) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6));
NC_CE(5) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC6: FDCPE port map (NC(6),NC_D(6),CLK,'0','0',NC_CE(6));
NC_D(6) <= A(8)
XOR
NC_D(6) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7));
NC_CE(6) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC7: FDCPE port map (NC(7),NC_D(7),CLK,'0','0',NC_CE(7));
NC_D(7) <= A(9)
XOR
NC_D(7) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7) AND
A(8));
NC_CE(7) <= (CMD(0) AND NOT CMD(1));
FDCPE_NC8: FDCPE port map (NC(8),NC_D(8),CLK,'0','0',NC_CE(8));
NC_D(8) <= A(10)
XOR
NC_D(8) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7) AND
A(8) AND A(9));
NC_CE(8) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR0: FDCPE port map (NR(0),A(11),CLK,'0','0',NR_CE(0));
NR_CE(0) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR1: FDCPE port map (NR(1),A(12),CLK,'0','0',NR_CE(1));
NR_CE(1) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR2: FDCPE port map (NR(2),A(13),CLK,'0','0',NR_CE(2));
NR_CE(2) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR3: FDCPE port map (NR(3),A(14),CLK,'0','0',NR_CE(3));
NR_CE(3) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR4: FDCPE port map (NR(4),A(15),CLK,'0','0',NR_CE(4));
NR_CE(4) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR5: FDCPE port map (NR(5),A(16),CLK,'0','0',NR_CE(5));
NR_CE(5) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR6: FDCPE port map (NR(6),A(17),CLK,'0','0',NR_CE(6));
NR_CE(6) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR7: FDCPE port map (NR(7),A(18),CLK,'0','0',NR_CE(7));
NR_CE(7) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR8: FDCPE port map (NR(8),A(19),CLK,'0','0',NR_CE(8));
NR_CE(8) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR9: FDCPE port map (NR(9),A(20),CLK,'0','0',NR_CE(9));
NR_CE(9) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR10: FDCPE port map (NR(10),A(21),CLK,'0','0',NR_CE(10));
NR_CE(10) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR11: FDCPE port map (NR(11),A(22),CLK,'0','0',NR_CE(11));
NR_CE(11) <= (CMD(0) AND NOT CMD(1));
FDCPE_NR12: FDCPE port map (NR(12),A(23),CLK,'0','0',NR_CE(12));
NR_CE(12) <= (CMD(0) AND NOT CMD(1));
nFPUCS <= NOT (((FC(1) AND FC(0) AND A(17) AND A(13) AND NOT A(14) AND NOT A(15) AND
NOT A(16) AND NOT A(18) AND NOT A(19) AND FC(2) AND NOT nAS)
OR (FC(1) AND FC(0) AND A(17) AND A(13) AND NOT A(14) AND NOT A(15) AND
NOT A(16) AND NOT A(18) AND NOT A(19) AND FC(2) AND NOT CLKdat)));
nSTERM <= NOT (((STERM AND NOT $OpTx$BIN_STEP$409)
OR (NOT FC(0) AND NA AND NOT $OpTx$BIN_STEP$409)));
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE);
FTCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);
****************************** Device Pin Out *****************************
Device : XC9572XL-5-VQ64
-----------------------------------------------
/48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 \
| 49 32 |
| 50 31 |
| 51 30 |
| 52 29 |
| 53 28 |
| 54 27 |
| 55 26 |
| 56 XC9572XL-5-VQ64 25 |
| 57 24 |
| 58 23 |
| 59 22 |
| 60 21 |
| 61 20 |
| 62 19 |
| 63 18 |
| 64 17 |
\ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 /
-----------------------------------------------
Pin Signal Pin Signal
No. Name No. Name
1 A<31> 33 KPR
2 A<11> 34 A<16>
3 VCC 35 A<22>
4 A<15> 36 A<20>
5 CLKdat 37 VCC
6 nAS 38 KPR
7 A<7> 39 CMD<0>
8 KPR 40 A<2>
9 A<8> 41 GND
10 A<25> 42 A<19>
11 A<9> 43 A<3>
12 KPR 44 A<13>
13 KPR 45 FC<1>
14 GND 46 A<28>
15 CLK 47 A<6>
16 CMD<1> 48 A<23>
17 KPR 49 A<18>
18 KPR 50 A<21>
19 KPR 51 A<14>
20 A<4> 52 A<24>
21 GND 53 TDO
22 nFPUCS 54 GND
23 KPR 55 VCC
24 KPR 56 FC<2>
25 KPR 57 A<10>
26 VCC 58 A<17>
27 KPR 59 STERM
28 TDI 60 nSTERM
29 TMS 61 A<29>
30 TCK 62 A<30>
31 FC<0> 63 A<5>
32 KPR 64 A<12>
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
KPR = Unused I/O with weak keeper (leave unconnected)
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc9572xl-5-VQ64
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
Set I/O Pin Termination : KEEPER
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
Input Limit : 54
Pterm Limit : 25
</pre>
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of the fitter report. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->It
contains sections similar to those of the XML report (a summary section,
errors and warnings, mapped logic, function blocks, function block details,
a text-graphical display of the pinout, and a summary of compiler options),
but it is not easily navigable. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->It
is best to use the text report only when you need to print out a hard
copy of the fitter results.</p>
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<html><head><link type='text/css' href='style.css' rel='stylesheet'></head><body class='pgBgnd'>
<h3 align='center'>Equations</h3>
<table width='90%' align='center' border='1' cellpadding='0' cellspacing='0'>
<tr><td>
</td></tr><tr><td>
********** Mapped Logic **********
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$BIN_STEP$409 <= ((EXP9_.EXP)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(5) AND NOT NC(3) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NC(3) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(9) AND NOT NC(7) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(9) AND NC(7) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(19) AND NOT NR(8) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (EXP12_.EXP)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(24) AND NB(0) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(4) AND NOT NC(2) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(4) AND NC(2) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(8) AND NOT NC(6) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(8) AND NC(6) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT FC(2) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(31) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(15) AND NOT NR(4) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(15) AND NR(4) AND NOT STERM)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(19) AND NR(8) AND NOT STERM));
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
FDCPE_NA: FDCPE port map (NA,NA_D,CLK,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NA_D <= ((CMD(0) AND NOT CMD(1))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CMD(1) AND NA));
</td></tr><tr><td>
FDCPE_NB0: FDCPE port map (NB(0),A(24),CLK,'0','0',NB_CE(0));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NB_CE(0) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NB1: FDCPE port map (NB(1),A(25),CLK,'0','0',NB_CE(1));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NB_CE(1) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC0: FDCPE port map (NC(0),NOT A(2),CLK,'0','0',NC_CE(0));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(0) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC1: FDCPE port map (NC(1),NC_D(1),CLK,'0','0',NC_CE(1));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(1) <= A(2)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(1) <= A(3);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(1) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC2: FDCPE port map (NC(2),NC_D(2),CLK,'0','0',NC_CE(2));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(2) <= A(4)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(2) <= (A(2) AND A(3));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(2) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC3: FDCPE port map (NC(3),NC_D(3),CLK,'0','0',NC_CE(3));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(3) <= A(5)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(3) <= (A(2) AND A(3) AND A(4));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(3) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC4: FDCPE port map (NC(4),NC_D(4),CLK,'0','0',NC_CE(4));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(4) <= A(6)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(4) <= (A(2) AND A(3) AND A(4) AND A(5));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(4) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC5: FDCPE port map (NC(5),NC_D(5),CLK,'0','0',NC_CE(5));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(5) <= A(7)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(5) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(5) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC6: FDCPE port map (NC(6),NC_D(6),CLK,'0','0',NC_CE(6));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(6) <= A(8)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(6) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(6) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC7: FDCPE port map (NC(7),NC_D(7),CLK,'0','0',NC_CE(7));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(7) <= A(9)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(7) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; A(8));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(7) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NC8: FDCPE port map (NC(8),NC_D(8),CLK,'0','0',NC_CE(8));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(8) <= A(10)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_D(8) <= (A(2) AND A(3) AND A(4) AND A(5) AND A(6) AND A(7) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; A(8) AND A(9));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NC_CE(8) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR0: FDCPE port map (NR(0),A(11),CLK,'0','0',NR_CE(0));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(0) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR1: FDCPE port map (NR(1),A(12),CLK,'0','0',NR_CE(1));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(1) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR2: FDCPE port map (NR(2),A(13),CLK,'0','0',NR_CE(2));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(2) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR3: FDCPE port map (NR(3),A(14),CLK,'0','0',NR_CE(3));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(3) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR4: FDCPE port map (NR(4),A(15),CLK,'0','0',NR_CE(4));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(4) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR5: FDCPE port map (NR(5),A(16),CLK,'0','0',NR_CE(5));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(5) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR6: FDCPE port map (NR(6),A(17),CLK,'0','0',NR_CE(6));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(6) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR7: FDCPE port map (NR(7),A(18),CLK,'0','0',NR_CE(7));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(7) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR8: FDCPE port map (NR(8),A(19),CLK,'0','0',NR_CE(8));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(8) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR9: FDCPE port map (NR(9),A(20),CLK,'0','0',NR_CE(9));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(9) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR10: FDCPE port map (NR(10),A(21),CLK,'0','0',NR_CE(10));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(10) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR11: FDCPE port map (NR(11),A(22),CLK,'0','0',NR_CE(11));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(11) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
FDCPE_NR12: FDCPE port map (NR(12),A(23),CLK,'0','0',NR_CE(12));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;NR_CE(12) <= (CMD(0) AND NOT CMD(1));
</td></tr><tr><td>
</td></tr><tr><td>
nFPUCS <= NOT (((FC(1) AND FC(0) AND A(17) AND A(13) AND NOT A(14) AND NOT A(15) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(16) AND NOT A(18) AND NOT A(19) AND FC(2) AND NOT nAS)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (FC(1) AND FC(0) AND A(17) AND A(13) AND NOT A(14) AND NOT A(15) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(16) AND NOT A(18) AND NOT A(19) AND FC(2) AND NOT CLKdat)));
</td></tr><tr><td>
</td></tr><tr><td>
nSTERM <= NOT (((STERM AND NOT $OpTx$BIN_STEP$409)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT FC(0) AND NA AND NOT $OpTx$BIN_STEP$409)));
</td></tr><tr><td>
Register Legend:
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FDCPE (Q,D,C,CLR,PRE,CE);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FTCPE (Q,D,C,CLR,PRE,CE);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LDCP (Q,D,G,CLR,PRE);
</td></tr><tr><td>
</td></tr>
</table>
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<html><head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="paths.js"></script><script src="eqns.js"></script><script>
var design = "STERMINATOR";
var device = "XC9572XL";
signals = new Array("NA","NB0_SPECSIG","NB1_SPECSIG","NC0_SPECSIG","NC1_SPECSIG","NC2_SPECSIG","NC3_SPECSIG","NC4_SPECSIG","NC5_SPECSIG","NC6_SPECSIG","NC7_SPECSIG","NC8_SPECSIG","NR0_SPECSIG","NR10_SPECSIG","NR11_SPECSIG","NR12_SPECSIG","NR1_SPECSIG","NR2_SPECSIG","NR3_SPECSIG","NR4_SPECSIG","NR5_SPECSIG","NR6_SPECSIG","NR7_SPECSIG","NR8_SPECSIG","NR9_SPECSIG","OpTxBIN_STEP409_SPECSIG","nFPUCS","nSTERM");
sigNegs = new Array("OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","OFF","ON","ON");
sigTypes = new Array("D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","D","","","");
specSig["FC1_SPECSIG"]=new Array("FC<1>");
specSig["FC0_SPECSIG"]=new Array("FC<0>");
specSig["A17_SPECSIG"]=new Array("A<17>");
specSig["A13_SPECSIG"]=new Array("A<13>");
specSig["A24_SPECSIG"]=new Array("A<24>");
specSig["CMD0_SPECSIG"]=new Array("CMD<0>");
specSig["CMD1_SPECSIG"]=new Array("CMD<1>");
specSig["A25_SPECSIG"]=new Array("A<25>");
specSig["A2_SPECSIG"]=new Array("A<2>");
specSig["A3_SPECSIG"]=new Array("A<3>");
specSig["A4_SPECSIG"]=new Array("A<4>");
specSig["A5_SPECSIG"]=new Array("A<5>");
specSig["A6_SPECSIG"]=new Array("A<6>");
specSig["A7_SPECSIG"]=new Array("A<7>");
specSig["A8_SPECSIG"]=new Array("A<8>");
specSig["A9_SPECSIG"]=new Array("A<9>");
specSig["A10_SPECSIG"]=new Array("A<10>");
specSig["A11_SPECSIG"]=new Array("A<11>");
specSig["A21_SPECSIG"]=new Array("A<21>");
specSig["A22_SPECSIG"]=new Array("A<22>");
specSig["A23_SPECSIG"]=new Array("A<23>");
specSig["A12_SPECSIG"]=new Array("A<12>");
specSig["A14_SPECSIG"]=new Array("A<14>");
specSig["A15_SPECSIG"]=new Array("A<15>");
specSig["A16_SPECSIG"]=new Array("A<16>");
specSig["A18_SPECSIG"]=new Array("A<18>");
specSig["A19_SPECSIG"]=new Array("A<19>");
specSig["A20_SPECSIG"]=new Array("A<20>");
specSig["FC2_SPECSIG"]=new Array("FC<2>");
specSig["A30_SPECSIG"]=new Array("A<30>");
specSig["A29_SPECSIG"]=new Array("A<29>");
specSig["A28_SPECSIG"]=new Array("A<28>");
specSig["A31_SPECSIG"]=new Array("A<31>");
specSig["b_SPECSIG"]=new Array("(b)");
specSig["NR6_SPECSIG"]=new Array("NR<6>");
specSig["NR5_SPECSIG"]=new Array("NR<5>");
specSig["NR2_SPECSIG"]=new Array("NR<2>");
specSig["NC0_SPECSIG"]=new Array("NC<0>");
specSig["NC8_SPECSIG"]=new Array("NC<8>");
specSig["NC2_SPECSIG"]=new Array("NC<2>");
specSig["OpTxBIN_STEP409_SPECSIG"]=new Array("$OpTx$BIN_STEP$409");
specSig["NB0_SPECSIG"]=new Array("NB<0>");
specSig["NB1_SPECSIG"]=new Array("NB<1>");
specSig["NC1_SPECSIG"]=new Array("NC<1>");
specSig["NC3_SPECSIG"]=new Array("NC<3>");
specSig["NC4_SPECSIG"]=new Array("NC<4>");
specSig["NC5_SPECSIG"]=new Array("NC<5>");
specSig["NC6_SPECSIG"]=new Array("NC<6>");
specSig["NC7_SPECSIG"]=new Array("NC<7>");
specSig["NR0_SPECSIG"]=new Array("NR<0>");
specSig["NR10_SPECSIG"]=new Array("NR<10>");
specSig["NR11_SPECSIG"]=new Array("NR<11>");
specSig["NR12_SPECSIG"]=new Array("NR<12>");
specSig["NR1_SPECSIG"]=new Array("NR<1>");
specSig["NR3_SPECSIG"]=new Array("NR<3>");
specSig["NR4_SPECSIG"]=new Array("NR<4>");
specSig["NR7_SPECSIG"]=new Array("NR<7>");
specSig["NR8_SPECSIG"]=new Array("NR<8>");
specSig["NR9_SPECSIG"]=new Array("NR<9>");
pterms["FB1_8_1"]=new Array("/A17_SPECSIG","NR6_SPECSIG","/STERM");
pterms["FB1_8_2"]=new Array("A10_SPECSIG","/NC8_SPECSIG","/STERM");
pterms["FB1_9_1"]=new Array("A7_SPECSIG","/NC5_SPECSIG","/STERM");
pterms["FB1_9_2"]=new Array("/A7_SPECSIG","NC5_SPECSIG","/STERM");
pterms["FB1_9_3"]=new Array("A11_SPECSIG","/NR0_SPECSIG","/STERM");
pterms["FB1_9_4"]=new Array("/A11_SPECSIG","NR0_SPECSIG","/STERM");
pterms["FB1_9_5"]=new Array("A18_SPECSIG","/NR7_SPECSIG","/STERM");
pterms["FB1_10_1"]=new Array("A13_SPECSIG","/NR2_SPECSIG","/STERM");
pterms["FB1_10_2"]=new Array("/A13_SPECSIG","NR2_SPECSIG","/STERM");
pterms["FB1_10_3"]=new Array("A2_SPECSIG","/NC0_SPECSIG","/STERM");
pterms["FB1_10_4"]=new Array("/A2_SPECSIG","NC0_SPECSIG","/STERM");
pterms["FB1_10_5"]=new Array("A16_SPECSIG","/NR5_SPECSIG","/STERM");
pterms["FB1_11_1"]=new Array("A24_SPECSIG","/NB0_SPECSIG","/STERM");
pterms["FB1_11_2"]=new Array("A21_SPECSIG","/NR10_SPECSIG","/STERM");
pterms["FB1_11_3"]=new Array("/A21_SPECSIG","NR10_SPECSIG","/STERM");
pterms["FB1_11_4"]=new Array("A23_SPECSIG","/NR12_SPECSIG","/STERM");
pterms["FB1_11_5"]=new Array("/A23_SPECSIG","NR12_SPECSIG","/STERM");
pterms["FB1_12_1"]=new Array("A5_SPECSIG","/NC3_SPECSIG","/STERM");
pterms["FB1_12_2"]=new Array("/A5_SPECSIG","NC3_SPECSIG","/STERM");
pterms["FB1_12_3"]=new Array("A9_SPECSIG","/NC7_SPECSIG","/STERM");
pterms["FB1_12_4"]=new Array("/A9_SPECSIG","NC7_SPECSIG","/STERM");
pterms["FB1_12_5"]=new Array("A19_SPECSIG","/NR8_SPECSIG","/STERM");
pterms["FB1_13_1"]=new Array("/FC2_SPECSIG","/STERM");
pterms["FB1_13_2"]=new Array("A31_SPECSIG","/STERM");
pterms["FB1_13_3"]=new Array("A15_SPECSIG","/NR4_SPECSIG","/STERM");
pterms["FB1_13_4"]=new Array("/A15_SPECSIG","NR4_SPECSIG","/STERM");
pterms["FB1_13_5"]=new Array("/A19_SPECSIG","NR8_SPECSIG","/STERM");
pterms["FB1_14_1"]=new Array("/A24_SPECSIG","NB0_SPECSIG","/STERM");
pterms["FB1_14_2"]=new Array("A4_SPECSIG","/NC2_SPECSIG","/STERM");
pterms["FB1_14_3"]=new Array("/A4_SPECSIG","NC2_SPECSIG","/STERM");
pterms["FB1_14_4"]=new Array("A8_SPECSIG","/NC6_SPECSIG","/STERM");
pterms["FB1_14_5"]=new Array("/A8_SPECSIG","NC6_SPECSIG","/STERM");
pterms["FB1_15_1"]=new Array("A25_SPECSIG","/NB1_SPECSIG","/STERM");
pterms["FB1_15_2"]=new Array("/A25_SPECSIG","NB1_SPECSIG","/STERM");
pterms["FB1_15_3"]=new Array("A6_SPECSIG","/NC4_SPECSIG","/STERM");
pterms["FB1_15_4"]=new Array("/A6_SPECSIG","NC4_SPECSIG","/STERM");
pterms["FB1_15_5"]=new Array("/A16_SPECSIG","NR5_SPECSIG","/STERM");
pterms["FB1_16_1"]=new Array("A3_SPECSIG","/NC1_SPECSIG","/STERM");
pterms["FB1_16_2"]=new Array("/A3_SPECSIG","NC1_SPECSIG","/STERM");
pterms["FB1_16_3"]=new Array("/A18_SPECSIG","NR7_SPECSIG","/STERM");
pterms["FB1_16_4"]=new Array("A30_SPECSIG","A29_SPECSIG","/STERM");
pterms["FB1_16_5"]=new Array("A30_SPECSIG","A28_SPECSIG","/STERM");
pterms["FB1_17_1"]=new Array("/A10_SPECSIG","NC8_SPECSIG","/STERM");
pterms["FB1_17_2"]=new Array("A14_SPECSIG","/NR3_SPECSIG","/STERM");
pterms["FB1_17_3"]=new Array("/A14_SPECSIG","NR3_SPECSIG","/STERM");
pterms["FB1_17_4"]=new Array("A20_SPECSIG","/NR9_SPECSIG","/STERM");
pterms["FB1_17_5"]=new Array("/A20_SPECSIG","NR9_SPECSIG","/STERM");
pterms["FB1_18_1"]=new Array("A17_SPECSIG","/NR6_SPECSIG","/STERM");
pterms["FB1_18_2"]=new Array("A22_SPECSIG","/NR11_SPECSIG","/STERM");
pterms["FB1_18_3"]=new Array("/A22_SPECSIG","NR11_SPECSIG","/STERM");
pterms["FB1_18_4"]=new Array("A12_SPECSIG","/NR1_SPECSIG","/STERM");
pterms["FB1_18_5"]=new Array("/A12_SPECSIG","NR1_SPECSIG","/STERM");
pterms["FB2_2_1"]=new Array("STERM","/OpTxBIN_STEP409_SPECSIG");
pterms["FB2_2_2"]=new Array("/FC0_SPECSIG","NA","/OpTxBIN_STEP409_SPECSIG");
pterms["FB2_11_1"]=new Array("A20_SPECSIG");
pterms["FB2_11_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_12_1"]=new Array("A12_SPECSIG");
pterms["FB2_12_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_13_1"]=new Array("A23_SPECSIG");
pterms["FB2_13_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_14_1"]=new Array("A22_SPECSIG");
pterms["FB2_14_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_15_1"]=new Array("A21_SPECSIG");
pterms["FB2_15_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_16_1"]=new Array("A11_SPECSIG");
pterms["FB2_16_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_17_1"]=new Array("A25_SPECSIG");
pterms["FB2_17_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB2_18_1"]=new Array("A24_SPECSIG");
pterms["FB2_18_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_1_1"]=new Array("A19_SPECSIG");
pterms["FB3_1_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_2_1"]=new Array("FC1_SPECSIG","FC0_SPECSIG","A17_SPECSIG","A13_SPECSIG","/A14_SPECSIG","/A15_SPECSIG","/A16_SPECSIG","/A18_SPECSIG","/A19_SPECSIG","FC2_SPECSIG","/nAS");
pterms["FB3_2_2"]=new Array("FC1_SPECSIG","FC0_SPECSIG","A17_SPECSIG","A13_SPECSIG","/A14_SPECSIG","/A15_SPECSIG","/A16_SPECSIG","/A18_SPECSIG","/A19_SPECSIG","FC2_SPECSIG","/CLKdat");
pterms["FB3_3_1"]=new Array("A18_SPECSIG");
pterms["FB3_3_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_4_1"]=new Array("A17_SPECSIG");
pterms["FB3_4_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_5_1"]=new Array("A16_SPECSIG");
pterms["FB3_5_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_6_1"]=new Array("A15_SPECSIG");
pterms["FB3_6_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_7_1"]=new Array("A14_SPECSIG");
pterms["FB3_7_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_8_1"]=new Array("A13_SPECSIG");
pterms["FB3_8_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_9_1"]=new Array("/A2_SPECSIG");
pterms["FB3_9_2"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_10_1"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_10_2"]=new Array("/CMD1_SPECSIG","NA");
pterms["FB3_11_1"]=new Array("A10_SPECSIG");
pterms["FB3_11_2"]=new Array("A2_SPECSIG","A3_SPECSIG","A4_SPECSIG","A5_SPECSIG","A6_SPECSIG","A7_SPECSIG","A8_SPECSIG","A9_SPECSIG");
pterms["FB3_11_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_12_1"]=new Array("A9_SPECSIG");
pterms["FB3_12_2"]=new Array("A2_SPECSIG","A3_SPECSIG","A4_SPECSIG","A5_SPECSIG","A6_SPECSIG","A7_SPECSIG","A8_SPECSIG");
pterms["FB3_12_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_13_1"]=new Array("A8_SPECSIG");
pterms["FB3_13_2"]=new Array("A2_SPECSIG","A3_SPECSIG","A4_SPECSIG","A5_SPECSIG","A6_SPECSIG","A7_SPECSIG");
pterms["FB3_13_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_14_1"]=new Array("A7_SPECSIG");
pterms["FB3_14_2"]=new Array("A2_SPECSIG","A3_SPECSIG","A4_SPECSIG","A5_SPECSIG","A6_SPECSIG");
pterms["FB3_14_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_15_1"]=new Array("A6_SPECSIG");
pterms["FB3_15_2"]=new Array("A2_SPECSIG","A3_SPECSIG","A4_SPECSIG","A5_SPECSIG");
pterms["FB3_15_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_16_1"]=new Array("A5_SPECSIG");
pterms["FB3_16_2"]=new Array("A2_SPECSIG","A3_SPECSIG","A4_SPECSIG");
pterms["FB3_16_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_17_1"]=new Array("A4_SPECSIG");
pterms["FB3_17_2"]=new Array("A2_SPECSIG","A3_SPECSIG");
pterms["FB3_17_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
pterms["FB3_18_1"]=new Array("A2_SPECSIG");
pterms["FB3_18_2"]=new Array("A3_SPECSIG");
pterms["FB3_18_3"]=new Array("CMD0_SPECSIG","/CMD1_SPECSIG");
d2["OpTxBIN_STEP409_SPECSIG"]=new Array("FB1_13_1","FB1_13_2","FB1_13_3","FB1_13_4","FB1_13_5","FB1_12_1","FB1_12_2","FB1_12_3","FB1_12_4","FB1_12_5","FB1_11_1","FB1_11_2","FB1_11_3","FB1_11_4","FB1_11_5","FB1_10_1","FB1_10_2","FB1_10_3","FB1_10_4","FB1_10_5","FB1_9_1","FB1_9_2","FB1_9_3","FB1_9_4","FB1_9_5","FB1_8_1","FB1_8_2","FB1_14_1","FB1_14_2","FB1_14_3","FB1_14_4","FB1_14_5","FB1_15_1","FB1_15_2","FB1_15_3","FB1_15_4","FB1_15_5","FB1_16_1","FB1_16_2","FB1_16_3","FB1_16_4","FB1_16_5","FB1_17_1","FB1_17_2","FB1_17_3","FB1_17_4","FB1_17_5","FB1_18_1","FB1_18_2","FB1_18_3","FB1_18_4","FB1_18_5");
d2imp["OpTxBIN_STEP409_SPECSIG"]=new Array("1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1","1");
d2["nSTERM"]=new Array("FB2_2_1","FB2_2_2");
d2imp["nSTERM"]=new Array("1","1");
d2["NR9_SPECSIG"]=new Array("FB2_11_1");
d2imp["NR9_SPECSIG"]=new Array("1");
gblclk["NR9_SPECSIG"]=new Array("CLK");
ce["NR9_SPECSIG"]=new Array("FB2_11_2");
ceimp["NR9_SPECSIG"]=new Array("1");
prld["NR9_SPECSIG"]="GND";
d2["NR1_SPECSIG"]=new Array("FB2_12_1");
d2imp["NR1_SPECSIG"]=new Array("1");
gblclk["NR1_SPECSIG"]=new Array("CLK");
ce["NR1_SPECSIG"]=new Array("FB2_12_2");
ceimp["NR1_SPECSIG"]=new Array("1");
prld["NR1_SPECSIG"]="GND";
d2["NR12_SPECSIG"]=new Array("FB2_13_1");
d2imp["NR12_SPECSIG"]=new Array("1");
gblclk["NR12_SPECSIG"]=new Array("CLK");
ce["NR12_SPECSIG"]=new Array("FB2_13_2");
ceimp["NR12_SPECSIG"]=new Array("1");
prld["NR12_SPECSIG"]="GND";
d2["NR11_SPECSIG"]=new Array("FB2_14_1");
d2imp["NR11_SPECSIG"]=new Array("1");
gblclk["NR11_SPECSIG"]=new Array("CLK");
ce["NR11_SPECSIG"]=new Array("FB2_14_2");
ceimp["NR11_SPECSIG"]=new Array("1");
prld["NR11_SPECSIG"]="GND";
d2["NR10_SPECSIG"]=new Array("FB2_15_1");
d2imp["NR10_SPECSIG"]=new Array("1");
gblclk["NR10_SPECSIG"]=new Array("CLK");
ce["NR10_SPECSIG"]=new Array("FB2_15_2");
ceimp["NR10_SPECSIG"]=new Array("1");
prld["NR10_SPECSIG"]="GND";
d2["NR0_SPECSIG"]=new Array("FB2_16_1");
d2imp["NR0_SPECSIG"]=new Array("1");
gblclk["NR0_SPECSIG"]=new Array("CLK");
ce["NR0_SPECSIG"]=new Array("FB2_16_2");
ceimp["NR0_SPECSIG"]=new Array("1");
prld["NR0_SPECSIG"]="GND";
d2["NB1_SPECSIG"]=new Array("FB2_17_1");
d2imp["NB1_SPECSIG"]=new Array("1");
gblclk["NB1_SPECSIG"]=new Array("CLK");
ce["NB1_SPECSIG"]=new Array("FB2_17_2");
ceimp["NB1_SPECSIG"]=new Array("1");
prld["NB1_SPECSIG"]="GND";
d2["NB0_SPECSIG"]=new Array("FB2_18_1");
d2imp["NB0_SPECSIG"]=new Array("1");
gblclk["NB0_SPECSIG"]=new Array("CLK");
ce["NB0_SPECSIG"]=new Array("FB2_18_2");
ceimp["NB0_SPECSIG"]=new Array("1");
prld["NB0_SPECSIG"]="GND";
d2["NR8_SPECSIG"]=new Array("FB3_1_1");
d2imp["NR8_SPECSIG"]=new Array("1");
gblclk["NR8_SPECSIG"]=new Array("CLK");
ce["NR8_SPECSIG"]=new Array("FB3_1_2");
ceimp["NR8_SPECSIG"]=new Array("1");
prld["NR8_SPECSIG"]="GND";
d2["nFPUCS"]=new Array("FB3_2_1","FB3_2_2");
d2imp["nFPUCS"]=new Array("1","1");
d2["NR7_SPECSIG"]=new Array("FB3_3_1");
d2imp["NR7_SPECSIG"]=new Array("1");
gblclk["NR7_SPECSIG"]=new Array("CLK");
ce["NR7_SPECSIG"]=new Array("FB3_3_2");
ceimp["NR7_SPECSIG"]=new Array("1");
prld["NR7_SPECSIG"]="GND";
d2["NR6_SPECSIG"]=new Array("FB3_4_1");
d2imp["NR6_SPECSIG"]=new Array("1");
gblclk["NR6_SPECSIG"]=new Array("CLK");
ce["NR6_SPECSIG"]=new Array("FB3_4_2");
ceimp["NR6_SPECSIG"]=new Array("1");
prld["NR6_SPECSIG"]="GND";
d2["NR5_SPECSIG"]=new Array("FB3_5_1");
d2imp["NR5_SPECSIG"]=new Array("1");
gblclk["NR5_SPECSIG"]=new Array("CLK");
ce["NR5_SPECSIG"]=new Array("FB3_5_2");
ceimp["NR5_SPECSIG"]=new Array("1");
prld["NR5_SPECSIG"]="GND";
d2["NR4_SPECSIG"]=new Array("FB3_6_1");
d2imp["NR4_SPECSIG"]=new Array("1");
gblclk["NR4_SPECSIG"]=new Array("CLK");
ce["NR4_SPECSIG"]=new Array("FB3_6_2");
ceimp["NR4_SPECSIG"]=new Array("1");
prld["NR4_SPECSIG"]="GND";
d2["NR3_SPECSIG"]=new Array("FB3_7_1");
d2imp["NR3_SPECSIG"]=new Array("1");
gblclk["NR3_SPECSIG"]=new Array("CLK");
ce["NR3_SPECSIG"]=new Array("FB3_7_2");
ceimp["NR3_SPECSIG"]=new Array("1");
prld["NR3_SPECSIG"]="GND";
d2["NR2_SPECSIG"]=new Array("FB3_8_1");
d2imp["NR2_SPECSIG"]=new Array("1");
gblclk["NR2_SPECSIG"]=new Array("CLK");
ce["NR2_SPECSIG"]=new Array("FB3_8_2");
ceimp["NR2_SPECSIG"]=new Array("1");
prld["NR2_SPECSIG"]="GND";
d2["NC0_SPECSIG"]=new Array("FB3_9_1");
d2imp["NC0_SPECSIG"]=new Array("1");
gblclk["NC0_SPECSIG"]=new Array("CLK");
ce["NC0_SPECSIG"]=new Array("FB3_9_2");
ceimp["NC0_SPECSIG"]=new Array("1");
prld["NC0_SPECSIG"]="GND";
d2["NA"]=new Array("FB3_10_1","FB3_10_2");
d2imp["NA"]=new Array("1","1");
gblclk["NA"]=new Array("CLK");
prld["NA"]="GND";
d1["NC8_SPECSIG"]=new Array("FB3_11_1");
d1imp["NC8_SPECSIG"]=new Array("1");
d2["NC8_SPECSIG"]=new Array("FB3_11_2");
d2imp["NC8_SPECSIG"]=new Array("1");
gblclk["NC8_SPECSIG"]=new Array("CLK");
ce["NC8_SPECSIG"]=new Array("FB3_11_3");
ceimp["NC8_SPECSIG"]=new Array("1");
prld["NC8_SPECSIG"]="GND";
d1["NC7_SPECSIG"]=new Array("FB3_12_1");
d1imp["NC7_SPECSIG"]=new Array("1");
d2["NC7_SPECSIG"]=new Array("FB3_12_2");
d2imp["NC7_SPECSIG"]=new Array("1");
gblclk["NC7_SPECSIG"]=new Array("CLK");
ce["NC7_SPECSIG"]=new Array("FB3_12_3");
ceimp["NC7_SPECSIG"]=new Array("1");
prld["NC7_SPECSIG"]="GND";
d1["NC6_SPECSIG"]=new Array("FB3_13_1");
d1imp["NC6_SPECSIG"]=new Array("1");
d2["NC6_SPECSIG"]=new Array("FB3_13_2");
d2imp["NC6_SPECSIG"]=new Array("1");
gblclk["NC6_SPECSIG"]=new Array("CLK");
ce["NC6_SPECSIG"]=new Array("FB3_13_3");
ceimp["NC6_SPECSIG"]=new Array("1");
prld["NC6_SPECSIG"]="GND";
d1["NC5_SPECSIG"]=new Array("FB3_14_1");
d1imp["NC5_SPECSIG"]=new Array("1");
d2["NC5_SPECSIG"]=new Array("FB3_14_2");
d2imp["NC5_SPECSIG"]=new Array("1");
gblclk["NC5_SPECSIG"]=new Array("CLK");
ce["NC5_SPECSIG"]=new Array("FB3_14_3");
ceimp["NC5_SPECSIG"]=new Array("1");
prld["NC5_SPECSIG"]="GND";
d1["NC4_SPECSIG"]=new Array("FB3_15_1");
d1imp["NC4_SPECSIG"]=new Array("1");
d2["NC4_SPECSIG"]=new Array("FB3_15_2");
d2imp["NC4_SPECSIG"]=new Array("1");
gblclk["NC4_SPECSIG"]=new Array("CLK");
ce["NC4_SPECSIG"]=new Array("FB3_15_3");
ceimp["NC4_SPECSIG"]=new Array("1");
prld["NC4_SPECSIG"]="GND";
d1["NC3_SPECSIG"]=new Array("FB3_16_1");
d1imp["NC3_SPECSIG"]=new Array("1");
d2["NC3_SPECSIG"]=new Array("FB3_16_2");
d2imp["NC3_SPECSIG"]=new Array("1");
gblclk["NC3_SPECSIG"]=new Array("CLK");
ce["NC3_SPECSIG"]=new Array("FB3_16_3");
ceimp["NC3_SPECSIG"]=new Array("1");
prld["NC3_SPECSIG"]="GND";
d1["NC2_SPECSIG"]=new Array("FB3_17_1");
d1imp["NC2_SPECSIG"]=new Array("1");
d2["NC2_SPECSIG"]=new Array("FB3_17_2");
d2imp["NC2_SPECSIG"]=new Array("1");
gblclk["NC2_SPECSIG"]=new Array("CLK");
ce["NC2_SPECSIG"]=new Array("FB3_17_3");
ceimp["NC2_SPECSIG"]=new Array("1");
prld["NC2_SPECSIG"]="GND";
d1["NC1_SPECSIG"]=new Array("FB3_18_1");
d1imp["NC1_SPECSIG"]=new Array("1");
d2["NC1_SPECSIG"]=new Array("FB3_18_2");
d2imp["NC1_SPECSIG"]=new Array("1");
gblclk["NC1_SPECSIG"]=new Array("CLK");
ce["NC1_SPECSIG"]=new Array("FB3_18_3");
ceimp["NC1_SPECSIG"]=new Array("1");
prld["NC1_SPECSIG"]="GND";
uimSignals = new Array();
uimSigNegs = new Array();
uimPterms = new Array();
function getEqnList() {
var str = "<html><head><link type='text/css' href='style.css' rel='stylesheet'></head><body class='pgBgnd'>";
str += "<center><h3>Equations</h3></center>";
str += "<table width='90%' align='center' border='1' cellpadding='0' cellspacing='0'>";
for (s=0; s<uimSignals.length; s++) {
str += "<tr><td>";
str += retUimEqn(uimSignals[s]);
str += "</td></tr>";
}
for (s=0; s<signals.length; s++) {
str += "<tr><td>";
str += retEqn(signals[s]);
str += "</td></tr>";
}
var legend = retLegend();
if (legend != "") {
str += "<tr><td>" + legend + "</td></tr>";
}
str += "</table>";
str += "<form><span class='pgRef'>";
if (!parent.leftnav.IsNS()) {
str += "<table width='90%' align='center'>";
str += "<tr><td align='left'><input type='button' value='back to top' ";
str += "onclick='javascript:parent.leftnav.showEqnAll()' ";
str += "onmouseover=\"window.status='goto top of page'; return true;\" ";
str += "onmouseout=\"window.status=''\">";
str += "</td>";
str += "<td align='right'>";
str += "<input type='button' value='print page' ";
str += "onclick='javascript:window.print()' ";
str += "onmouseover=\"window.status='print page'; return true;\" ";
str += "onmouseout=\"window.status=''\">";
str += "</td>";
str += "</tr></table>";
}
else {
str += "<table width='90%' align='center'>";
str += "<tr><td align='left'><a href='javascript:parent.leftnav.showEqnAll()'>back to top</a>";
str += "</td>";
str += "<td align='right'>";
str += "<a href='javascript:window.print()'>";
str += "print page</a>";
str += "</td>";
str += "</tr></table>";
}
str += "</span></form>";
str += "</body></html>";
return str;
}
</script>
</head></html>

929
sterminator/XC9572XL/STERMINATOR_html/fit/eqns.js Normal file
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@ -0,0 +1,929 @@
var eqnType = 0;
var spcStr = "&nbsp;";
var nlStr = "<br>";
var tabStr = spcStr + spcStr + spcStr + spcStr + spcStr;
var nlTabStr = nlStr + tabStr;
var rClrS = "<font color='blue'>";
var rClrE = "</font>";
var cClrS = "<font color='green'>";
var cClrE = "</font>";
var abelOper = new Array();
abelOper["GND"] = new Array("Gnd");
abelOper["VCC"] = new Array("Vcc");
abelOper["NOT"] = new Array(rClrS + "!" + rClrE);
abelOper["AND"] = new Array(rClrS + "&" + rClrE);
abelOper["OR"] = new Array(rClrS + "#" + rClrE);
abelOper["XOR"] = new Array(rClrS + "$" + rClrE);
abelOper["EQUAL_COLON"] = new Array(":= ");
abelOper["EQUAL"] = new Array("= ");
abelOper["ASSIGN"] = new Array("");
abelOper["OPEN_NEGATE"] = new Array("(");
abelOper["CLOSE_NEGATE"] = new Array(")");
abelOper["OPEN_PTERM"] = new Array("");
abelOper["CLOSE_PTERM"] = new Array("");
abelOper["OPEN_BRACE"] = new Array("<");
abelOper["CLOSE_BRACE"] = new Array(">");
abelOper["INVALID_OPEN_BRACE"] = new Array("<");
abelOper["INVALID_CLOSE_BRACE"] = new Array(">");
abelOper["ENDLN"] = new Array(";");
abelOper["COMMENT"] = new Array("//");
abelOper["IMPORT"] = new Array(";Imported pterms ");
abelOper["GCK_COM"] = new Array("GCK");
abelOper["GTS_COM"] = new Array("GTS");
abelOper["GSR_COM"] = new Array("GSR");
abelOper["OD_COM"] = new Array("Open Drain");
abelOper["START_EQN"] = new Array("");
abelOper["END_EQN"] = new Array("");
abelOper["_I"] = new Array(".I");
abelOper["_T"] = new Array(".T");
abelOper["_D"] = new Array(".D");
abelOper["_C"] = new Array(".CLK");
abelOper["_DEC"] = new Array(".DEC");
abelOper["_LH"] = new Array(".LH");
abelOper["_CLR"] = new Array(".AR");
abelOper["_PRE"] = new Array(".AP");
abelOper["_CE"] = new Array(".CE");
abelOper["_OE"] = new Array(".OE");
abelOper["OE_START"] = new Array(" <= ");
abelOper["OE_WHEN"] = new Array(" when ");
abelOper["OE_EQUAL"] = new Array(" = ");
abelOper["OE_ELSE"] = new Array(" else ");
abelOper["B0"] = new Array("'0'");
abelOper["B1"] = new Array("'1'");
abelOper["BZ"] = new Array("'Z'");
abelOper["FD"] = new Array(".D");
abelOper["FT"] = new Array(".T");
abelOper["FDD"] = new Array(".DEC");
abelOper["FTD"] = new Array(".T");
abelOper["LD"] = new Array(".LH");
abelOper["Q"] = new Array(".Q");
var vhdlOper = new Array();
vhdlOper["GND"] = new Array("'0'");
vhdlOper["VCC"] = new Array("'1'");
vhdlOper["NOT"] = new Array(rClrS + "NOT " + rClrE);
vhdlOper["AND"] = new Array(rClrS + "AND" + rClrE);
vhdlOper["OR"] = new Array(rClrS + "OR" + rClrE);
vhdlOper["XOR"] = new Array(rClrS + "XOR" + rClrE);
vhdlOper["EQUAL_COLON"] = new Array("<= ");
vhdlOper["EQUAL"] = new Array("<= ");
vhdlOper["ASSIGN"] = new Array("");
vhdlOper["OPEN_NEGATE"] = new Array("(");
vhdlOper["CLOSE_NEGATE"] = new Array(")");
vhdlOper["OPEN_PTERM"] = new Array("(");
vhdlOper["CLOSE_PTERM"] = new Array(")");
vhdlOper["OPEN_BRACE"] = new Array("(");
vhdlOper["CLOSE_BRACE"] = new Array(")");
vhdlOper["INVALID_OPEN_BRACE"] = new Array("<");
vhdlOper["INVALID_CLOSE_BRACE"] = new Array(">");
vhdlOper["ENDLN"] = new Array(";");
vhdlOper["COMMENT"] = new Array("--");
vhdlOper["IMPORT"] = new Array("");
vhdlOper["GCK_COM"] = new Array("GCK");
vhdlOper["GTS_COM"] = new Array("GTS");
vhdlOper["GSR_COM"] = new Array("GSR");
vhdlOper["OD_COM"] = new Array("Open Drain");
vhdlOper["START_EQN"] = new Array(rClrS + "port map" + rClrE + " (");
vhdlOper["END_EQN"] = new Array(")");
vhdlOper["_I"] = new Array("_I");
vhdlOper["_T"] = new Array("_T");
vhdlOper["_D"] = new Array("_D");
vhdlOper["_C"] = new Array("_C");
vhdlOper["_DEC"] = new Array("_C");
vhdlOper["_LH"] = new Array("_C");
vhdlOper["_CLR"] = new Array("_CLR");
vhdlOper["_PRE"] = new Array("_PRE");
vhdlOper["_CE"] = new Array("_CE");
vhdlOper["_OE"] = new Array("_OE");
vhdlOper["OE_START"] = new Array(" <= ");
vhdlOper["OE_WHEN"] = new Array(" when ");
vhdlOper["OE_EQUAL"] = new Array(" = ");
vhdlOper["OE_ELSE"] = new Array(" else ");
vhdlOper["B0"] = new Array("'0'");
vhdlOper["B1"] = new Array("'1'");
vhdlOper["BZ"] = new Array("'Z'");
vhdlOper["FD"] = new Array("FDCPE");
vhdlOper["FT"] = new Array("FTCPE");
vhdlOper["FDD"] = new Array("FDDCPE");
vhdlOper["FTD"] = new Array("FTDCPE");
vhdlOper["LD"] = new Array("LDCP");
vhdlOper["Q"] = new Array("");
var verOper = new Array();
verOper["GND"] = new Array("1'b0");
verOper["VCC"] = new Array("1'b1");
verOper["NOT"] = new Array(rClrS + "!" + rClrE);
verOper["AND"] = new Array(rClrS + "&&" + rClrE);
verOper["OR"] = new Array(rClrS + "||" + rClrE);
verOper["XOR"] = new Array(rClrS + "XOR" + rClrE);
verOper["EQUAL_COLON"] = new Array("= ");
verOper["EQUAL"] = new Array("= ");
verOper["ASSIGN"] = new Array("assign ");
verOper["OPEN_NEGATE"] = new Array("(");
verOper["CLOSE_NEGATE"] = new Array(")");
verOper["OPEN_PTERM"] = new Array("(");
verOper["CLOSE_PTERM"] = new Array(")");
verOper["OPEN_BRACE"] = new Array("[");
verOper["CLOSE_BRACE"] = new Array("]");
verOper["INVALID_OPEN_BRACE"] = new Array("<");
verOper["INVALID_CLOSE_BRACE"] = new Array(">");
verOper["ENDLN"] = new Array(";");
verOper["COMMENT"] = new Array("//");
verOper["IMPORT"] = new Array("");
verOper["GCK_COM"] = new Array("GCK");
verOper["GTS_COM"] = new Array("GTS");
verOper["GSR_COM"] = new Array("GSR");
verOper["OD_COM"] = new Array("Open Drain");
verOper["START_EQN"] = new Array(" (");
verOper["END_EQN"] = new Array(")");
verOper["_I"] = new Array("_I");
verOper["_T"] = new Array("_T");
verOper["_D"] = new Array("_D");
verOper["_C"] = new Array("_C");
verOper["_DEC"] = new Array("_C");
verOper["_LH"] = new Array("_C");
verOper["_CLR"] = new Array("_CLR");
verOper["_PRE"] = new Array("_PRE");
verOper["_CE"] = new Array("_CE");
verOper["_OE"] = new Array("_OE");
verOper["OE_START"] = new Array(" = ");
verOper["OE_WHEN"] = new Array(" ? ");
verOper["OE_EQUAL"] = new Array("");
verOper["OE_ELSE"] = new Array(" : ");
verOper["B0"] = new Array("1'b0");
verOper["B1"] = new Array("1'b1");
verOper["BZ"] = new Array("1'bz");
verOper["FD"] = new Array("FDCPE");
verOper["FT"] = new Array("FTCPE");
verOper["FDD"] = new Array("FDDCPE");
verOper["FTD"] = new Array("FTDCPE");
verOper["LD"] = new Array("LDCP");
verOper["Q"] = new Array("");
var operator = abelOper;
var pterms = new Array();
var d1 = new Array();
var d2 = new Array();
var clk = new Array();
var set = new Array();
var rst = new Array();
var trst = new Array();
var d1imp = new Array();
var d2imp = new Array();
var clkimp = new Array();
var setimp = new Array();
var rstimp = new Array();
var trstimp = new Array();
var gblclk = new Array();
var gblset = new Array();
var gblrst = new Array();
var gbltrst = new Array();
var ce = new Array();
var ceimp = new Array();
var prld = new Array();
var specSig = new Array();
var clkNegs = new Array();
var setNegs = new Array();
var rstNegs = new Array();
var trstNegs = new Array();
var ceNegs = new Array();
var fbnand = new Array();
var inreg = new Array();
var iostyle = new Array();
var dOneLit = true;
function setOper(type) {
if (type == "1") { operator = vhdlOper; eqnType = 1; }
else if (type == "2") { operator = verOper; eqnType = 2; }
else { operator = abelOper; eqnType = 0; }
}
function isXC95() {
if (device.indexOf("95") != -1) return true;
return false;
}
function is9500() {
if ((device.indexOf("95") != -1) &&
(device.indexOf("XL") == -1) &&
(device.indexOf("XV") == -1)) return true;
return false;
}
function retSigType(s) {
var sigType = sigTypes[s];
var str = operator["Q"];
if (sigType == "D") str = operator["FD"];
else if (sigType == "T") str = operator["FT"];
else if (sigType.indexOf("LATCH") != -1) str = operator["LD"];
else if (sigType.indexOf("DDEFF") != -1) str = operator["FDD"];
else if (sigType.indexOf("DEFF") != -1) str = operator["FD"];
else if (sigType.indexOf("DDFF") != -1) str = operator["FDD"];
else if (sigType.indexOf("TDFF") != -1) str = operator["FTD"];
else if (sigType.indexOf("DFF") != -1) str = operator["FD"];
else if (sigType.indexOf("TFF") != -1) str = operator["FT"];
return str;
}
function retSigIndex(signal) {
for (s=0; s<signals.length; s++) { if (signals[s] == signal) return s; }
return -1;
}
function retSigName(signal) {
var str = "";
if (specSig[signal]) str += specSig[signal];
else str += signal;
var idx1 = str.indexOf(operator["INVALID_OPEN_BRACE"]);
var idx2 = str.indexOf(operator["INVALID_CLOSE_BRACE"]);
if ((idx1 != -1) && (idx2 != -1))
str = str.substring(0,idx1) + operator["OPEN_BRACE"] +
str.substring(idx1+1,idx2) + operator["CLOSE_BRACE"] +
str.substring(idx2+1,str.length);
return str;
}
function removePar(signal) {
var str = signal;
var idx = str.indexOf(operator["OPEN_BRACE"]);
if (idx != -1)
str = str.substring(0,idx) +
str.substring(idx+1,str.indexOf(operator["CLOSE_BRACE"]));
return str;
}
function isOneLiteral(str) {
if ((str.indexOf(operator["AND"]) != -1) ||
(str.indexOf(operator["OR"]) != -1) ||
(str.indexOf(operator["XOR"]) != -1)) return false;
return true;
}
function updateName(signal, index) {
var str;
var idx = signal.indexOf(operator["OPEN_BRACE"]);
if (idx != -1)
str = signal.substring(0,idx) +
index + signal.substring(idx);
else str = signal + index;
return str;
}
function retPterm(pt) {
var str = "";
if (!pterms[pt]) {
if (specSig[pt]) pt = specSig[pt];
return pt;
}
if (pterms[pt].length > 1) str += operator["OPEN_PTERM"];
for (p=0; p<pterms[pt].length; p++) {
var sig = pterms[pt][p];
if (sig.indexOf("xPUP_0") != -1) continue;
if (p>0) str += " " + operator["AND"] + " ";
var neg = 0;
if (sig.indexOf("/") != -1) {
sig = sig.substring(1, sig.length);
str += operator["NOT"];
neg = 1;
}
str += retSigName(sig);
}
if (pterms[pt].length > 1) str += operator["CLOSE_PTERM"];
return str;
}
function retFBMC(str) {
return str.substring(0,str.length-2) + nlStr + tabStr;
}
function retD1D2(signal) {
var str = "";
dOneLit = true;
if (d1[signal]) {
var currImp = "";
for (i=0; i<d1[signal].length; i++) {
if (!eqnType && d1imp[signal] && (d1imp[signal][i] == "1")) {
if ((currImp != retFBMC(d1[signal][i])) &&
(d1[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(d1[signal][i]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(d1[signal][i]);
}
if (d2[signal]) str += nlTabStr + operator["XOR"]+ spcStr;
}
if (d2[signal]) {
var currImp = "";
for (i=0; i<d2[signal].length; i++) {
if (!eqnType && d2imp[signal] && (d2imp[signal][i] == "1")) {
if ((currImp != retFBMC(d2[signal][i])) &&
(d2[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(d2[signal][i]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(d2[signal][i]);
}
}
if (str == "GND") str = operator["GND"];
else if (str == "VCC") str = operator["VCC"];
else if (!isOneLiteral(str)) {
dOneLit = false;
var type = retSigType(retSigIndex(signal));
if ((type == operator["FD"]) ||
(type == operator["FDD"])) type = operator["_D"];
else if ((type == operator["FT"]) ||
(type == operator["FTD"])) type = operator["_T"];
else if (type == operator["LD"] && eqnType) type = "_D";
var tmpStr = updateName(retSigName(signal), type);
tmpStr += spcStr + operator["EQUAL_COLON"];
var idx = retSigIndex(signal);
if (eqnType && sigNegs[idx] == "ON") tmpStr += operator["NOT"] + operator["OPEN_NEGATE"];
str = tmpStr + str;
if (eqnType && sigNegs[idx] == "ON") str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"];
}
return str;
}
function retClk(signal) {
var str = "";
if (clk[signal]) {
if (clk[signal].length == 1) {
var pterm = retPterm(clk[signal][0]);
if (clkNegs[signal]) {
str += operator["NOT"];
if (!isOneLiteral(pterm)) str += operator["OPEN_NEGATE"];
}
str += pterm;
if (clkNegs[signal] && !isOneLiteral(pterm)) str += operator["CLOSE_NEGATE"];
}
else {
if (clkNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
var currImp = "";
for (i=0; i<clk[signal].length; i++) {
if (!eqnType && clkimp[signal] && (clkimp[signal][i] == "1")) {
if ((currImp != retFBMC(clk[signal][i])) &&
(clk[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(clk[signal][i]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(clk[signal][i]);
}
if (clkNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"];
}
}
else if (gblclk[signal]) {
if (gblclk[signal].length == 1) {
var pterm = retPterm(gblclk[signal][0]);
if (clkNegs[signal]) {
str += operator["NOT"];
if (!isOneLiteral(pterm)) str += operator["OPEN_NEGATE"];
}
str += pterm;
if (clkNegs[signal] && !isOneLiteral(pterm)) str += operator["CLOSE_NEGATE"];
}
else {
if (clkNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<gblclk[signal].length; i++) {
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(gblclk[signal][i]);
}
if (clkNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"] + tabStr + cClrS +
operator["COMMENT"] + spcStr + operator["GCK_COM"] + cClrE;
}
}
else if (eqnType) str += operator["B0"];
return str;
}
function retRst(signal) {
var str = "";
if (rst[signal]) {
if (rst[signal].length == 1) {
var currImp;
if (!eqnType && rstimp[signal] && (rstimp[signal][0] == "1")) {
if ((currImp != retFBMC(rst[signal][i])) &&
(rst[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(rst[signal][0]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (rstNegs[signal]) str += operator["NOT"];
str += retPterm(rst[signal][0]);
}
else {
var currImp = "";
if (rstNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<rst[signal].length; i++) {
if (!eqnType && rstimp[signal] && (rstimp[signal][i] == "1")) {
if ((currImp != retFBMC(rst[signal][i])) &&
(rst[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(rst[signal][i]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(rst[signal][i]);
}
if (rstNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"];
}
}
else if (gblrst[signal]) {
if (gblrst[signal].length == 1) {
if (rstNegs[signal]) str += operator["NOT"];
str += retPterm(gblrst[signal][0]);
}
else {
if (rstNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<gblrst[signal].length; i++) {
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(gblrst[signal][i]);
}
if (rstNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"] + tabStr + cClrS +
operator["COMMENT"] + spcStr + operator["GSR_COM"] + cClrE;
}
}
else if (eqnType) str += operator["B0"];
return str;
}
function retSet(signal) {
var str = "";
if (set[signal]) {
if (set[signal].length == 1) {
var currImp = "";
if (!eqnType && setimp[signal] && (setimp[signal][0] == "1")) {
if ((currImp != retFBMC(set[signal][i])) &&
(set[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(set[signal][0]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (setNegs[signal]) str += operator["NOT"];
str += retPterm(set[signal][0]);
}
else {
var currImp = "";
if (setNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<set[signal].length; i++) {
if (!eqnType && setimp[signal] && (setimp[signal][i] == "1")) {
if ((currImp != retFBMC(set[signal][i])) &&
(set[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(set[signal][i]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(set[signal][i]);
}
if (setNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"];
}
}
else if (gblset[signal]) {
if (gblset[signal].length == 1) {
if (setNegs[signal]) str += operator["NOT"];
str += retPterm(gblset[signal][0]);
}
else {
if (setNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<gblset[signal].length; i++) {
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(gblset[signal][i]);
}
if (setNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"] + tabStr + cClrS +
operator["COMMENT"] + spcStr + operator["GSR_COM"] + cClrE;
}
}
else if (eqnType) str += operator["B0"];
return str;
}
function retCE(signal) {
var str = "";
if (ce[signal]) {
if (ce[signal].length == 1) {
var currImp = "";
if (!eqnType && ceimp[signal] && (ceimp[signal][0] == "1")) {
if ((currImp != retFBMC(ce[signal][i])) &&
(ce[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(ce[signal][0]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (ceNegs[signal]) str += operator["NOT"];
str += retPterm(ce[signal][0]);
}
else {
var currImp = "";
if (ceNegs[signal]) str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<ce[signal].length; i++) {
if (!eqnType && ceimp[signal] && (ceimp[signal][i] == "1")) {
if ((currImp != retFBMC(ce[signal][i])) &&
(ce[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(ce[signal][i]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(ce[signal][i]);
}
if (ceNegs[signal]) str += operator["CLOSE_NEGATE"];
str += operator["ENDLN"];
}
}
else if (eqnType) str += operator["B1"];
return str;
}
function retTrst(signal) {
var str = "";
if (trst[signal]) {
if (trstNegs[signal])
str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<trst[signal].length; i++) {
var currImp = "";
if (!eqnType && trstimp[signal] && (trstimp[signal][0] == "1")) {
if ((currImp != retFBMC(trst[signal][i])) &&
(trst[signal][i].indexOf("FB") == 0)) {
currImp = retFBMC(trst[signal][0]);
str += nlStr + operator["IMPORT"] + currImp;
}
}
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(trst[signal][i]);
}
if (trstNegs[signal]) str += operator["CLOSE_NEGATE"];
}
else if (gbltrst[signal]) {
if (trstNegs[signal])
str += operator["NOT"] + operator["OPEN_NEGATE"];
for (i=0; i<gbltrst[signal].length; i++) {
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(gbltrst[signal][i]);
}
if (trstNegs[signal]) str += operator["CLOSE_NEGATE"];
}
str += operator["ENDLN"];
return str;
}
function retEqn(signal) {
var str = inregStr = "";
var iStr = qStr = "";
var dStr = dEqn = "";
var cStr = cEqn = "";
var clrStr = clrEqn = "";
var preStr = preEqn = "";
var ceStr = ceEqn = "";
var oeStr = oeEqn = "";
var sigName = retSigName(signal);
var type = retSigType(retSigIndex(signal));
if (gbltrst[signal] || trst[signal]) iStr = operator["_I"];
if (eqnType) qStr = updateName(sigName, iStr);
if (inreg[signal]) {
if (!eqnType)
inregStr = operator["COMMENT"] + " Direct Input Register" + nlStr;
dStr = retSigName(inreg[signal][0]);
}
else dStr = retD1D2(signal);
if (eqnType && !dOneLit) {
dEqn = dStr;
dStr = dStr.substring(0,dStr.indexOf(operator["EQUAL_COLON"]));
}
else if (!eqnType) {
if (!dOneLit) dStr = dStr.substring(dStr.indexOf(operator["EQUAL_COLON"])+2);
if (sigNegs[retSigIndex(signal)] == "ON") dEqn += operator["NOT"];
dEqn += sigName;
if ((type == operator["FT"]) ||
(type == operator["FTD"])) dEqn += operator["_T"];
else if ((type == operator["FD"]) ||
(type == operator["FTD"])||
(type == operator["LD"])) dEqn += operator["_D"];
dEqn += " ";
if ((type != operator["Q"]) && (type != operator["LD"]))
dEqn += operator["EQUAL_COLON"];
else dEqn += operator["EQUAL"];
dEqn += dStr;
if (dOneLit) {
dEqn += operator["ENDLN"];
if (iostyle[signal] && iostyle[signal].indexOf("OD"))
dEqn += tabStr + operator["COMMENT"] + " " + operator["OD_COM"];
}
}
cStr = retClk(signal);
if (eqnType && !isOneLiteral(cStr)){
cEqn = cStr;
if (cEqn.indexOf(operator["ENDLN"]) == -1)
cEqn += operator["ENDLN"];
cStr = updateName(sigName, operator["_C"]);
}
else if (!eqnType && cStr) {
cEqn += cStr;
cStr = tabStr + sigName;
if (type == operator["LD"]) cStr += operator["_LH"];
else if (type == operator["FDD"]) cStr += operator["_DEC"];
else cStr += operator["_C"];
if (cEqn.indexOf(operator["ENDLN"]) == -1)
cEqn += operator["ENDLN"];
if (gblclk[signal]) cEqn += tabStr + operator["COMMENT"] + " " + operator["GCK_COM"];
}
clrStr = retRst(signal);
if (eqnType && !isOneLiteral(clrStr)){
clrEqn = clrStr;
if (cEqn.indexOf(operator["ENDLN"]) == -1)
clrEqn += operator["ENDLN"];
clrStr = updateName(sigName, operator["_CLR"]);
}
else if (!eqnType && clrStr) {
clrEqn += clrStr;
clrStr = tabStr + sigName + operator["_CLR"];
if (clrEqn.indexOf(operator["ENDLN"]) == -1)
clrEqn += operator["ENDLN"];
if (gblrst[signal]) clrEqn += tabStr + operator["COMMENT"] + " " + operator["GSR_COM"];
}
preStr = retSet(signal);
if (eqnType && !isOneLiteral(preStr)){
preEqn = preStr;
if (cEqn.indexOf(operator["ENDLN"]) == -1)
preEqn += operator["ENDLN"];
preStr = updateName(sigName, operator["_PRE"]);
}
else if (!eqnType && preStr) {
preEqn += preStr;
preStr = tabStr + sigName + operator["_PRE"];
if (preEqn.indexOf(operator["ENDLN"]) == -1)
preEqn += operator["ENDLN"];
if (gblset[signal]) preEqn += tabStr + operator["COMMENT"] + " " + operator["GSR_COM"];
}
if (!is9500()) {
ceStr = retCE(signal);
if (eqnType && !isOneLiteral(ceStr)){
ceEqn = ceStr;
if (cEqn.indexOf(operator["ENDLN"]) == -1)
ceEqn += operator["ENDLN"];
ceStr = updateName(sigName, operator["_CE"]);
}
else if (!eqnType && ceStr) {
ceEqn += ceStr;
ceStr = tabStr + sigName + operator["_CE"];
if (ceEqn.indexOf(operator["ENDLN"]) == -1)
ceEqn += operator["ENDLN"];
}
}
if (eqnType && gbltrst[signal]) oeEqn = retTrst(signal);
else if (!eqnType && (trst[signal] || gbltrst[signal])) oeEqn = retTrst(signal);
var newline = false;
if ((type == "") && (clrStr == "")) {
str += operator["ASSIGN"] + qStr + " " + operator["EQUAL"];
if (dOneLit) str += dStr;
else str += dEqn.substring(dEqn.indexOf(operator["EQUAL"])+2);
if (oeEqn != "") {
var oeStr = updateName(sigName, operator["_OE"]);
if (eqnType == 1) {
str += nlStr + sigName + operator["OE_START"] + qStr + operator["OE_WHEN"] + oeStr +
operator["OE_EQUAL"] + operator["B1"] + operator["OE_ELSE"] +
operator["OE_EQUAL"] + operator["BZ"] + operator["ENDLN"];
}
else if (eqnType == 2) {
str += nlStr + operator["ASSIGN"] + sigName + operator["OE_START"] +
oeStr + operator["OE_WHEN"] + qStr +
operator["OE_ELSE"] + operator["BZ"] + operator["ENDLN"];
}
str += nlStr + operator["ASSIGN"] + oeStr + " " + operator["EQUAL"] + " " + oeEqn;
}
}
else {
if (eqnType == 1) {
str += type + "_" + removePar(retSigName(signal)) +
": " + type + " " + operator["START_EQN"] +
qStr + ", " + dStr + ", " + cStr + ", " +
clrStr + ", " + preStr;
if (!is9500() && (type != operator["LD"])) str += ", " + ceStr;
str += operator["END_EQN"] + operator["ENDLN"];
newline = true;
}
else if (eqnType == 2) {
str += type + " " +
type + "_" + removePar(retSigName(signal)) +
operator["START_EQN"] +
qStr + ", " + dStr + ", " + cStr + ", " +
clrStr + ", " + preStr;
if (!is9500() && (type != operator["LD"])) str += ", " + ceStr;
str += operator["END_EQN"] + operator["ENDLN"];
newline = true;
}
if (dEqn != "") {
if (newline) str += nlStr;
if (inregStr) str += inregStr;
str += operator["ASSIGN"] + dEqn;
}
if (cEqn != "") {
if (newline || !eqnType) str += nlStr;
str += operator["ASSIGN"] + cStr + " " + operator["EQUAL"] + " " + cEqn;
}
if (clrEqn != "") {
if (newline || !eqnType) str += nlStr;
str += operator["ASSIGN"] + clrStr + " " + operator["EQUAL"] + " " + clrEqn;
}
if (preEqn != "") {
if (newline || !eqnType) str += nlStr;
str += operator["ASSIGN"] + preStr + " " + operator["EQUAL"] + " " + preEqn;
}
if (ceEqn != "") {
if (newline || !eqnType) str += nlStr;
str += operator["ASSIGN"] + ceStr + " " + operator["EQUAL"] + " " + ceEqn;
}
if (oeEqn != "") {
if (eqnType == 1) {
// var oeStr = updateName(sigName, operator["_OE"]);
var oeStr = sigName;
str += nlStr + sigName + operator["OE_START"] + qStr + operator["OE_WHEN"] + oeStr +
operator["OE_EQUAL"] + operator["B1"] + operator["OE_ELSE"] +
operator["OE_EQUAL"] + operator["BZ"] + operator["ENDLN"];
// str += nlStr + oeStr + " " + operator["EQUAL"] + " " + oeEqn;
}
else if (eqnType == 2) {
// var oeStr = updateName(sigName, operator["_OE"]);
var oeStr = sigName;
str += nlStr + operator["ASSIGN"] + sigName + operator["OE_START"] + oeStr + operator["OE_WHEN"] + qStr +
operator["OE_ELSE"] + operator["BZ"] + operator["ENDLN"];
// str += nlStr + operator["ASSIGN"] + oeStr + " " + operator["EQUAL"] + " " + oeEqn;
}
else {
var oeStr = sigName + operator["_OE"];
if (gbltrst[signal])
oeEqn += tabStr + operator["COMMENT"] + " " + operator["GTS_COM"];
str += nlStr + tabStr + oeStr + " " + operator["EQUAL"] + " " + oeEqn;
}
}
}
if (iostyle[signal] && iostyle[signal].indexOf("OD")) {
if (str.indexOf("//") == -1)
str += tabStr + operator["COMMENT"] + " " + operator["OD_COM"];
}
return str;
}
function retFamily() {
var family = "xc9500";
if (device.indexOf("XC2C") != -1) {
if (device.indexOf("S") != -1) family = "cr2s";
else family = "xbr";
}
else if (device.indexOf("XCR3") != -1) family = "xpla3";
else {
if (device.indexOf("XL") != -1) family = "xc9500xl";
if (device.indexOf("XV") != -1) family = "xc9500xv";
}
return family;
}
function retDesign() { return design; }
function getPterm(pt, type) {
if (type) return type + " = " + retPterm(pt);
return "PT" + pt.substring(pt.indexOf('_')+1,pt.length) + " = " + retPterm(pt);
}
function getPRLDName(prld) {
if (eqnType != 0) return prld;
else if (prld == "VCC") return "S";
return "R";
}
function retFbnand(signal) {
var str = operator["COMMENT"] + spcStr + "Foldback NAND";
str += nlStr + retSigName(signal) + spcStr + operator["EQUAL"] + spcStr;
for (i=0; i<fbnand[signal].length; i++) {
if (i>0) str += nlTabStr + operator["OR"] + spcStr;
str += retPterm(fbnand[signal][i]);
}
return str;
}
function getEqn(signal) { return retEqn(signal); }
function retUimPterm(pt) {
var str = "";
if (!uimPterms[pt]) return pt;
for (p=0; p<uimPterms[pt].length; p++) {
if (p>0) str += spcStr + operator["AND"] + spcStr;
var sig = uimPterms[pt][p];
if (sig.indexOf("/") != -1) sig = sig.substring(1, sig.length);
str += retSigName(sig);
}
return str;
}
function retUimEqn(signal) {
var str = operator["COMMENT"] + spcStr + "FC Node" + nlStr;
var neg = 0;
if (uimSigNegs[s] == "ON") str += operator["NOT"];
str += retSigName(signal) + spcStr + operator["EQUAL"];
str += retUimPterm(signal) + ";";
return str;
}
function retLegend(url) {
var str = "";
if (!eqnType && !isXC95()) {
str = "Legend: " + "&lt;" + "signame" + "&gt;" + ".COMB = combinational node mapped to ";
str += "the same physical macrocell as the FastInput \"signal\" (not logically related)";
}
else if (eqnType) {
str = "Register Legend:";
if (is9500()) {
str += nlTabStr + "FDCPE (Q,D,C,CLR,PRE);";
str += nlTabStr + "FTCPE (Q,D,C,CLR,PRE);";
str += nlTabStr + "LDCP (Q,D,G,CLR,PRE);";
}
else if (retFamily() == "xbr") {
str += nlTabStr + "FDCPE (Q,D,C,CLR,PRE,CE);";
str += nlTabStr + "FDDCPE (Q,D,C,CLR,PRE,CE);";
str += nlTabStr + "FTCPE (Q,D,C,CLR,PRE,CE);";
str += nlTabStr + "FTDCPE (Q,D,C,CLR,PRE,CE);";
str += nlTabStr + "LDCP (Q,D,G,CLR,PRE);";
}
else {
str += nlTabStr + "FDCPE (Q,D,C,CLR,PRE,CE);";
str += nlTabStr + "FTCPE (Q,D,C,CLR,PRE,CE);";
str += nlTabStr + "LDCP (Q,D,G,CLR,PRE);";
}
}
return str;
}

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<head>
<script>
function init() {
document.open();
document.write(parent.leftnav.document.options.htmlStr.value);
document.close();
}
</script>
</head>
<body onload="javascript:init()">
</body>
</html>

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<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
<html>
<!--(==============================================================)-->
<!--(Document created with RoboEditor. )============================-->
<!--(==============================================================)-->
<head>
<title>Equations</title>
<!--(Meta)==========================================================-->
<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
<meta name=generator-major-version content=0.1>
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<meta name=layout-width content=798>
<meta name=date content="05 1, 2002 4:30:09 PM">
</head>
<!--(Body)==========================================================-->
<body>
<h1>Equations</h1>
<p><span style="font-size: 10pt; font-family: arial, sans-serif;">The Equations
page provides a list of equations organized by signal name. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->You
can use the pulldown menu in the left-hand frame of the page to select
ABEL, VHDL, or Verilog as your language of display.</span> </p>
<p><img src="xml8.jpg"
x-maintain-ratio=TRUE
style="border: none;
width: 181px;
height: 448px;
float: none;"
width=181
height=448
border=0></p>
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var warnList = new Array();
var errorList = new Array();
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case 0:
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else parent.leftnav.document.options.info.value = 0;
break;
case 1:
if (warn.checked) parent.leftnav.document.options.warn.value = 1;
else parent.leftnav.document.options.warn.value = 0;
break;
case 2:
if (error.checked) parent.leftnav.document.options.error.value = 1;
else parent.leftnav.document.options.error.value = 0;
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}
parent.leftnav.showError();
}
function init() {
if (!document.options) return;
with (document.options) {
if (parent.leftnav.document.options.info.value == 1) info.checked = 1;
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<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
<html>
<!--(==============================================================)-->
<!--(Document created with RoboEditor. )============================-->
<!--(==============================================================)-->
<head>
<title>Errors</title>
<!--(Meta)==========================================================-->
<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
<meta name=generator-major-version content=0.1>
<meta name=generator-minor-version content=1>
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<meta name=layout-width content=798>
<meta name=date content="05 1, 2002 4:22:26 PM">
<style>
<!--
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--></style><script language="javascript" title="WebHelpInlineScript">
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</head>
<!--(Body)==========================================================-->
<body>
<h1>Errors/Warnings</h1>
<p class="whs1">The Errors/Warnings
section of the report lists all of the error, warning, and information
messages generated by the fitter. By default, this section will display
the number of each kind of message you have and the full text of the messages,
but checkboxes at the top of the screen allow you to filter message details
as you choose. </p>
<p class="whs2">Checking all
the boxes will give you a display like this:</p>
<p><SCRIPT LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
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//--></SCRIPT></p>
<p class="whs3">Deselecting
the Warning box in this particular example would result in this less detailed
display:</p>
<p><SCRIPT LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='xml7.jpg' x-maintain-ratio='TRUE' width='576' height='226' border='0'>");}
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</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="errors.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd" id="XC9572XL">
<span id="error" class="pgRef"><h3 align="center">Errors and Warnings</h3>
<b>There are 0 error(s), 1 warning(s), and 0 information.</b><br><br><table width="90%" border="1" cellpadding="0" cellspacing="0"><tr><td>[Warning]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'STERMINATOR.ise'.</td></tr></table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd">
<h3 align="center">Failure Table</h3>
<table width="90%" border="1" cellpadding="0" cellspacing="0"><tr class="pgHeader">
<th align="left">Signal Name</th>
<th align="left">FB1</th>
<th align="left">FB2</th>
<th align="left">FB3</th>
<th align="left">FB4</th>
</tr></table>
<table width="90%" border="1" cellpadding="0" cellspacing="0"><table width="90%" border="1" cellpadding="0" cellspacing="0">
<tr><td>Legend:</td></tr>
<tr><td> ce - signal clock enable cannot be placed</td></tr>
<tr><td> clk - signal clock cannot be placed</td></tr>
<tr><td> fbi - insufficient function block inputs available to place signal</td></tr>
<tr><td> io - insufficient I/O pins available to place output</td></tr>
<tr><td> loc - signal cannot be placed in this FB because it is assigned to a different FB</td></tr>
<tr><td> mc - insufficient macrocells available to place signal</td></tr>
<tr><td> oe - signal output enable cannot be placed</td></tr>
<tr><td> pt - insufficient product terms available to place signal</td></tr>
<tr><td> sr - signal set/reset cannot be placed</td></tr>
<tr><td> unk - unknown reason for failure - Please contact Xilinx Support</td></tr>
</table></table>
</body>
<form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
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</tr></table></span></form>
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
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<title>Failure Table</title>
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<body>
<h1>
Failure Table</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Failure Table section provides a table listing all logic failing to be
placed as well as the cause for failure to fit for each individual Function
Block. </font>The user can use this table to determine primary cause of
failure and try to correct it.</span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Failure Table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
signal name&nbsp;</font></span></li>
</ul>
<div class="whs2"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on the signal name will open a new window with the equations for
that signal.&nbsp;</font></span></div>
<ul type="disc" class="whs3">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>A
column for each Function Block in device, with reason for failure to fit
for each FB</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>A
legend at the bottom listing all possible reasons for failure</font></span></li>
</ul>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd" id="XC9572XL">
<span id="fbsum" class="pgRef"><h3 align="center">Function Blocks</h3>
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
<tr class="pgHeader">
<th>Function Block</th>
<th>Macrocells Used/Total</th>
<th>Function Block Inputs Used/Total</th>
<th>Product Terms Used/Total</th>
<th>Pins Used/Total</th>
</tr>
<tr>
<td align="center"><a href="javascript:showFBDetail('FB1');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">1 / 18</td>
<td align="center">54 / 54</td>
<td align="center">52 / 90</td>
<td align="center">5 / 13</td>
</tr>
<tr>
<td align="center"><a href="javascript:showFBDetail('FB2');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">9 / 18</td>
<td align="center">14 / 54</td>
<td align="center">18 / 90</td>
<td align="center">13 / 13</td>
</tr>
<tr>
<td align="center"><a href="javascript:showFBDetail('FB3');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">18 / 18</td>
<td align="center">24 / 54</td>
<td align="center">44 / 90</td>
<td align="center">8 / 14</td>
</tr>
<tr>
<td align="center"><a href="javascript:showFBDetail('FB4');" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">0 / 18</td>
<td align="center">0 / 54</td>
<td align="center">0 / 90</td>
<td align="center">12 / 12</td>
</tr>
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</body>
</html>

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function showFBApplet(fb) { parent.leftnav.showAppletFB(fb); }
function showFB(fb) { parent.leftnav.showFB(fb); }
function showMC(mc) { parent.leftnav.showAppletMC(mc); }
function showPT(pterm, type) { parent.leftnav.showPterm(pterm, type); }
function showPin(pin) { parent.leftnav.showAppletPin(pin); }
function showEqn(sig) { parent.leftnav.showEqn(sig); }
function showFBDetail(fb) { parent.leftnav.showFB(fb); }
function showLegend(url) { parent.leftnav.showLegend(url, 650, 350); }
function showTop() { parent.leftnav.showTop(); }

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd" id="XC9572XL">
<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
<td width="33%" valign="center" align="left"></td>
<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
<option value="FB2" selected>FB2</option>
<option value="FB3">FB3</option>
<option value="FB4">FB4</option></select></form></td>
<td width="33%" valign="center" align="right"></td>
</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
<tr class="pgHeader">
<th width="10%">Signal Name</th>
<th width="10%">Total Product Terms</th>
<th width="30%">Product Terms</th>
<th width="10%">Location</th>
<th width="10%">Power Mode</th>
<th width="10%">Pin Number</th>
<th width="10%">PinType</th>
<th width="10%">Pin Use</th>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC1</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('nSTERM')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nSTERM</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB2_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
</td>
<td align="center" width="10%">MC2</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">60</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">O</td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC3</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">58</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;17&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC4</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">59</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'STERM'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC5</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">61</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;29&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC6</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">62</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;30&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC7</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC8</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">63</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;5&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC9</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">64</td>
<td width="8%" align="center">I/O/GSR</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;12&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC10</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">1</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;31&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR9_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;9&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB2_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a>
</td>
<td align="center" width="10%">MC11</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">2</td>
<td width="8%" align="center">I/O/GTS2</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;11&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;1&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB2_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a>
</td>
<td align="center" width="10%">MC12</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">4</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;15&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR12_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;12&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB2_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a>
</td>
<td align="center" width="10%">MC13</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;11&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB2_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a>
</td>
<td align="center" width="10%">MC14</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">5</td>
<td width="8%" align="center">I/O/GTS1</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'CLKdat'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR10_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;10&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB2_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a>
</td>
<td align="center" width="10%">MC15</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">6</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'nAS'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;0&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB2_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a>
</td>
<td align="center" width="10%">MC16</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NB1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NB&lt;1&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB2_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a>
</td>
<td align="center" width="10%">MC17</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">7</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;7&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NB0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NB&lt;0&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB2_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB2_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a>
</td>
<td align="center" width="10%">MC18</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
</table></span></div>
<div id="tipBox"></div>
<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
<li><a href="Javascript:showEqn('OpTxBIN_STEP409_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$BIN_STEP$409</a></li>
<li>A&lt;11&gt;</li>
<li>A&lt;12&gt;</li>
<li>A&lt;20&gt;</li>
<li>A&lt;21&gt;</li>
<li>A&lt;22&gt;</li>
<li>A&lt;23&gt;</li>
<li>A&lt;24&gt;</li>
<li>A&lt;25&gt;</li>
<li>CMD&lt;0&gt;</li>
<li>CMD&lt;1&gt;</li>
<li>FC&lt;0&gt;</li>
<li><a href="Javascript:showEqn('NA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NA</a></li>
<li>STERM</li>
</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
<input type="button" onclick="javascript:showFB('FB1')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
  
<input type="button" onclick="javascript:showFB('FB3')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
</td></tr></table></td>
<td align="right">
<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
</td>
</tr></table></span></form>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd" id="XC9572XL">
<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
<td width="33%" valign="center" align="left"></td>
<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
<option value="FB2">FB2</option>
<option value="FB3" selected>FB3</option>
<option value="FB4">FB4</option></select></form></td>
<td width="33%" valign="center" align="right"></td>
</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
<tr class="pgHeader">
<th width="10%">Signal Name</th>
<th width="10%">Total Product Terms</th>
<th width="30%">Product Terms</th>
<th width="10%">Location</th>
<th width="10%">Power Mode</th>
<th width="10%">Pin Number</th>
<th width="10%">PinType</th>
<th width="10%">Pin Use</th>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;8&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_1_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_1</a> <a href="Javascript:showPT('FB3_1_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">1_2</a>
</td>
<td align="center" width="10%">MC1</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('nFPUCS')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">nFPUCS</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_2_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_1</a> <a href="Javascript:showPT('FB3_2_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">2_2</a>
</td>
<td align="center" width="10%">MC2</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">22</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">O</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;7&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_3_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_1</a> <a href="Javascript:showPT('FB3_3_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">3_2</a>
</td>
<td align="center" width="10%">MC3</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">31</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'FC&lt;0&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;6&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_4_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_1</a> <a href="Javascript:showPT('FB3_4_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">4_2</a>
</td>
<td align="center" width="10%">MC4</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">32</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;5&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_5_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_1</a> <a href="Javascript:showPT('FB3_5_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">5_2</a>
</td>
<td align="center" width="10%">MC5</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">24</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;4&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_6_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_1</a> <a href="Javascript:showPT('FB3_6_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">6_2</a>
</td>
<td align="center" width="10%">MC6</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">34</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;16&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;3&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_7_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_1</a> <a href="Javascript:showPT('FB3_7_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">7_2</a>
</td>
<td align="center" width="10%">MC7</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NR2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NR&lt;2&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_8_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_1</a> <a href="Javascript:showPT('FB3_8_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">8_2</a>
</td>
<td align="center" width="10%">MC8</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">25</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;0&gt;</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_9_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_1</a> <a href="Javascript:showPT('FB3_9_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">9_2</a>
</td>
<td align="center" width="10%">MC9</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">27</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NA</a></td>
<td align="center" width="10%">2</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_10_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_1</a> <a href="Javascript:showPT('FB3_10_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">10_2</a>
</td>
<td align="center" width="10%">MC10</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">39</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'CMD&lt;0&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC8_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;8&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_11_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_1</a> <a href="Javascript:showPT('FB3_11_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_2</a> <a href="Javascript:showPT('FB3_11_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">11_3</a>
</td>
<td align="center" width="10%">MC11</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">33</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;7&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_12_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_1</a> <a href="Javascript:showPT('FB3_12_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_2</a> <a href="Javascript:showPT('FB3_12_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">12_3</a>
</td>
<td align="center" width="10%">MC12</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">40</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;2&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;6&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_13_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_1</a> <a href="Javascript:showPT('FB3_13_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_2</a> <a href="Javascript:showPT('FB3_13_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">13_3</a>
</td>
<td align="center" width="10%">MC13</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;5&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_14_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_1</a> <a href="Javascript:showPT('FB3_14_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_2</a> <a href="Javascript:showPT('FB3_14_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">14_3</a>
</td>
<td align="center" width="10%">MC14</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">35</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;22&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;4&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_15_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_1</a> <a href="Javascript:showPT('FB3_15_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_2</a> <a href="Javascript:showPT('FB3_15_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">15_3</a>
</td>
<td align="center" width="10%">MC15</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">36</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;20&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;3&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_16_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_1</a> <a href="Javascript:showPT('FB3_16_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_2</a> <a href="Javascript:showPT('FB3_16_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">16_3</a>
</td>
<td align="center" width="10%">MC16</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">42</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;19&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;2&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_17_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_1</a> <a href="Javascript:showPT('FB3_17_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_2</a> <a href="Javascript:showPT('FB3_17_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">17_3</a>
</td>
<td align="center" width="10%">MC17</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%">38</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%">(b)</td>
</tr>
<tr>
<td align="center" width="10%"><a href="Javascript:showEqn('NC1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NC&lt;1&gt;</a></td>
<td align="center" width="10%">3</td>
<td align="center" width="30%"> <a href="Javascript:showPT('FB3_18_1')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_1</a> <a href="Javascript:showPT('FB3_18_2')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_2</a> <a href="Javascript:showPT('FB3_18_3')" onmouseover="window.status='show Pterm'; return true;" onmouseout="window.status=''">18_3</a>
</td>
<td align="center" width="10%">MC18</td>
<td align="center" width="10%">STD</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%">(b)</td>
</tr>
</table></span></div>
<div id="tipBox"></div>
<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol>
<li>A&lt;10&gt;</li>
<li>A&lt;13&gt;</li>
<li>A&lt;14&gt;</li>
<li>A&lt;15&gt;</li>
<li>A&lt;16&gt;</li>
<li>A&lt;17&gt;</li>
<li>A&lt;18&gt;</li>
<li>A&lt;19&gt;</li>
<li>A&lt;2&gt;</li>
<li>A&lt;3&gt;</li>
<li>A&lt;4&gt;</li>
<li>A&lt;5&gt;</li>
<li>A&lt;6&gt;</li>
<li>A&lt;7&gt;</li>
<li>A&lt;8&gt;</li>
<li>A&lt;9&gt;</li>
<li>CLKdat</li>
<li>CMD&lt;0&gt;</li>
<li>CMD&lt;1&gt;</li>
<li>FC&lt;0&gt;</li>
<li>FC&lt;1&gt;</li>
<li>FC&lt;2&gt;</li>
<li><a href="Javascript:showEqn('NA')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">NA</a></li>
<li>nAS</li>
</ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="center"><table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td width="100%" align="center">
<input type="button" onclick="javascript:showFB('FB2')" onmouseover="window.status='show previous Function Block'; return true;" onmouseout="window.status=''" value="prev">
  
<input type="button" onclick="javascript:showFB('FB4')" onmouseover="window.status='show next Function Block'; return true;" onmouseout="window.status=''" value="next">
</td></tr></table></td>
<td align="right">
<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
</td>
</tr></table></span></form>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="tooltips.js"></script><script src="fbs.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd" id="XC9572XL">
<span id="fbsel" class="pgRef"><table cellspacing="0" cellpadding="0" border="0" width="90%" align="center"><tr>
<td width="33%" valign="center" align="left"></td>
<td width="33%" valign="center" align="center"><form name="fbopt"><select onchange="javascript:showFB(document.fbopt.fbType.options[document.fbopt.fbType.options.selectedIndex].value)" name="fbType"><option value="FB1">FB1</option>
<option value="FB2">FB2</option>
<option value="FB3">FB3</option>
<option value="FB4" selected>FB4</option></select></form></td>
<td width="33%" valign="center" align="right"></td>
</tr></table></span><div><span id="fbdata" class="pgRef"><table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
<tr class="pgHeader">
<th width="10%">Signal Name</th>
<th width="10%">Total Product Terms</th>
<th width="30%">Product Terms</th>
<th width="10%">Location</th>
<th width="10%">Power Mode</th>
<th width="10%">Pin Number</th>
<th width="10%">PinType</th>
<th width="10%">Pin Use</th>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC1</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC2</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">43</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;3&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC3</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">46</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;28&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC4</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">47</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;6&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC5</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">44</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;13&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC6</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">49</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;18&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC7</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC8</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">45</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'FC&lt;1&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC9</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC10</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">51</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;14&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC11</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">48</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;23&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC12</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">52</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;24&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC13</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC14</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">50</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;21&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC15</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">56</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'FC&lt;2&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC16</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC17</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">57</td>
<td width="8%" align="center">I/O</td>
<td align="center" width="10%"><a href="#" onmouseover="this._tip = 'A&lt;10&gt;'; window.status='Input Signal'; return true;" onmouseout="window.status=''" class="tipBoxCursor">I</a></td>
</tr>
<tr>
<td align="center" width="10%">(unused)</td>
<td align="center" width="10%">0</td>
<td align="center" width="30%"> </td>
<td align="center" width="10%">MC18</td>
<td align="center" width="10%"> </td>
<td align="center" width="10%"> </td>
<td align="center" width="10%">(b)</td>
<td align="center" width="10%"> </td>
</tr>
</table></span></div>
<div id="tipBox"></div>
<br><span id="fbsiguse" class="pgRef"><b>Signals Used By Logic in Function Block</b><br><ol></ol></span><form><span class="pgRef"><table width="90%" align="center"><tr>
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<h1>
Function Block Specifics</h1>
<div class="whs1">To access specific details for a particular function
block, click on that function block in either the <a href="maplogicdoc.htm">Mapped
Logic</a>, <a href="mapinputdoc.htm">Mapped Inputs</a>, or <a href="fbsdoc.htm" style="font-family: arial, sans-serif; font-size: 10pt;">Function
Blocks</a> sections of the fitter report.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
function block details page displays a table of details about the particular
function block you selected, a view button you can click to show a graphical
display of the function block, and a pulldown menu you can use to select
other function blocks to see.</div>
<p class="whs2">The Table
<p class="whs3">The View
<p><script LANGUAGE="JavaScript"><!--
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//--></script>
<h4 class="whs4">
<a NAME="table"></a>The Table</h4>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
table at the top of the function block details page provides the following
information about the function block:</font></span>
<ul type="disc" class="whs5">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
signal name&nbsp;</font></span></li>
</ul>
<div class="whs6"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on a signal name will open a new window with the equations for
that signal.&nbsp;</font></span></div>
<ul type="disc" class="whs7">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total product terms used&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><!--kadov_tag{{<spaces>}}--><font size=-1>&nbsp;<!--kadov_tag{{</spaces>}}-->A
list of product terms</font></span></li>
</ul>
<div class="whs8"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on a&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->product
term will open a new window with the equations for that term.&nbsp;</font></span></div>
<ul type="disc" class="whs9">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
macrocell number in which the function block is located</font></span></li>
</ul>
<div class="whs10"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-weight: bold;"><font size=-1><b>Note:</span></b>
Clicking on the underscored macrocell number will provide a graphical display
of the macrocell that looks like this:</font></span></div>
<p class="whs11"><script LANGUAGE="JavaScript"><!--
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.
<ul type="disc" class="whs12">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
power mode</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin number - an asterisk "*" indicates a user assignment</font></span></li>
</ul>
<ul type="disc" class="whs13">
<div class="whs14"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-weight: bold;"><font size=-1><b>N</span></b>ote:</span><span style="font-family: arial, sans-serif; font-size: 10pt;">
Clicking on the underscored pin number will provide the pin layout diagram
for the highlighted pin.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Rolling
your mouse over the colored pin will pop up a tooltip with the signal name
assigned to the pin, the I/O standard,&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->the
I/O style, the slew rate, and/or any constraints assigned to the pin:</font></span></div>
</ul>
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</div>
<ul type="disc" class="whs16">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin type</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin use&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1><i>XPLA3
only</i> - The GCK (Global Clock Signal) mapping&nbsp;</font></span></li>
</ul>
<div class="whs17"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Moving your mouse cursor over an "I" in the Pin Use column will display
that input signal as a tooltip.</font></span></div>
<br><span style="font-family: arial, sans-serif; font-size: 10pt;">
<br><span style="font-family: arial, sans-serif; font-size: 10pt;"><i>XBR
only</i> - Below the resource table there is another table listing the
<b>Function Block Control Term</b> usage, the product term mapped to the
control term is listed. Clicking on the product term will bring up a pop-up
window displaying that product term.
<blockquote>
<li>
CTC - control term clock</li>
<li>
CTR - control term reset</li>
<li>
CTS - control term set</li>
<li>
CTE - control term output enable</li>
</blockquote>
<p><br><span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>Below
this table you will find a list of signals used by logic in the function
block you are viewing.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
list displays output signals as links.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Clicking
on an output signal link will open a new window showing the equations for
that signal.</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}-->
<p class="whs18"><span style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"><!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}--></b>There
is also a&nbsp;<script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
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//--></script>
button
below the table.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Click
this button to open a new window describing all of the acronyms used in
the function block table.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->You
can select either brief descriptions or more detailed descriptions by clicking
the "Verbose" button at the top of the window.</font></span>
<h4 class="whs19">
<a NAME="view"></a>The View</h4>
<div class="whs20">When you click on the&nbsp;<script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='view.gif' x-maintain-ratio='TRUE' width='61' height='53' border='0'>");}
else
{ document.write("<img src='view.gif' x-maintain-ratio='TRUE' style='border: none; width: 61px; height: 53px; float: none;' width='61' height='53' border='0'>");}
//--></script>
button
above the table, a new window will open with a graphical display of the
function block you are examining.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
pins are all color-coded: input pins are green, output pins are blue, and
clocks are magenta:</div>
<p class="whs21"><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='fb1.gif' x-maintain-ratio='TRUE' width='482' height='378' border='0'>");}
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{ document.write("<img src='fb1.gif' x-maintain-ratio='TRUE' style='border: none; width: 482px; height: 378px; float: none;' width='482' height='378' border='0'>");}
//--></script>
<p class="whs22">Right-click anywhere within the window to pull up a menu
that allows you to zoom in or out for easier viewing.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->
<p class="whs23">This menu also allows you choose to see all of the input
connections, all of the output connections, or both at once.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Like
the pins, the signals are color-coded: inputs are red, outputs are yellow,
and macrocell connections are aqua:
<p class="whs24"><script LANGUAGE="JavaScript"><!--
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//--></script>
<p class="whs25">To examine the signals of single pins, simply click the
pin whose signals you wish to see.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->To
examine multiple pins without having to see everything at once, hold down
the control key while you click the pins you want to view.
<p class="whs26">To view the signals for individual macrocells:
<ul type="disc" class="whs27">
<div class="whs28">Click the inside edge of the macrocell to display its
macrocell connections and inputs.</div>
<p class="whs29">Click the outer edge to display its output signals
<p class="whs30">Click in the center to display everything
<p class="whs31">Double click in the center to open a new window with a
detailed macrocell diagram</ul>
<div class="whs32"></div>
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<h1>Function Blocks</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The Function
Blocks page provides a summary of all function blocks' resources. Clicking
on one of the function blocks in the summary table will display the <a href="fbs_FBdoc.htm">specific details</a> for that function block. <!--kadov_tag{{<spaces>}}-->&nbsp;</FONT></span><!--kadov_tag{{</spaces>}}-->
<!--begin!kadov{{--><br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}-->&nbsp;
<!--begin!kadov{{--><br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The summary table
contains the following: <!--kadov_tag{{<spaces>}}-->&nbsp;</FONT></span><!--kadov_tag{{</spaces>}}-->
<ul type="disc" class="whs1">
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
function block</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of macrocell used </FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of function block inputs used </FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of product terms used</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
pins used</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
local control terms used</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of foldback NANDs used (CoolRunner only)</FONT></span></li>
</ul>
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<title>genmsg</title>
</head>
<body>
&nbsp;
<br>&nbsp;
<dl>
<dd>
This file is currently being generated. Please recheck the link after some
time for this report data.</dd>
</dl>
</body>
</html>

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<html>
<head>
<title></title>
</head>
<frameset frameborder="NO" framespacing="0" border="0" rows="94,*,0,0" cols="*">
<frame name="topnav" src="../tim/topnav.htm" scrolling="no" noresize marginwidth="0" marginheight="0">
<frameset frameborder="NO" framespacing="0" border="0" cols="125,*">
<frame name="leftnav" src="leftnav.htm" noresize marginwidth="0" marginheight="0">
<frame name="content" src="summary.htm">
</frameset>
<frame name="eqns" src="eqns.htm" scrolling="no">
</frameset>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<span id="maplog" class="pgRef"><h3 align="center">Unmapped Inputs</h3>
<table width="90%" border="1" cellpadding="0" cellspacing="0"><tr class="pgHeader">
<th width="28%">Signal Name</th>
<th align="center">User Assignment</th>
</tr></table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</html>

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function showInputLeft() { parent.leftnav.showInputLeft(); }

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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
<meta name="generator-major-version" content="0.1">
<meta name="generator-minor-version" content="1">
<meta name="filetype" content="kadov">
<meta name="filetype-version" content="1">
<meta name="page-count" content="1">
<meta name="layout-height" content="1506">
<meta name="layout-width" content="639">
<meta name="date" content="05 24, 2002 5:49:09 PM">
<meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD (Windows NT 5.0; U) [Netscape]">
<title>Mapped Logic</title>
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<style>
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ul.whs5 {list-style: disc;}
p.whs6 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
p.whs7 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
ul.whs8 {list-style: disc;}
p.whs9 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
p.whs10 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
ul.whs11 {list-style: disc;}
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}
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origWidth = innerWidth;
origHeight = innerHeight;
onresize = reDo;
}
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<style>
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div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
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</head>
<body>
<h1>
Unmapped Inputs</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Unmapped Inputs section provides a table listing all inputs that failed
to fit into the specified device. The page will appear in your browser
sorted by Signal Name.&nbsp;</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Unmapped Inputs table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
input signal name&nbsp;</font></span></li>
</ul>
<ul type="disc" class="whs11">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Pin/FB Assignment specified by the user.</font></span></li>
</ul>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script>var currEqnType = defEqnType = 1</script><script src="applet.js"></script><script src="leftnav.js"></script><link rel="stylesheet" type="text/css" href="../tim/toc.css">
</head>
<body bgcolor="#CCCCCC" text="#000000"><form name="options">
<span class="tocRef"><table width="105" border="0" cellspacing="0" cellpadding="0">
<tr><td colspan="2"><div align="left"><span class="HEADING">Fitter Report</span></div></td></tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showSummary();" class="SECONDARY-NAV" onmouseover="window.status='goto Summary'; return true;" onmouseout="window.status=''">Summary</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showError(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Errors/Warnings'; return true;" onmouseout="window.status=''">Errors/Warnings</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showMappedLogics(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Logic'; return true;" onmouseout="window.status=''">Logic</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showMappedInputs(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Inputs'; return true;" onmouseout="window.status=''">Inputs</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showFBSum();" class="SECONDARY-NAV" onmouseover="window.status='goto Function Blocks Summary'; return true;" onmouseout="window.status=''">Function Blocks</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showEqnAll();" class="SECONDARY-NAV" onmouseover="window.status='goto Equations'; return true;" onmouseout="window.status=''">Equations</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showPinOut(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Pin List'; return true;" onmouseout="window.status=''">Pin List</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showOptions();" class="SECONDARY-NAV" onmouseover="window.status='goto Compiler Options'; return true;" onmouseout="window.status=''">Compiler Options</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showAscii();" class="SECONDARY-NAV" onmouseover="window.status='goto Text Report'; return true;" onmouseout="window.status=''">Text Report</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showHelp();" class="SECONDARY-NAV" onmouseover="window.status='goto Help'; return true;" onmouseout="window.status=''">Help</a></td>
</tr>
</table></span><div align="left">
<br><br><br><table width="105" border="0" cellspacing="0" cellpadding="0">
<tr><td colspan="2"><b><span class="HEADING">Equation Display Style</span></b></td></tr>
<tr>
<td width="7"> </td>
<td><select name="eqnType" onchange="doEqnFormat()"><option value="0">ABEL</option>
<option value="1" selected>VHDL</option>
<option value="2">Verilog</option></select></td>
</tr>
</table>
<br><b> </b>
</div>
<input type="hidden" name="info" value="1"><input type="hidden" name="warn" value="1"><input type="hidden" name="error" value="1"><input type="hidden" name="inOn" value="1"><input type="hidden" name="outOn" value="1"><input type="hidden" name="glbOn" value="1"><input type="hidden" name="ispOn" value="1"><input type="hidden" name="vccOn" value="1"><input type="hidden" name="gndOn" value="1"><input type="hidden" name="prohibitOn" value="1"><input type="hidden" name="unuseOn" value="1"><input type="hidden" name="ncOn" value="1"><input type="hidden" name="htmlStr" value=""><input type="hidden" name="pinStr" value=""><input type="hidden" name="eqnStr" value=""><input type="hidden" name="errStr" value=""><input type="hidden" name="pinSel" value="0"><input type="hidden" name="currPage" value="summary">
</form></body>
</html>

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var noAppletOnClicked = 1;
var appletMsg = "";
var waitWin;
var oldIn = oldOut = oldGbl = oldIsp = oldVcc = oldGnd = oldProhibit = oldUnuse = oldNc = 1;
var oldInfo = oldWarn = oldError = 1;
var verbose = 0;
var dispPage, mapLogPage, mapInPage, unLogPage, unInPage;
var javaPermission = 0;
var abelEqn = vhdlEqn = verEqn = "";
function IsNS() {
return ((navigator.appName.indexOf("Netscape") >= 0) &&
(parseFloat(navigator.appVersion) >= 4)) ? true : false;
}
function openWait() {
waitWin = window.open("wait.htm", "wait",
"toolbar=no,location=no,"+
"directories=no,status=no,menubar=no,scrollbars=no,"+
"resizable=no,width=300,height=50" );
}
function closeWait() { if (waitWin) waitWin.close(); }
function popHTML(name, str) {
document.options.htmlStr.value = str;
if (name.indexOf(":") > -1)
name = name.substring(0,name.indexOf(":")) + "_COLON_" +
name.substring(name.indexOf(":")+1,name.length);
if (name.indexOf(".") > -1)
name = name.substring(0,name.indexOf(".")) + "_DOT_" +
name.substring(name.indexOf(".")+1,name.length);
var win = window.open("result.htm", "win_"+name,
"toolbar=no,location=no,"+
"directories=no,status=no,menubar=no,scrollbars=yes,"+
"resizable=yes,width=300,height=200" );
win.focus();
}
function setAppletPermission() { appletPermission = 1; }
function getAppletPermission() { return( appletPermission); }
function getAppletMsg() { return(appletMsg); }
function setAppletMsg(msg) { appletMsg = msg; }
function showHTML(page, html) {
dispPage = html;
document.options.currPage.value = page;
parent.content.location.href = html;
}
function showTop() { showHTML(document.options.currPage.value, dispPage); }
function setVerbose(value) { verbose = value; }
function showLegend(url, w, h) {
if (verbose == 1) {
url = url.substring(0,name.indexOf(".htm")) + "V.htm";
}
var win = window.open(url, 'win',
'toolbar=no,location=no,directories=no,status=no,menubar=no,scrollbars=yes,resizable=yes,width='+w+',height='+h);
win.focus();
}
function showSummary() { showHTML("summary", "summary.htm"); }
function showOptions() { showHTML("options", "options.htm"); }
function showFBSum() { showHTML("fbs", "fbs.htm"); }
function showFB(fb) { showHTML("fbs_FB", "fbs_"+fb+".htm"); }
function showPinOut() { showHTML("pins", "pins.htm"); }
function showError() { showHTML("errors", "errs.htm"); }
function showFailTable() { showHTML("failtable", "failtable.htm"); }
function showEqnAll() {
openWait();
parent.eqns.setOper(currEqnType);
if (currEqnType == defEqnType) showHTML("equations", "defeqns.htm");
else if (currEqnType == 0) {
if (abelEqn == "") abelEqn = parent.eqns.getEqnList();
document.options.htmlStr.value = abelEqn;
showHTML("equations", "equations.htm");
}
else if (currEqnType == 1) {
if (vhdlEqn == "") vhdlEqn = parent.eqns.getEqnList();
document.options.htmlStr.value = vhdlEqn;
showHTML("equations", "equations.htm");
}
else {
if (verEqn == "") verEqn = parent.eqns.getEqnList();
document.options.htmlStr.value = verEqn;
showHTML("equations", "equations.htm");
}
closeWait();
}
function showEqn(sig) {
popHTML(sig, parent.eqns.getEqn(sig));
}
function showPterm(pterm, type) {
popHTML(pterm, parent.eqns.getPterm(pterm, type));
}
function showAscii() { showHTML("ascii", "ascii.htm"); }
function showHelp() {
var helpDoc = document.options.currPage.value + "doc.htm";
popWin(helpDoc);
}
function getMapParam(type) {
var paramStr = "";
switch(type) {
case 1: paramStr += "10"; break;
case 2: paramStr += "01"; break;
case 3: paramStr += "11"; break;
case 4: paramStr += "02"; break;
case 5: paramStr += "12"; break;
default: paramStr += "00";
}
return paramStr;
}
function showMappedLogics(type) {
showHTML("maplogic", "maplogic_" + getMapParam(type) + ".htm");
}
function showMappedInputs(type) {
showHTML("mapinput", "mapinput_" + getMapParam(type) + ".htm");
}
function showUnMappedLogics(type) {
showHTML("unmaplogic", "unmaplogic_" + getMapParam(type) + ".htm");
}
function showLogicLeft() { showHTML("logicleft", "logicleft.htm"); }
function showUnMappedInputs(type) {
showHTML("unmapinput", "unmapinput_" + getMapParam(type) + ".htm");
}
function showInputLeft() { showHTML("inputleft", "inputleft.htm"); }
function doEqnFormat() {
var type = document.options.eqnType.options[document.options.eqnType.options.selectedIndex].value;
currEqnType = type;
parent.eqns.setOper(currEqnType);
if (document.options.currPage.value == "equations") showEqnAll();
}
function showNoAppletAlert() {
window.alert("No Applet supported for this session!!!");
}
function showAppletMC(mc) {
if (parent.applets) parent.applets.showAppletGraphicMC(mc);
else showNoAppletAlert();
}
function showAppletFB(fb) {
if (parent.applets) parent.applets.showAppletGraphicFB(fb);
else showNoAppletAlert();
}
function showAppletPin(pin) {
if (parent.applets) parent.applets.showAppletGraphicPin(pin);
else showNoAppletAlert();
}
function printAppletPkg() {
if (parent.applets) parent.applets.printAppletPkg();
else showNoAppletAlert();
}
function popWin(url) {
var win = window.open(url, 'win',
'location=yes,directories=yes,menubar=yes,toolbar=yes,status=yes,scrollbars=yes,resizable=yes,width=800,height=600');
win.focus();
}

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Width:  |  Height:  |  Size: 1.2 KiB

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<html><body><pre>
</pre></body></html>

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<html><body><pre>
I/O Style - OD - OpenDrain
- PU - Pullup
- PN - Pulldown
- KPR - Keeper
- S - SchmittTrigger
- DG - DataGate
Reg Use - LATCH - Transparent latch
- DFF - D-flip-flop
- DEFF - D-flip-flop with clock enable
- TFF - T-flip-flop
- TDFF - Dual-edge-triggered T-flip-flop
- DDFF - Dual-edge-triggered flip-flop
- DDEFF - Dual-edge-triggered flip-flop with clock enable
/S (after any above flop/latch type) indicates initial state is Set
</pre></body></html>

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<html><body><pre>
Legend: PU - Pull Up
</pre></body></html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<span id="maplog" class="pgRef"><h3 align="center">Unmapped Logic</h3>
<table width="90%" border="1" cellpadding="0" cellspacing="0"><tr class="pgHeader">
<th width="28%">Signal Name</th>
<th align="center">Total Pterms</th>
<th align="center">Total Inputs</th>
<th align="center">User Assignment</th>
</tr></table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</html>

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function showLogicLeft() { parent.leftnav.showLogicLeft(); }

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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
<meta name="generator-major-version" content="0.1">
<meta name="generator-minor-version" content="1">
<meta name="filetype" content="kadov">
<meta name="filetype-version" content="1">
<meta name="page-count" content="1">
<meta name="layout-height" content="1506">
<meta name="layout-width" content="639">
<meta name="date" content="05 24, 2002 5:49:09 PM">
<meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD (Windows NT 5.0; U) [Netscape]">
<title>Mapped Logic</title>
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ul.whs5 {list-style: disc;}
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p.whs7 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
ul.whs8 {list-style: disc;}
p.whs9 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
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</head>
<body>
<h1>
Unmapped Logic</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Unmapped Logic section provides a table listing all logic that failed to
fit into the specified device. The page will appear in your browser sorted
by Signal Name.&nbsp;</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Mapped Logic table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
signal name&nbsp;</font></span></li>
</ul>
<div class="whs2"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on the signal name will open a new window with the equations for
that signal.&nbsp;</font></span></div>
<ul type="disc" class="whs3">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total number of product terms&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total number of inputs&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
I/O standard where appropriate</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Pin/FB Assignment specified by the user.</font></span></li>
</ul>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<link rel="stylesheet" type="text/css" href="style.css">
<script>
function showTop() { document.location.href = '#'; }
</script>
</head>
<body class="pgBgnd">
<span id="legend" class="pgRef"><h3 align="center">Legends</h3>
<table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="right"><form><input type="button" onclick="javascript:document.location.href='logiclegendV.htm'" value="verbose"></form></td></tr></table>
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
<tr>
<th width="20%">Acronym</th>
<th width="80%">Brief Description</th>
</tr>
<tr>
<td width="20%"> *</td>
<td width="80%"> User Assigned</td>
</tr>
<tr>
<td width="20%"> (b)</td>
<td width="80%"> Buried macrocell</td>
</tr>
<tr>
<td width="20%"> FB#</td>
<td width="80%"> Function Block number </td>
</tr>
<tr>
<td width="20%"> GCK#</td>
<td width="80%"> Global Clock number</td>
</tr>
<tr>
<td width="20%"> GTS#</td>
<td width="80%"> Global Output Enable number</td>
</tr>
<tr>
<td width="20%"> GSR</td>
<td width="80%"> Global Set/Reset</td>
</tr>
<tr>
<td width="20%"> I</td>
<td width="80%"> Input</td>
</tr>
<tr>
<td width="20%"> I/O</td>
<td width="80%"> Input/Output</td>
</tr>
<tr>
<td width="20%"> Latch</td>
<td width="80%"> Transparent latch</td>
</tr>
<tr>
<td width="20%"> LOW</td>
<td width="80%"> Low Power Mode</td>
</tr>
<tr>
<td width="20%"> MC#</td>
<td width="80%"> Macrocell number</td>
</tr>
<tr>
<td width="20%"> O</td>
<td width="80%"> Output</td>
</tr>
<tr>
<td width="20%"> OD</td>
<td width="80%"> Open Drain</td>
</tr>
<tr>
<td width="20%"> PU</td>
<td width="80%"> Pullup</td>
</tr>
<tr>
<td width="20%"> /S</td>
<td width="80%"> After any flop/latch type indicates initial state is Set</td>
</tr>
<tr>
<td width="20%"> STD</td>
<td width="80%"> Standard Power Mode</td>
</tr>
<tr>
<td width="20%"> TCK</td>
<td width="80%"> Test clock</td>
</tr>
<tr>
<td width="20%"> TDI</td>
<td width="80%"> Test data input</td>
</tr>
<tr>
<td width="20%"> TDO</td>
<td width="80%"> Test data output</td>
</tr>
<tr>
<td width="20%"> TFF</td>
<td width="80%"> Toggle Flip-Flop</td>
</tr>
<tr>
<td width="20%"> TMS</td>
<td width="80%"> Test mode select</td>
</tr>
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<link rel="stylesheet" type="text/css" href="style.css">
<script>
function showTop() { document.location.href = '#'; }
</script>
</head>
<body class="pgBgnd">
<span id="legend" class="pgRef"><h3 align="center">Legends</h3>
<table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="right"><form><input type="button" onclick="javascript:document.location.href='logiclegend.htm'" value="brief"></form></td></tr></table>
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
<tr>
<th width="20%">Acronym</th>
<th width="80%">Verbose Description</th>
</tr>
<tr>
<td width="20%"> *</td>
<td width="60%"> User Assigned</td>
</tr>
<tr>
<td width="20%"> (b)</td>
<td width="60%"> Buried macrocell</td>
</tr>
<tr>
<td width="20%"> FB#</td>
<td width="60%"> Function Block number</td>
</tr>
<tr>
<td width="20%"> GCK#</td>
<td width="60%"> Global Clock number</td>
</tr>
<tr>
<td width="20%"> GTS#</td>
<td width="60%"> Global Output Enable number</td>
</tr>
<tr>
<td width="20%"> GSR</td>
<td width="60%"> Global Set/Reset</td>
</tr>
<tr>
<td width="20%"> I</td>
<td width="60%"> Input</td>
</tr>
<tr>
<td width="20%"> I/O</td>
<td width="60%"> Input/Output</td>
</tr>
<tr>
<td width="20%"> Latch</td>
<td width="60%"> Transparent latch</td>
</tr>
<tr>
<td width="20%"> LOW</td>
<td width="60%"> Low Power Mode</td>
</tr>
<tr>
<td width="20%"> MC#</td>
<td width="60%"> Macrocell number</td>
</tr>
<tr>
<td width="20%"> O</td>
<td width="60%"> Output</td>
</tr>
<tr>
<td width="20%"> OD</td>
<td width="60%"> Open Drain</td>
</tr>
<tr>
<td width="20%"> PU</td>
<td width="60%"> Pullup</td>
</tr>
<tr>
<td width="20%"> /S</td>
<td width="60%"> After any flop/latch type indicates initial state is Set</td>
</tr>
<tr>
<td width="20%"> STD</td>
<td width="60%"> Standard Power Mode</td>
</tr>
<tr>
<td width="20%"> TCK</td>
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. Test operations of the device are synchronous to TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. An internal pull-up forces TCK to a high level if left unconnected.</td>
</tr>
<tr>
<td width="20%"> TDI</td>
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial input for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level if left unconnected.</td>
</tr>
<tr>
<td width="20%"> TDO</td>
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial output for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level when it is not driven from an external source.</td>
</tr>
<tr>
<td width="20%"> TFF</td>
<td width="60%"> Toggle Flip-Flop</td>
</tr>
<tr>
<td width="20%"> TMS</td>
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It directs the device through its Test Access Port controller states. An internal pull-up forces TDI to a high level when it is not driven from an external source. TMS also provides the optional test reset signal of IEEE Std 1149 or IEEE Std 1532. </td>
</tr>
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</body>
</html>

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<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
</head>
<body class="pgBgnd" id="XC9572XL">
<span id="mapin" class="pgRef"><h3 align="center">Inputs</h3>
<table width="90%" border="1" cellpadding="0" cellspacing="0">
<tr class="pgHeader">
<th width="60%"><a href="javascript:Sort(10);">Signal Name</a></th>
<th><a href="javascript:Sort(11);">Function Block</a></th>
<th align="center">Macrocell</th>
<th><a href="javascript:Sort(12);">Pin Number</a></th>
<th align="center">Pin Type</th>
<th align="center">Pin Use</th>
</tr>
<tr>
<td width="60%">A&lt;10&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC17</td>
<td align="center">57</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;11&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC11</td>
<td align="center">2</td>
<td align="center">I/O/GTS2</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;12&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC9</td>
<td align="center">64</td>
<td align="center">I/O/GSR</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;13&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC5</td>
<td align="center">44</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;14&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC10</td>
<td align="center">51</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;15&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC12</td>
<td align="center">4</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;16&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC6</td>
<td align="center">34</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;17&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC3</td>
<td align="center">58</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;18&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC6</td>
<td align="center">49</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;19&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC16</td>
<td align="center">42</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;20&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC15</td>
<td align="center">36</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;21&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC14</td>
<td align="center">50</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;22&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC14</td>
<td align="center">35</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;23&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC11</td>
<td align="center">48</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;24&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC12</td>
<td align="center">52</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;25&gt;</td>
<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">MC6</td>
<td align="center">10</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;28&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC3</td>
<td align="center">46</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;29&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC5</td>
<td align="center">61</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;2&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC12</td>
<td align="center">40</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;30&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC6</td>
<td align="center">62</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;31&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC10</td>
<td align="center">1</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;3&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC2</td>
<td align="center">43</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;4&gt;</td>
<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">MC17</td>
<td align="center">20</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;5&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC8</td>
<td align="center">63</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;6&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC4</td>
<td align="center">47</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;7&gt;</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC17</td>
<td align="center">7</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;8&gt;</td>
<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">MC5</td>
<td align="center">9</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">A&lt;9&gt;</td>
<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">MC8</td>
<td align="center">11</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">CLK</td>
<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">MC9</td>
<td align="center">15</td>
<td align="center">I/O/GCK1</td>
<td align="center">GCK</td>
</tr>
<tr>
<td width="60%">CLKdat</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC14</td>
<td align="center">5</td>
<td align="center">I/O/GTS1</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">CMD&lt;0&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC10</td>
<td align="center">39</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">CMD&lt;1&gt;</td>
<td align="center"><a href="javascript:showFB('FB1')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB1</a></td>
<td align="center">MC11</td>
<td align="center">16</td>
<td align="center">I/O/GCK2</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">FC&lt;0&gt;</td>
<td align="center"><a href="javascript:showFB('FB3')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB3</a></td>
<td align="center">MC3</td>
<td align="center">31</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">FC&lt;1&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC8</td>
<td align="center">45</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">FC&lt;2&gt;</td>
<td align="center"><a href="javascript:showFB('FB4')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB4</a></td>
<td align="center">MC15</td>
<td align="center">56</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">STERM</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC4</td>
<td align="center">59</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
<tr>
<td width="60%">nAS</td>
<td align="center"><a href="javascript:showFB('FB2')" onmouseover="window.status='goto Function Block detail'; return true;" onmouseout="window.status=''">FB2</a></td>
<td align="center">MC15</td>
<td align="center">6</td>
<td align="center">I/O</td>
<td align="center">I</td>
</tr>
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right">
<input type="button" onclick="javascript:showLegend('logiclegend.htm')" onmouseover="window.status='show Legend'; return true;" onmouseout="window.status=''" value="legend"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page">
</td>
</tr></table></span></form>
</body>
</html>

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