Andrew Makousky
cd0f4a244e
Documentation updates.
2020-12-31 08:27:53 -06:00
Andrew Makousky
56dd957402
Mac 128k PAL signals mostly working, hooray!
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Also start working on BBU video timing signals, and documentation
improvements.
2020-12-27 09:19:35 -06:00
Andrew Makousky
b957f0cb84
Commit work-in-progress.
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Some improvements made on accuracy of circuit descriptions.
2020-12-22 18:05:27 -06:00
Andrew Makousky
fe87fea02c
Fixes to mac128k PAL simulation issues, more documentation.
2020-11-28 16:36:09 -06:00
Andrew Makousky
c490406c81
BBU: More analysis and insight.
2020-11-25 17:18:41 -06:00
Andrew Makousky
6678c4b2ab
Commit BBU work-in-progress.
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For comparative simulation, I'm also assembling the logic of the earlier
Macintosh 128K, and possibly also Macintosh Plus, in Verilog, and
planning on doing MLB board-level simulations too.
2020-11-25 01:05:48 -06:00
Andrew Makousky
4fa9303844
BBU: Commit work-in-progress, lots of corrections to be made.
2020-11-20 20:19:52 -06:00
Andrew Makousky
62d2e920e7
Commit work-in-progress.
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Much better BBU pinout chart, lots of notes learned from Guide to the
Macintosh family hardware.
2020-11-18 10:21:05 -06:00
Andrew Makousky
12eb917c24
Fix macro use bugs found with new iverilog.
2020-11-15 22:29:54 -06:00
Andrew Makousky
58759b51b8
BBU work-in-progress, fix a few documentation issues.
2020-11-15 20:36:44 -06:00
Andrew Makousky
f9200e43ac
Commit work-in-progress of BBU FPGA in Verilog.
2020-10-25 09:00:40 -05:00