Commit Graph

41 Commits

Author SHA1 Message Date
joevt
0b5a798343 atimach64gx: Fix ATI_CRTC_GEN_CNTL.
Add call to crtc_update.
Maybe consider AK and EN bits (placeholder for now).
2024-03-26 07:31:49 -07:00
joevt
ad6d5e9ec9 atimach64gx: Improve draw_hw_cursor loops.
- Read 8 bytes at a time instead of just 1.
- Remove multiply operations from loop. We just need increments or additions.
- Change compares with int to compares with zero.
2024-03-24 12:25:55 -07:00
joevt
6462ceef24 atimach64gx: Add offset to cursor X position.
CUR_HORZ_OFF becomes non-zero when the cursor needs to be drawn to the left of the left edge of the frame buffer.

CUR_VERT_OFF is handled differently. When CUR_VERT_OFF is non-zero, CUR_OFFSET is changed to point to the first line of the cursor that will be drawn, so CUR_VERT_OFF is the number of lines to remove from the total height of the cursor.
Alternatively, we could handle CUR_VERT_OFF the same way as CUR_HORZ_OFF by leaving the cursor height constant, drawing the cursor starting from the CUR_VERT_OFF line, and adjusting cursor Y position by negative CUR_VERT_OFF.
2024-03-24 12:25:35 -07:00
joevt
7eb9a66837 atimach64gx: Calculate vert_blank.
So it's not always zero.
2024-03-15 10:16:44 -07:00
joevt
c42e1f28d6 atimach64gx: Fix fb_pitch calculation.
Also, move the calculation to crtc_update where we calculate everything else (including bits per pixel which is needed for the fb_pitch calculation.
2024-03-15 09:20:06 -07:00
joevt
fe21108f08 atimach64gx: Implement hardware cursor. 2024-03-15 08:50:34 -07:00
joevt
81f3b95914 atimach64gx: Add write CRTC_INT_CNTL.
Required for interrupt handling.
2024-03-15 07:57:47 -07:00
joevt
2daad2d223 atimach64gx: Add write ATI_CRTC_VLINE_CRNT_VLINE.
Maybe for interrupts.
2024-03-15 07:03:57 -07:00
joevt
09becbfb04 atimach64gx: Add write ATI_CRTC_H_TOTAL_DISP.
For debugging.
2024-03-15 07:03:46 -07:00
joevt
eb1d5d0a6d atimach64gx: Make sure refresh rate is reasonable. 2024-03-11 20:27:00 -07:00
joevt
a190d5cbd9 atimach64gx: Handle all pixel formats. 2024-03-11 20:26:07 -07:00
joevt
ab647ec0eb atimach64gx: Move pixel clock calculation. 2024-03-11 20:25:32 -07:00
joevt
bcd057d45b atimach64gx: Don't recalculate if nothing changed. 2024-03-11 19:25:42 -07:00
joevt
ee2ec7fe54 atimach64gx: Update VGA unsupported mode message. 2024-03-11 08:00:48 -07:00
joevt
1f63342c96 atimach64gx: Handle disabled display. 2024-03-11 08:00:38 -07:00
joevt
babefd09f3 atimach64gx: Rename enable_crtc_internal. 2024-03-10 17:02:38 -07:00
joevt
578e5dc063 atimach64gx: Remove disable_crtc_internal. 2024-03-10 17:02:29 -07:00
joevt
2a290ff9c1 atimach64gx: Remove crtc_enable. 2024-03-10 17:02:18 -07:00
joevt
bfd60155b6 atimach64gx: Fix DAC_CNTL for non-byte access.
If offset is 2, a size of 2 will also overwrite byte 3.
2024-03-10 17:00:47 -07:00
joevt
df09a1e3bf atimach64gx: Register cleanup.
- Use register number instead of offset.
- Have one exit path from the read_reg and write_reg methods.
2024-03-10 16:59:11 -07:00
joevt
3cced5e29b atimach64gx: Use register field names. 2024-03-10 16:58:36 -07:00
joevt
bd5ecf8cbb atimach64gx: Init CRTC_DISPLAY_DIS. 2024-03-10 16:54:48 -07:00
joevt
3e6f7ef541 atimach64gx: Init FIFO_CNT. 2024-03-10 16:54:31 -07:00
joevt
ac5b434641 atimach64gx: Add verbose_pixel_format.
It is used to log the pixel format/depth.
2024-03-09 17:57:27 -07:00
joevt
00f917f52e atimach64gx: Add io_access_allowed.
This method is used by both pci_io_read and pci_io_write to determine if ISA type I/O access is allowed.
The SPARSE_IO_BASE I/O address is defined. This I/O range is not defined by an I/O BAR.
2024-03-09 17:54:05 -07:00
joevt
5d9194d03d atimach64gx: Add config read/write stub. 2024-03-08 08:00:21 -07:00
joevt
5b51cd06c0 atimach64gx: Add register names.
For logging.
2024-03-06 21:20:23 -07:00
joevt
691fcfb657 atimach64gx: PCI BAR changes.
Support changing BAR address.
2024-03-06 18:58:15 -07:00
joevt
49f7da4402 atimach64gx: Remove second column.
It incorrectly implies a relationship between items on the same row.
2024-03-06 18:57:52 -07:00
joevt
fe05b1de12 Fix compiler warnings.
Xcode build has compiler warnings involving loss of precision. Remove them by adding type casts. Check results in some cases for overflow.
2024-02-29 18:49:14 -07:00
joevt
7c3bb41728 videoctrl: Add more convert frame methods.
Also rename 1bpp and 8bpp methods to 1bpp_indexed and 8bpp_indexed.
2023-12-03 20:38:01 +01:00
Maxim Poliakovski
0ca1ebf724 atimach64gx: use new refresh task control. 2023-07-31 03:52:17 +02:00
Maxim Poliakovski
2f562e7761 Convert ATI register offsets to DWORD format. 2023-04-11 01:25:00 +02:00
Maxim Poliakovski
b07b700b36 Refactor ATI Mach64 GX emulation. 2023-04-10 22:19:55 +02:00
Maxim Poliakovski
3e545bdef9 Handling host events in video controllers. 2023-04-02 03:01:13 +02:00
Maxim Poliakovski
888d919ae7 videoctrl: refactor palette access. 2023-04-02 03:01:13 +02:00
Maxim Poliakovski
cc17035e67 pcidevice: improve BAR configuration. 2023-02-04 17:57:46 +01:00
joevt
2a64f547cc Add 64-bit BAR support.
While dingusppc only emulates 32-bit Macs (for now), it is possible for a 32-bit Power Mac to use a PCIe card that has 64-bit BARs.

finish_config_bars is added to scan the cfg values of the BARs and determine their type. The type is stored separately so that it does not need to be determined again.
The type can be I/O (16 or 32 bit) or Mem (20 or 32 or 64 bit). A 64 bit bar is two BARs, the second contains the most significant 32 bits.

set_bar_value uses the stored type instead of trying to determine the type itself. It is always called even when the firmware is doing sizing. For sizing, It does the job of setting the bar value so do_bar_sizing is now just a stub.

Every PCIDevice that has a BAR needs to call finish_config_bars after setting up the cfg values just as they need to setup the cfg values. Since they need to do both, maybe the cfg values should be arguments of finish_config_bars, then finish_config_bars() should be renamed config_bars().
2023-02-02 02:47:34 -08:00
Maxim Poliakovski
32b8c8ed43 pcidevice: fix expansion ROM mapping. 2022-08-20 12:51:08 +02:00
Maxim Poliakovski
c37893847a atimach64gx: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
0df1b2c408 ATI Mach64 GX controller emulation. 2022-05-21 14:51:27 +02:00