kanjitalk755
2533f7ac05
Fix control register number
2023-10-08 19:42:42 +09:00
asvitkine
1f5465ad77
Resolve more compiler warnings in Xcode projects.
2022-04-05 15:15:26 -04:00
asvitkine
732029a512
Fix various compiler warnings with Xcode builds.
2022-04-04 23:44:30 -04:00
kanjitalk755
f07b34a451
BII: additional delay test
2022-03-16 13:40:14 +09:00
kanjitalk755
5862662bc9
fix for Linux and Windows
2021-05-06 12:16:03 +09:00
kanjitalk755
e42b8f6076
rename new uae_cpu
2021-05-06 11:38:37 +09:00
kanjitalk755
1aaeaf05c4
fixed merge error and deleted unnecessary files
2021-05-04 18:33:50 +09:00
uyjulian
bb5caf093a
Merge latest ARAnyM changes
2020-08-23 08:34:42 -05:00
uyjulian
63ddee1be1
Set areg 7 to 0x2000 on m68k reset
2020-01-22 02:35:11 -06:00
uyjulian
9dc485c56a
Sync with latest ARAnyM changes
2020-01-12 09:50:04 -06:00
uyjulian
03fc337242
uae_cpu is based upon ARAnyM sources
2019-09-02 14:40:01 -05:00
uyjulian
48a41966fd
Sync with ARAnyM compiler sources
2019-09-01 16:56:03 -05:00
uyjulian
8353a9ed44
Hope it works
2018-06-06 23:11:08 -05:00
uyjulian
77e20bda2a
Back to BasiliskII uae_cpu but with ARAnyM JIT
2018-04-22 20:39:37 -05:00
uyjulian
1758ef58b5
Port of CPU code from ARAnyM (currently hangs)
2018-04-15 20:23:12 -05:00
uyjulian
1bf6e93461
Downgraded emulated UAE cpu
2018-04-15 17:33:50 -05:00
uyjulian
76d285a6f2
Convert buildsystem to CMake
2018-04-15 15:59:59 -05:00
uyjulian
c4b1b1937e
Remove support for all other platforms other than macOS
2018-04-15 11:17:57 -05:00
James Touton
73f3af6c3b
gencomp builds cleanly (and produces clean-building code) on MSVC.
2015-08-06 01:28:01 -07:00
James Touton
8b4dc6ea81
gencpu builds cleanly on MSVC.
...
Fixed nasty bitfield issue where MSVC enums are signed, so a two-bit bitfield set to 2 is later read as -2.
2015-08-06 01:25:15 -07:00
James Touton
2d2e721437
Use ISO C functions for MSVC.
2015-08-06 01:17:17 -07:00
James Touton
f05cd77eb4
Renamed ASM_SYM_FOR_FUNC to ASM_SYM.
...
Use ASM_SYM in place of __asm__ in a couple places.
2015-08-06 00:54:21 -07:00
Adrien Destugues
371d385c6b
Missing include for memset.
2015-04-28 21:35:11 +02:00
asvitkine
5430e5495f
Add correct GPUv2 attribution to fpu_ieee.cpp and fpu_uae.cpp files, to
...
match the other files under uae_cpu/fpu, which have the same history
according to CVS.
2012-03-30 01:45:08 +00:00
asvitkine
05444a235c
Add GPLv2 notices to files from UAE Amiga Emulator, as retrieved from the
...
COPYING file of uae-0.8.29, retrieved from http://www.amigaemulator.org/
via uae-0.8.29.tar.bz2 (MD5 = 54abbabb5e8580b679c52de019141d61).
2012-03-30 01:25:46 +00:00
asvitkine
31551389f6
change #else #if into #elif in case both are defined
2009-03-03 08:01:48 +00:00
gbeauche
159acc29b0
Cope with assembler updates.
2008-02-16 22:15:00 +00:00
gbeauche
50ed43d6f0
Use D suffix for 64-bit real, even though L is the actual GNU assembler suffix.
2008-02-16 22:14:41 +00:00
gbeauche
f6aecb472d
Add FPU instructions.
2008-02-16 19:01:42 +00:00
gbeauche
736975460b
Add MMX instructions
2008-02-12 14:42:09 +00:00
gbeauche
8083bc1bd3
- Fix tests for 32-bit code generation
...
- Simplify parse_imm() and factor out failure messages to show_instruction()
2008-02-12 09:55:36 +00:00
gbeauche
d03033c19f
Fix decoding of 64-bit values on 32-bit hosts. Improve register decoding speed
...
by more than 2x, aka use a big switch/tree to lookup the register ID from string.
2008-02-12 00:45:24 +00:00
gbeauche
5adc268bcc
Fix and add other SSE conversion instructions.
2008-02-11 19:05:17 +00:00
gbeauche
382b44ffaf
Add more tests in mem,reg cases: scale factor 8, base-only (e.g. mov (%breg),%dreg). Don't test for %rip relative addressing yet, need to improve the parser first.
2008-02-11 17:17:56 +00:00
gbeauche
250366fd94
Use symbolic constants for Jcc and SETcc instructions. Don't emit extraneous REX bits for JMP and CALL instructions.
2008-02-11 16:50:40 +00:00
gbeauche
3ea69bfc5c
- Fix CMPSD, COMISS, COMISD, UCOMISS, UCOMISD, MOVD/MOVQ %xmm,%reg
...
- Rename X86_SSE_CC_NE to X86_SSE_CC_NEQ (match Intel reference manual)
- Rename MOVDLX to MOVDXD (%Xmm register as Destination)
- Rename MOVDQX to MOVQXD (%Xmm register as Destination)
- Rename MOVDXL to MOVDXS (%Xmm register as Source)
- Rename MOVDXQ to MOVQXS (%Xmm register as Source)
2008-02-11 16:13:47 +00:00
gbeauche
f8e11d9aba
Enable/disable some tests at compile time. Show status while verifying hundred thousands variants.
2008-02-11 13:21:15 +00:00
gbeauche
1ad1f0a795
Fix for newer binutils (2.17). Skip extraneous REX prefix (FIXME?) in disassembly,
...
fix decoding for pushq/popq.
2008-02-11 10:14:16 +00:00
gbeauche
c578952735
Add macros for SSSE3 instructions encoding (PSHUFB in particular).
2008-01-01 21:48:41 +00:00
gbeauche
c8cb4879a4
Happy New Year!
2008-01-01 09:40:36 +00:00
gbeauche
a5778cd5cb
Fix xBCD instruction for 68040 emulation: the NV flags shall not be affected.
2007-06-30 08:00:31 +00:00
gbeauche
7f2dfe7f4f
Fix LSL & LSR instructions so that they preserve the X flags when the
...
shift count is 0. Likewise for ASR + another improvement to avoid shifting
by halves (propagated bit is reset to original's when necessary).
2007-06-29 16:53:04 +00:00
gbeauche
9c13d5cda9
Implement CMOV.B and CMOV.W translations. Only the latter has a native
...
x86 equivalent however.
2007-06-29 16:36:03 +00:00
gbeauche
b3f62598b7
More human readable instruction names (from e-uae).
2007-06-29 16:32:05 +00:00
gbeauche
9617ca3033
Fix MOVEC for 68020/68030 emulation (MSP & ISP are supported control regs).
2007-06-15 08:10:48 +00:00
gbeauche
b05833a86b
Fix JIT for 68020/68030 emulation mode.
2007-06-15 08:09:01 +00:00
gbeauche
3f535d30da
Add support for comma-separated elements in "jitblacklist" item.
2007-06-15 07:55:03 +00:00
gbeauche
f20c1ca30b
Remove dead code, B2 doesn't use valid_address()
2007-06-13 15:57:46 +00:00
gbeauche
3c100abdb2
Fix CMOV emulation on x86_64 in case the CPU doesn't support that instruction
...
(which is very unlikely).
2007-01-14 13:23:36 +00:00
gbeauche
8d2f2a335b
The older code generator is now deprecated on x86-32 too.
2007-01-14 13:07:22 +00:00
