Commit Graph

1959 Commits

Author SHA1 Message Date
gbeauche
f6aecb472d Add FPU instructions. 2008-02-16 19:01:42 +00:00
gbeauche
b083b08fd1 Cope with recent run-time assembler changes. 2008-02-12 14:52:25 +00:00
gbeauche
736975460b Add MMX instructions 2008-02-12 14:42:09 +00:00
gbeauche
8083bc1bd3 - Fix tests for 32-bit code generation
- Simplify parse_imm() and factor out failure messages to show_instruction()
2008-02-12 09:55:36 +00:00
gbeauche
d03033c19f Fix decoding of 64-bit values on 32-bit hosts. Improve register decoding speed
by more than 2x, aka use a big switch/tree to lookup the register ID from string.
2008-02-12 00:45:24 +00:00
gbeauche
5adc268bcc Fix and add other SSE conversion instructions. 2008-02-11 19:05:17 +00:00
gbeauche
382b44ffaf Add more tests in mem,reg cases: scale factor 8, base-only (e.g. mov (%breg),%dreg). Don't test for %rip relative addressing yet, need to improve the parser first. 2008-02-11 17:17:56 +00:00
gbeauche
250366fd94 Use symbolic constants for Jcc and SETcc instructions. Don't emit extraneous REX bits for JMP and CALL instructions. 2008-02-11 16:50:40 +00:00
gbeauche
3ea69bfc5c - Fix CMPSD, COMISS, COMISD, UCOMISS, UCOMISD, MOVD/MOVQ %xmm,%reg
- Rename X86_SSE_CC_NE to X86_SSE_CC_NEQ (match Intel reference manual)
- Rename MOVDLX to MOVDXD (%Xmm register as Destination)
- Rename MOVDQX to MOVQXD (%Xmm register as Destination)
- Rename MOVDXL to MOVDXS (%Xmm register as Source)
- Rename MOVDXQ to MOVQXS (%Xmm register as Source)
2008-02-11 16:13:47 +00:00
gbeauche
f8e11d9aba Enable/disable some tests at compile time. Show status while verifying hundred thousands variants. 2008-02-11 13:21:15 +00:00
gbeauche
1ad1f0a795 Fix for newer binutils (2.17). Skip extraneous REX prefix (FIXME?) in disassembly,
fix decoding for pushq/popq.
2008-02-11 10:14:16 +00:00
nigel
5f0e7847d5 Remove a few 'warning: NULL used in arithmetic' 2008-02-04 01:02:58 +00:00
nigel
2b4e8b9cbb Add a dummy Screen_fault_handler so this builds again,
whitespace changes, set a working directory other than /,
allow the file ROM to be opened from the bundle.
2008-02-04 01:00:53 +00:00
gbeauche
3f15f4ed26 64-bit Mach exceptions support. Note that mach_exc_server() et al. must be
explicitly generated from mig. The advantage of that is to provide a "fast"
path for x86_64 on Leopard too (fault address in code[1]).

By "fast", this means +33% faster wrt. explicitly thread_get_state() but
still pretty slow (40 usec/fault). This is on par with the i386 code path though.
2008-01-20 22:24:53 +00:00
gbeauche
68668bb4e2 Add support for Windows/ia64. 2008-01-20 17:09:34 +00:00
gbeauche
62697e13c1 Err, restore a reasonnable value for the emulators. ;-) 2008-01-20 11:52:13 +00:00
gbeauche
a4209f5db0 Arrangements for the SIGSEGV perf tester. 2008-01-20 11:51:08 +00:00
gbeauche
2bdb300da1 HPPA support. 2008-01-20 00:39:51 +00:00
gbeauche
acd35671b8 HP-UX does support 32-bit memory mappings. 2008-01-20 00:38:52 +00:00
gbeauche
88ea04a365 Add support for HP-UX/ia64. It would be best to use libunwind so that to
handle stacked registers access with ease...
2008-01-19 22:27:29 +00:00
gbeauche
3615be1d4d Use fixed-size integer types, especially for 64-bit quantities. HP-UX for IPF
is essentially an ILP32 platform but machine registers are 64-bit wide. Make
IA64_SET_GR() set the NaT bit at the same time as the register value.
2008-01-19 22:25:27 +00:00
gbeauche
b5ac45434a Fix build on 64-bit Vista. 2008-01-17 23:19:01 +00:00
gbeauche
69376f61ca Wrap the Windows write-watch API. 2008-01-16 22:36:35 +00:00
gbeauche
ef39e46cb2 Fix build on MacOS X Leopard.
Leopard kernel faster? This is pure marketing hype. For 32-bit applications,
Mach exception recovery is 60% slower. For 64-bit applications, this is up
to 40% faster though. In any case, MacOS X remains pretty slow wrt. Linux...
2008-01-14 19:29:29 +00:00
gbeauche
df3475ed16 64-bit Windows support 2008-01-12 23:01:40 +00:00
gbeauche
f5e5da6916 LLP64 fixes (64-bit Windows) 2008-01-12 21:43:02 +00:00
gbeauche
b1fa25128a Make it possible to override the Mach fault recovery scheme through an
environment variable: SIGSEGV_MACH_FAULT. It can be set to "direct" to
assume the fault address comes from code[1] argument, or "slow" to use
the slow path through thread_get_status(EXCEPTION_STATE)->faultvaddr.
2008-01-07 22:44:39 +00:00
gbeauche
58ff9aba45 The Linux kernel actually allows to restart execution from the specified slot
in the bundle. This is faster and more accurate as this avoids emulation.

Also clean-up code so that to prepare the use of lib uaccess on hpux/ia64.
XXX: this will need explicit use of uint64_t to define registers because
HP/UX is ILP32 capable and all registers are 64-bit capable so "unsigned long"
won't fit.
2008-01-06 17:22:19 +00:00
gbeauche
8aadf8e455 Further comment the ia64 decoder and (minimal) emulator. 2008-01-06 16:36:00 +00:00
gbeauche
57ae6ed470 Add initial support for instruction skipping on Linux/ia64. It was more
complex than expected but it was fun to play with. Who designed this ISA?
I'd love to see how the decoder is implemented in HW, by all means it is
not "simplified" unless I missed some pattern...
2008-01-06 16:25:03 +00:00
gbeauche
a56e4b9be0 Hack around over-optimized labels-as-values extension from GCC. 2008-01-06 16:19:27 +00:00
gbeauche
e08bb16edf ISO C++ conformance fixes: remove superfluous coma at the end of enum definitions. 2008-01-06 16:10:30 +00:00
nigel
85dfeb1522 Corrent HTML for the accent on Gwenolé's name 2008-01-06 05:14:50 +00:00
gbeauche
a93bec88fd Don't clobber "sip" arg from our sigsegv_info wrapper (renamed to SIP). 2008-01-05 08:35:08 +00:00
nigel
6069d6814c Replace mention to 1_prepare_files.sh script with discrete commands 2008-01-02 23:19:54 +00:00
gbeauche
b5746b4f68 Add SSSE3 optimizations (Intel Core 2 CPUs and newer) for LVX, STVX, VPERM.
This brings an overall +10% performance improvement in AltiVec Fractal Carbon.
2008-01-01 21:51:56 +00:00
gbeauche
c578952735 Add macros for SSSE3 instructions encoding (PSHUFB in particular). 2008-01-01 21:48:41 +00:00
gbeauche
c581996f82 Detect SSE 4.1 and SSE 4.1. 2008-01-01 13:34:47 +00:00
gbeauche
054c37ca0c Happy New Year! 2008-01-01 09:47:39 +00:00
gbeauche
c8cb4879a4 Happy New Year! 2008-01-01 09:40:36 +00:00
gbeauche
26f9b1d38b Fix instruction skipping on MacOS X in the fast path case. 2007-12-31 18:07:01 +00:00
gbeauche
b5ac365858 Add support for 64-bit MacOS X for PowerPC (untested beyond "it compiles"). 2007-12-31 06:59:39 +00:00
gbeauche
9fa1bbd972 According to kernel sources, that is XNU 344.49 (10.2.8), XNU 517.12.7 (10.3.9),
XNU 792.21.3 (10.4.10) and XNU 1228 (10.5.0), exception handler code[1] always
contains the fault address nowadays. So make it the default fast path but keep
provisions to check that at run-time first.

This yields a nearly 4x improvement in SIGSEGV recovery but MacOS X is still
suboptimal wrt. Linux, so VOSF is still not possible with frameskip == 0.

XXX: the ppc kernel had bugs that caused DAR (put into code[1]) to be incorrectly
decoded. This would need a broader test audience or more careful audit of the
sources changes.
2007-12-30 12:11:17 +00:00
gbeauche
19e145ad16 Sync with new SIGSEGV API. 2007-12-30 09:18:40 +00:00
gbeauche
7e7827a886 More overrides for MacOS X. 2007-12-30 09:15:32 +00:00
gbeauche
38501abd6a Fix build with new MacOS X extfs implementation (in C++). 2007-12-30 09:15:00 +00:00
gbeauche
016dfddd79 Sync with the new SIGSEGV API. 2007-12-30 08:47:34 +00:00
gbeauche
902079ec8e Improve API for systems that require explicit calls to functions to retrieve
the memory addresses that triggered a SIGSEGV (e.g. MacOS X).
2007-12-30 08:45:18 +00:00
gbeauche
25c5b9599e Update to slirp sources from QEMU 0.9.0:
- fix UDP (Jason Wessel)
- enable TCP_NODELAY for slirp redirection (Daniel Jacobowitz)
2007-11-03 16:36:35 +00:00
gbeauche
b899d55068 Don't raise SIGPIPE, let errno be set to EPIPE. i.e. this fixes slirp ethernet
mode with no listening port on the remote host.
2007-11-03 11:31:36 +00:00