It's a bit weirdly implemented because the Addressable trait doesn't
have access to System, so it has to set a flag on the Bus which is
then checked during the step function in System to activate the
breakpoint if a watched memory location was written to
I've added skeleton devices for the sound chips, and added the bank
register and banked area of ram mapped to the Z80's bus. Sonic1 will
now run (if the ym2612 device's size is set to 0x1000 instead of 0x04)
Previously it was storing data in the registers, which was an array
of u8, but now it's storing eg. full addresses for the scroll tables
so that they don't need to be fetched from the register values and
converted every rendering. I was thinking this would maybe make
DMA debugging easier, in particular.
There is also a breakpoint error, so that if a read-only memory
location is written to, it will escape to the debugger rather than
exiting the program.
The BusPort is created before the CPU and is passed to it. It can
have an offset, limit the address sizes, and break up bus request
beyond a certain number of bytes into multiple requests
With ADDA, SUBA, and ADDQ/SUBQ when the target is an address register, the condition
flags should not be changed, but the code was changing them, which caused problems.
I've fixed it by making the ADD/SUB executions check for an address target and
will not update flags in that case. This should only occur when the actual instruction
was an ADDA or ADDQ with an address register target
Also fixed a bug where MOVEA needs to behave differently than MOVE,
such that the data is sign extended to a long and the condition flags
are not changed. I also modifed how Addressable returns data because
I need to return owned data from MC68681, so that the stored data can
be updated (ie. the status flag must be modified after a read)
I'm using the monitor.bin binary built from computie to boot the
virtual machine, and it currently runs and loops, but there is no
actual serial device, so it's hard to tell if it's working correctly
