GR8RAM

Author	SHA1	Message	Date
Zane Kaminski	a8eb7940fe	Recompiled just to be sure	2019-10-13 21:18:41 -04:00
Zane Kaminski	d80b9dc727	Switch library location, fixed datasheet fields	2019-10-13 02:04:29 -04:00
Zane Kaminski	3de72a352c	Update GR8RAM-render.png	2019-10-13 02:04:13 -04:00
Zane Kaminski	ebaef9824f	Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev	2019-10-13 01:42:28 -04:00
Zane Kaminski	3b0ca6584a	New schematic revision	2019-10-13 01:40:49 -04:00
Zane Kaminski	94219dd018	Removed old driver disassemblies	2019-10-13 01:40:42 -04:00
Zane Kaminski	4ef5acf2d3	Register reset/initial values set syntax changed	2019-10-13 01:40:25 -04:00
Zane Kaminski	6c4d1c2510	Put gerber files back	2019-10-13 01:39:20 -04:00
Zane Kaminski	7f581f6ba0	24-bit counter, CAS fixed	2019-10-11 20:34:51 -04:00
Zane Kaminski	66fc09b402	Made AddrH high bit variable with mode input	2019-09-07 21:16:23 -04:00
Zane Kaminski	7ea556dd34	Clarified assignments	2019-09-06 17:26:42 -04:00
Zane Kaminski	a16ba8b3bf	Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev	2019-09-05 13:50:40 -04:00
Zane Kaminski	5cc0e2fe26	added some disassembly of RamFactor	2019-09-05 13:50:38 -04:00
Zane Kaminski	f52c6e4781	Pipelined addition	2019-09-04 21:45:56 -04:00
Zane Kaminski	a87ee9c819	Trying again with RamFactor firmware	2019-09-02 20:56:37 -04:00
Zane Kaminski	215f5ca2c6	Clarifications and bugfixes, will try again	2019-09-02 01:42:07 -04:00
Zane Kaminski	6b2378f99a	1MB CPLD design seems to work, fails Apple BIST	2019-09-01 21:18:44 -04:00
Zane Kaminski	3bc9a91b08	Create GR8RAM.bin	2019-09-01 17:45:53 -04:00
Zane Kaminski	396cc3c03c	CPLD firmware compiles	2019-08-31 22:55:04 -04:00
Zane Kaminski	dac5bdb451	Submitted to JLCPCB	2019-07-30 17:11:31 -04:00
Zane Kaminski	62ff891412	Release candidate PCB	2019-07-21 17:53:22 -04:00
Zane Kaminski	9ba21040f4	Rough schematic and board layout	2019-06-25 19:44:54 -04:00
Zane Kaminski	6158eec9bd	Initial commit	2019-06-25 00:46:18 -04:00

23 Commits