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GR8RAM
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Commit Graph

  • 95a0fb17ae Update .gitignore release Zane Kaminski 2022-08-14 05:23:36 -0400
  • b1e5f0f649 idk dev-4205B Zane Kaminski 2022-04-13 05:19:19 -0400
  • 831a56c98c Migrate to KiCAD 6 dev RC Zane Kaminski 2022-02-05 21:08:34 -0500
  • a745d62cba Merge branch 'dev' of https://github.com/garrettsworkshop/GR8RAM into dev Zane Kaminski 2021-09-14 03:57:22 -0400
  • b4bdc6a9da Release candidate? Zane Kaminski 2021-09-14 03:57:20 -0400
  • c82cf4d619 Documentation update Zane Kaminski 2021-09-04 23:58:27 -0400
  • 675750ea54 Documentation update Zane Kaminski 2021-08-06 02:44:46 -0400
  • d269856832 Documentation update Zane Kaminski 2021-07-02 00:42:33 -0400
  • eb98ee74cf Update Initialization Sequence Zane Kaminski 2021-05-08 10:16:39 -0400
  • 9931df0b70 Ignore Quartus stuff Zane Kaminski 2021-04-21 23:09:07 -0400
  • fa08ca903a Register Apple address bus on PHI0 rising edge Zane Kaminski 2021-04-21 20:06:56 -0400
  • 9243c68a12 Change IOROMEN logic back to synchronous reset Zane Kaminski 2021-04-21 09:21:35 -0400
  • 7b4a492e6c Output read data on falling edge to get more hold time Zane Kaminski 2021-04-21 09:19:57 -0400
  • a3517bf054 Revert "Updated slew rate/current strength assignments" Zane Kaminski 2021-04-20 05:50:09 -0400
  • 691c076b4d Updated slew rate/current strength assignments Zane Kaminski 2021-04-20 05:43:37 -0400
  • fc376ce5d8 Latch config DIP switches at boot Zane Kaminski 2021-04-20 04:23:57 -0400
  • 0ca3f17cd5 Works better? Zane Kaminski 2021-04-20 04:10:26 -0400
  • d88ccfb802 Documentation update Zane Kaminski 2021-04-20 01:49:44 -0400
  • c0e7733ba1 Add "ZK, GF" to board Zane Kaminski 2021-04-20 01:47:09 -0400
  • 72d2609e63 Fabbed Zane Kaminski 2021-04-19 05:43:21 -0400
  • dc38e1f668 Sorta works Zane Kaminski 2021-04-19 02:57:51 -0400
  • 6bcd3a0740 Added CKE back Zane Kaminski 2021-04-18 20:24:58 -0400
  • b899bfc4ad Sorta works Zane Kaminski 2021-04-18 06:01:08 -0400
  • 6eb7960003 Remove CKE Zane Kaminski 2021-04-18 03:59:56 -0400
  • bc9fb27129 Make apple boot Zane Kaminski 2021-04-18 03:54:45 -0400
  • 6e2e916561 Create FrontIsom.png Zane Kaminski 2021-04-12 04:27:58 -0400
  • b46fe84724 Update RAM Map Zane Kaminski 2021-04-12 03:46:33 -0400
  • 99d209cb18 Finished SRAM design schematic dev-SRAM Zane Kaminski 2021-04-12 02:37:44 -0400
  • c4844b9646 idk Zane Kaminski 2021-04-11 15:39:19 -0400
  • b0b8b0dc6c Works? Zane Kaminski 2021-04-03 03:44:42 -0400
  • 9eec9bf7b9 ugh Zane Kaminski 2021-03-19 16:38:48 -0400
  • 116abb1a6f before remove UFM Zane Kaminski 2021-03-19 14:23:33 -0400
  • 52b3716342 hmm Zane Kaminski 2021-03-19 06:59:22 -0400
  • 9ac2ba97ae better Zane Kaminski 2021-03-19 06:45:31 -0400
  • 3816ecd0a1 ugh Zane Kaminski 2021-03-19 02:56:20 -0400
  • a444cc31aa idk Zane Kaminski 2021-03-15 13:40:59 -0400
  • e5da11855d Remove old CPLD stuff Zane Kaminski 2021-03-15 13:40:41 -0400
  • db594211fa Fabbed Zane Kaminski 2021-02-17 19:29:24 -0500
  • 9f0867fe56 reset button detect Zane Kaminski 2020-10-25 05:22:14 -0400
  • 7d6776e480 Board done? Zane Kaminski 2020-10-07 23:32:57 -0400
  • 3091ea4d32 Sketch of verilog Zane Kaminski 2020-10-07 23:32:29 -0400
  • 4beed0e635 Added label images Zane Kaminski 2020-05-30 04:50:23 -0400
  • 817cbd25fd Update .gitignore Zane Kaminski 2020-05-15 22:51:14 -0400
  • 9e108f656c Update .gitignore Zane Kaminski 2020-05-15 18:49:20 -0400
  • 66c0973cdf Many changes Zane Kaminski 2020-03-10 18:54:44 -0400
  • 7e41906335 Put FullIOEN back Zane Kaminski 2020-02-26 03:37:20 -0500
  • 209afbc5c5 Added transfer counters Zane Kaminski 2020-02-26 03:34:33 -0500
  • 6a33e1adb0 Added separate configuration section Zane Kaminski 2020-02-26 03:31:20 -0500
  • 156aa66473 Cleanup Zane Kaminski 2020-02-26 03:15:36 -0500
  • 593f5cb010 Removed inhibit output Zane Kaminski 2020-02-26 03:14:33 -0500
  • 76bceb089d Moved REGEN and IOROMEN (no functional change) Zane Kaminski 2020-02-26 03:14:13 -0500
  • 4575818d63 Removed SetWR and FullIOEN Zane Kaminski 2020-02-26 02:13:35 -0500
  • d9e9038a4d Comments, no actual changes to CPLD verilog Zane Kaminski 2020-02-16 22:03:57 -0500
  • b29662bcab Fixed previous problem, working again Zane Kaminski 2020-02-16 00:11:12 -0500
  • 79789a9e8b Doesn't work but committing for posterity Zane Kaminski 2020-02-15 23:15:54 -0500
  • 911557e38b Removed AVR-JTAG-10 connector footprint Zane Kaminski 2020-02-09 03:40:57 -0500
  • 90875fd58f Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev Zane Kaminski 2020-01-26 15:15:07 -0500
  • c02ffbbe6a Separated CSDBEN Zane Kaminski 2020-01-26 15:13:37 -0500
  • 2bc381ebc5 Removed state counter reset Zane Kaminski 2019-12-21 01:46:05 -0500
  • 6e135d4305 Fixed bugs in new PLD stuff Zane Kaminski 2019-10-20 22:41:24 -0400
  • f471e04244 New PLD revision Zane Kaminski 2019-10-18 15:07:38 -0400
  • a8eb7940fe Recompiled just to be sure Zane Kaminski 2019-10-13 21:18:41 -0400
  • d80b9dc727 Switch library location, fixed datasheet fields Zane Kaminski 2019-10-13 02:04:29 -0400
  • 3de72a352c Update GR8RAM-render.png Zane Kaminski 2019-10-13 02:04:13 -0400
  • ebaef9824f Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev Zane Kaminski 2019-10-13 01:42:28 -0400
  • 3b0ca6584a New schematic revision Zane Kaminski 2019-10-13 01:40:49 -0400
  • 94219dd018 Removed old driver disassemblies Zane Kaminski 2019-10-13 01:40:42 -0400
  • 4ef5acf2d3 Register reset/initial values set syntax changed Zane Kaminski 2019-10-13 01:40:25 -0400
  • 6c4d1c2510 Put gerber files back Zane Kaminski 2019-10-13 01:39:20 -0400
  • 7f581f6ba0 24-bit counter, CAS fixed Zane Kaminski 2019-10-11 20:34:51 -0400
  • 66fc09b402 Made AddrH high bit variable with mode input Zane Kaminski 2019-09-07 21:16:23 -0400
  • 7ea556dd34 Clarified assignments Zane Kaminski 2019-09-06 17:26:42 -0400
  • a16ba8b3bf Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev Zane Kaminski 2019-09-05 13:50:40 -0400
  • 5cc0e2fe26 added some disassembly of RamFactor Zane Kaminski 2019-09-05 13:50:38 -0400
  • f52c6e4781 Pipelined addition Zane Kaminski 2019-09-04 21:45:56 -0400
  • a87ee9c819 Trying again with RamFactor firmware Zane Kaminski 2019-09-02 20:56:37 -0400
  • 215f5ca2c6 Clarifications and bugfixes, will try again Zane Kaminski 2019-09-02 01:42:07 -0400
  • 6b2378f99a 1MB CPLD design seems to work, fails Apple BIST Zane Kaminski 2019-09-01 21:18:44 -0400
  • 3bc9a91b08 Create GR8RAM.bin Zane Kaminski 2019-09-01 17:45:53 -0400
  • 396cc3c03c CPLD firmware compiles Zane Kaminski 2019-08-31 22:55:04 -0400
  • dac5bdb451 Submitted to JLCPCB Zane Kaminski 2019-07-30 17:11:31 -0400
  • 62ff891412 Release candidate PCB Zane Kaminski 2019-07-21 17:53:22 -0400
  • 9ba21040f4 Rough schematic and board layout Zane Kaminski 2019-06-25 19:44:54 -0400
  • 6158eec9bd Initial commit Zane Kaminski 2019-06-25 00:46:18 -0400