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This project is an open-source In-Circuit Emulator for the 6502, 65C02, Z80, 6809 and 6809E 8-bit processors. See:
42 Commits 4 Branches 8 Tags 7.3 MiB
VHDL 88.8%
C 9.3%
Makefile 0.9%
Verilog 0.7%
Shell 0.2%
e4e0f864df
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David Banks e4e0f864df Switched to Timing-Driven Packing, fixed a bug with instr wait states that meant single stepping executed RST 38 because FF was read off databus; increased comparators to 8; incremented version to 0.43. Works with 100pF capgit add -u! 
Change-Id: Ie6c8c8fc610599516eb1baf957d001079713e462
2015-06-27 18:40:12 +01:00
firmware Switched to Timing-Driven Packing, fixed a bug with instr wait states that meant single stepping executed RST 38 because FF was read off databus; increased comparators to 8; incremented version to 0.43. Works with 100pF capgit add -u! 2015-06-27 18:40:12 +01:00
ipcore_dir Implemented cycle counter and data bus monitoring during read/write watches/breakpoints, incremented version to 0.32 2015-06-20 12:30:18 +01:00
src Switched to Timing-Driven Packing, fixed a bug with instr wait states that meant single stepping executed RST 38 because FF was read off databus; increased comparators to 8; incremented version to 0.43. Works with 100pF capgit add -u! 2015-06-27 18:40:12 +01:00
.gitignore Initial checking of Z80 work; slight refactor of BusMonCore; version updated to 0.41 2015-06-27 11:07:58 +01:00
AtomBusMon.xise Updated AtomBusMon pinout to match 6502, would allow piggy-backing in principle 2015-06-20 22:36:10 +01:00
AtomCpuMon.bit Added option to do repeat a read/write command n times (where n can be large), incremented version to 0.37 2015-06-22 18:11:11 +01:00
AtomCpuMon.xise Updated to use 65C02 core 2015-06-19 12:08:38 +01:00
Blank.bit Added bitfiles for Roland to test 2015-06-18 07:52:10 +01:00
Blank.xise Added Blank design and T65-based 6502 design 2015-06-14 17:57:26 +01:00
ise_build.tcl Implemented cycle counter and data bus monitoring during read/write watches/breakpoints, incremented version to 0.32 2015-06-20 12:30:18 +01:00
ise_clean.tcl Implemented cycle counter and data bus monitoring during read/write watches/breakpoints, incremented version to 0.32 2015-06-20 12:30:18 +01:00
LICENSE.txt
README.md Updated README 2015-06-11 21:46:33 +01:00
Z80CpuMon.xise Switched to Timing-Driven Packing, fixed a bug with instr wait states that meant single stepping executed RST 38 because FF was read off databus; increased comparators to 8; incremented version to 0.43. Works with 100pF capgit add -u! 2015-06-27 18:40:12 +01:00

README.md

AtomBusMon

For further details see the stardot.org.uk thread: http://stardot.org.uk/forums/viewtopic.php?f=44&t=9655