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8,386 Commits 7 Branches 121 Tags 500 MiB
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2277 Commits

Author SHA1 Message Date
Thomas Harte
edb75e69cb Implement bitplane modulos. 2021-10-29 11:29:22 -07:00
Thomas Harte
5ebc59dd1f Introduce additional test cases. 2021-10-26 20:58:38 -07:00
Thomas Harte
4d7ce3792f Use additional test cases. 2021-10-25 21:48:43 -07:00
Thomas Harte
dc8701a929 Introduce some additional Blitter test cases. 2021-10-25 21:40:20 -07:00
Thomas Harte
15ed4a0d09 Introduce failing test case for sector decoding. 2021-10-16 10:48:32 -07:00
Thomas Harte
aa6b0f07b7 Correct filename. 2021-10-16 05:37:46 -07:00
Thomas Harte
9be23ecc34 Add end-of-Blit interrupt. 
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
 2021-10-13 15:09:19 -07:00
Thomas Harte
955cb6411c Factor out bit spreading. 
(And do a better job of it)
 2021-10-12 14:49:01 -07:00
Thomas Harte
ec3d5c0b32 Increase maximum number of activity LEDs to eight. 2021-10-10 18:37:33 -07:00
Thomas Harte
6b0dd19442 Name file appropriately: the logo comes from Kickstart. 2021-10-09 08:02:15 -07:00
Thomas Harte
5ccb512883 Moves the CIAs into the Chipset class. 
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
 2021-10-04 06:44:54 -07:00
Thomas Harte
da286d5ae8 Switch spaces to tabs. 2021-10-04 05:27:25 -07:00
Thomas Harte
ad90c6b6ce Now that this is getting close, don't stop at the first error. 2021-09-29 22:19:34 -04:00
Thomas Harte
0c998d60cb Correct test logic for line draws that repeatedly write to the same address. 2021-09-28 21:45:55 -04:00
Thomas Harte
1dfc36f311 Flip loop, add modulo mappings. 2021-09-26 18:15:32 -04:00
Thomas Harte
1c03ff1d37 Fix bltdptl to bltbptl misstatement; remove pre-DMA writes. 2021-09-26 18:14:50 -04:00
Thomas Harte
19dd2f92bd Implements test case. Failing at present, naturally. 2021-09-25 21:52:41 -04:00
Thomas Harte
acfaa016a0 Adds a capture of traffic leading up to the Workbench boot logo. 
Around which to construct a test case.
 2021-09-25 18:10:07 -04:00
Thomas Harte
fa800bb809 Introduces code for minterm application. 2021-09-20 19:13:23 -04:00
Thomas Harte
3d85f820f4 Add missing file to kiosk project. 2021-09-16 21:29:11 -04:00
Thomas Harte
245b7baa61 Moves the Copper into its own file. 2021-09-16 21:17:23 -04:00
Thomas Harte
add11db369 Factors out DMADevice, which is now a parent of Blitter. 2021-09-14 20:51:32 -04:00
Thomas Harte
fd70f7ad43 Attempts to make pixel content observeable. 2021-09-08 20:57:26 -04:00
Thomas Harte
635c1eacd5 Merge branch 'master' into Amiga 2021-08-11 17:31:17 -04:00
Thomas Harte
6dbce96781 Switch to non-breaking space, to avoid orphan word. 2021-08-11 17:28:37 -04:00
Thomas Harte
9ec42f0f8f Cleans up bottom constraints. 2021-08-11 17:12:01 -04:00
Thomas Harte
10a5e7313f Makes a buggy first attempt at bitplane data collection. 2021-08-10 21:28:48 -04:00
Thomas Harte
27726fd2d1 Merge branch 'master' into Amiga 2021-08-09 17:24:06 -04:00
Thomas Harte
77befb7f8e Correct Atari ST text placement; add missing Enteprise constraint. 2021-08-09 17:14:37 -04:00
Thomas Harte
86c6248b48 Merge branch 'master' into Amiga 2021-08-09 17:09:04 -04:00
Thomas Harte
7d8894415c Increase precision of phase interpolation. 2021-08-09 15:48:27 -04:00
Thomas Harte
e402e690b0 Assume and test that divide-by-zero posts the PC of the offending instruction. 2021-08-07 17:51:00 -04:00
Thomas Harte
6a15bb15ca Adds a simpler way of deferring single values. 2021-08-07 17:29:21 -04:00
Thomas Harte
8be053fd35 Fixes top constraint for Atari ST. 2021-08-06 22:57:45 -04:00
Thomas Harte
99fee22a9f Adjusts defaults. 2021-08-06 22:13:21 -04:00
Thomas Harte
084d002353 Adds the Amiga to macOS File -> New... 2021-08-06 21:58:31 -04:00
Thomas Harte
b4ec9d70da Adds the CNT input. 2021-08-03 22:19:41 -04:00
Thomas Harte
738999a8b7 Further expands list of applied tests. 2021-08-03 22:08:50 -04:00
Thomas Harte
34c1cc5693 Adds entry points for all remaining tests. 
Failing now: the TB123s, which are TOD related, both CIA2 tests, and CIA1TAB (which I think needs me to implement Port B output toggling).
 2021-08-03 17:19:35 -04:00
Thomas Harte
f0ef45f0ca Introduces two further tests. 2021-08-03 16:58:51 -04:00
Thomas Harte
38848ca2db Rationalises reload logic and cuts storage. 
Failure point is now chaining, I think.
 2021-08-02 20:14:01 -04:00
Thomas Harte
26aaddaa33 Adds further documentation. 2021-07-30 21:34:22 -04:00
Thomas Harte
f576baf214 I'm not yet sure this is the best approach, but starts trying to make use of Lorenz's 6526 tests. 2021-07-30 21:21:16 -04:00
Thomas Harte
5c1ac05170 Add documentation. 2021-07-30 21:20:45 -04:00
Thomas Harte
3d9f86c584 Begins keyboard sketches and notes. 2021-07-30 18:23:15 -04:00
Thomas Harte
2bc9af09e1 Factors out the chipset. 2021-07-22 21:16:23 -04:00
Thomas Harte
e85db40b0f Sketches out a blitter class. 2021-07-22 18:43:07 -04:00
Thomas Harte
67d53601d5 Latch and return data direction. 
Albeit with no port-handling effect yet.
 2021-07-18 12:23:47 -04:00
Thomas Harte
377cc7bdcd Start to introduce a 6526/8250. 2021-07-18 11:36:13 -04:00
Thomas Harte
6ade36bf09 Adds an empty shell of a machine. 2021-07-16 20:30:48 -04:00