2494 Commits

Author	SHA1	Message	Date
Thomas Harte	192513656a	After much guesswork, fix SBCD and thereby pass flamewing tests.	2022-05-12 11:39:01 -04:00
Thomas Harte	f3c1b1f052	Name flags, remove closing underscores on exposed data fields.	2022-05-12 08:19:41 -04:00
Thomas Harte	56ce1ec6e8	No need to subclass.	2022-05-11 21:25:38 -04:00
Thomas Harte	de168956e4	Fix tested operand order.	2022-05-11 16:44:39 -04:00
Thomas Harte	5b80844d81	Add a sanity test count, temporarily.	2022-05-11 16:34:28 -04:00
Thomas Harte	17add4b585	Introduce and overwhelmingly fail the flamewing BCD tests.	2022-05-11 15:19:39 -04:00
Thomas Harte	943c924382	Add missing: MOVE to/from USP, RESET.	2022-05-11 07:52:23 -04:00
Thomas Harte	ab8e1fdcbf	Take a swing at access faults and address errors.	2022-05-10 16:20:30 -04:00
Thomas Harte	f2a6a12f79	Remove further vestiges of timing.	2022-05-09 20:58:51 -04:00
Thomas Harte	0af8660181	Remove add_pc and decline_branch in favour of operation-specific signals.	2022-05-09 16:19:25 -04:00
Thomas Harte	330ec1b848	TODO is done.	2022-05-09 11:52:33 -04:00
Thomas Harte	8e5650fde9	Clean up Instruction.hpp.	2022-05-09 10:13:42 -04:00
Thomas Harte	539932dc56	Provide function codes. TODO: optionally.	2022-05-09 09:18:02 -04:00
Thomas Harte	5ab5e1270e	Fix test for new MOVEM semantics.	2022-05-09 09:17:48 -04:00
Thomas Harte	98cb9cc1eb	Fix CHK operand size.	2022-05-07 21:16:44 -04:00
Thomas Harte	bf8c97abbb	Permit TRAP, TRAPV and CHK to push the next PC rather than the current.	2022-05-07 20:32:39 -04:00
Thomas Harte	2b3900fd14	Fix LINK A7.	2022-05-07 08:15:26 -04:00
Thomas Harte	1defeca1ad	Implement RTS, RTR, RTE.	2022-05-06 12:30:49 -04:00
Thomas Harte	ac6a9ab631	Fix TAS Dn.	2022-05-06 12:23:04 -04:00
Thomas Harte	8176bb6f79	Expose issues with TST and TAS.	2022-05-06 12:18:56 -04:00
Thomas Harte	9c266d4316	Proceed to unimplemented TST.	2022-05-06 11:33:57 -04:00
Thomas Harte	d478a1b448	Proceed to next failure: PEA.	2022-05-06 10:04:20 -04:00
Thomas Harte	607ddd2f78	Preserve MOVEM order in Operation.	2022-05-06 09:45:06 -04:00
Thomas Harte	06fe320cc0	Correct source counting, but this leaves the operands still being the wrong way around.	2022-05-05 21:06:53 -04:00
Thomas Harte	d7d0a5c15e	Implement MOVEM to memory.	2022-05-05 18:51:29 -04:00
Thomas Harte	47f4bbeec6	Switch to a contiguous block of 16 registers.	2022-05-05 15:31:59 -04:00
Thomas Harte	70cdc2ca9f	Fix MOVEP to register. ... Advance to lack of MOVEM.	2022-05-05 12:37:47 -04:00
Thomas Harte	f63a872387	BTST does not write back.	2022-05-05 12:32:15 -04:00
Thomas Harte	46686b4b9c	Start testing move.	2022-05-04 20:38:56 -04:00
Thomas Harte	15c90e546f	Fix rotates and shifts to memory.	2022-05-04 19:44:59 -04:00
Thomas Harte	5aabe01b6d	Mostly fix LINK and UNLK.	2022-05-04 08:41:55 -04:00
Thomas Harte	d3b55a74a5	Fix LEA, proceed to non-functional LINK and UNLK.	2022-05-03 20:45:36 -04:00
Thomas Harte	de58ec71fd	Fix EXT, SWAP.	2022-05-03 20:17:36 -04:00
Thomas Harte	052ba80fd7	Add enough wiring to complete but fail EXT and JMP/JSR.	2022-05-03 15:49:55 -04:00
Thomas Harte	39f0ec7536	Get far enough through CHK to realise that MOVEM probably needs to be divided by direction.	2022-05-03 15:40:04 -04:00
Thomas Harte	af973138df	Correct decoding of Bcc.b, satisfying Bcc and BSR tests.	2022-05-03 15:32:54 -04:00
Thomas Harte	5a87506f3d	Fix Bcc, making decision that add_pc is relative to start of instruction.	2022-05-03 15:21:42 -04:00
Thomas Harte	90f0005cf2	Proceed to failing Bcc and flagging up my lack of an implementation for BSR.	2022-05-03 14:45:49 -04:00
Thomas Harte	d8b3748d24	Fix Scc size, DBcc behaviour.	2022-05-03 14:40:51 -04:00
Thomas Harte	b6ffff5bbd	Distinguish [ADD/SUB]QA from [ADD/SUB]Q.	2022-05-03 14:17:26 -04:00
Thomas Harte	5ebae85a16	Start recording successes.	2022-05-03 11:28:50 -04:00
Thomas Harte	b3cf13775b	Consume operand_flags into Instruction.hpp.	2022-05-03 11:09:57 -04:00
Thomas Harte	2f2d6bc08b	Correct CMPw.	2022-05-03 09:05:34 -04:00
Thomas Harte	fc9a35dd04	Test add/sub, add an exception for invalid Sequences.	2022-05-02 20:09:38 -04:00
Thomas Harte	3827ecd6d3	Proceed to complete test running.	2022-05-02 12:57:45 -04:00
Thomas Harte	14532867a4	Sneaks towards testing EXT.	2022-05-02 08:00:56 -04:00
Thomas Harte	56fe00c5fb	Correct errors preparatory to Executor's lack of flow controller actions.	2022-05-01 20:40:57 -04:00
Thomas Harte	6b073c6067	Attempt to round out addressing modes, shift to a header, as per templating on BusHandler.	2022-05-01 15:10:54 -04:00
Thomas Harte	9359f6477b	Start drafting an Executor.	2022-04-29 17:12:06 -04:00
Thomas Harte	85242ba896	Add to Xcode project, template on Model as per CLR being odd. Fill in some obvious answers.	2022-04-29 11:10:14 -04:00