Thomas Harte
|
e2575d6de4
|
Routed tape motor selections through to the C++ side of the world, and ensured that manual tape playback works properly.
|
2017-07-08 19:21:12 -04:00 |
|
Thomas Harte
|
46fff8e8a2
|
Ensured bit 8 is uniquely from the latched video byte, not an OR of that with the refresh address.
|
2017-07-06 22:48:48 -04:00 |
|
Thomas Harte
|
a3684545b5
|
Added a block on the tape motor for a short period after each time the ROM routine is intercepted for a substituted byte read. To reduce the collision between fast tape and real tape loading.
|
2017-07-06 22:33:54 -04:00 |
|
Thomas Harte
|
b842c5b8bb
|
Merge branch 'master' into ZX81FastLoading
|
2017-07-06 22:03:24 -04:00 |
|
Thomas Harte
|
0c037627fc
|
Typer fixes: the recipient no longer releases the caller, and a duplicate call to strlen and piece of arithmetic is corrected.
|
2017-07-06 21:38:56 -04:00 |
|
Thomas Harte
|
a72a2e0a1a
|
Ensured tape doesn't proceed of its own volition when in fast-loading mode.
|
2017-06-23 20:21:37 -04:00 |
|
Thomas Harte
|
50375fb373
|
Ensured tape position is unaffected if the attempt at loading quickly fails.
|
2017-06-23 20:18:19 -04:00 |
|
Thomas Harte
|
cb105fdeb4
|
Took a first stab at high-res support.
|
2017-06-22 22:48:17 -04:00 |
|
Thomas Harte
|
acfd4dde36
|
Reduced port writes which can adjust programmatic sync, and prevented anything while NMI generation is active. Moved line counter increment from triggered by interrupt acknowledge to triggered by horizontal sync. In both cases, cribbing from my own earlier work. Initial results suggest that sync issues are resolved in third-party software.
|
2017-06-22 22:44:06 -04:00 |
|
Thomas Harte
|
644ef13acd
|
Connected up the fast-tape GUI option for the ZX80 and '81.
|
2017-06-22 20:20:31 -04:00 |
|
Thomas Harte
|
b7c978e078
|
Added getters for most of the input lines, and attempted to round out the ZX81's wait logic.
|
2017-06-22 20:11:19 -04:00 |
|
Thomas Harte
|
52d9ddf9e5
|
Gave the binary tape player a more logical assignment of wave level to output level. Which miraculously appears to have been the issue with the ZX80/81 tape loading — the inconsistency of silences seems to have been the issue.
|
2017-06-21 22:13:24 -04:00 |
|
Thomas Harte
|
a6810fc3ef
|
Removed some minor duplicity and ensured that hsync/NMI ends on the nominated cycle, not one afterwards.
|
2017-06-21 21:44:42 -04:00 |
|
Thomas Harte
|
15f6c51062
|
Added the most trivial implementation of the ZX81 wait line.
|
2017-06-21 21:28:14 -04:00 |
|
Thomas Harte
|
e1355d4b62
|
Restored proper video output.
|
2017-06-21 21:18:09 -04:00 |
|
Thomas Harte
|
4bf13610ce
|
Reinstated interrupts by moving the refresh test back into the refresh cycle.
|
2017-06-21 21:03:39 -04:00 |
|
Thomas Harte
|
0e0ce379b4
|
Renamed MachineCycle to PartialMachineCycle given that it mostly no longer intends to describe an entire machine cycle.
|
2017-06-21 20:38:08 -04:00 |
|
Thomas Harte
|
36e8a11505
|
Sought to simplify the way partial machine cycles are communicated, for ease of machine implementation. Also implemented the wait line.
|
2017-06-21 20:32:08 -04:00 |
|
Thomas Harte
|
e1a2580b2a
|
Renamed BusOperation to MachineCycle::Operation.
|
2017-06-17 21:53:45 -04:00 |
|
Thomas Harte
|
08a542a324
|
Reenabled the fast-loading hack.
|
2017-06-15 18:30:12 -04:00 |
|
Thomas Harte
|
9b3d05e05f
|
Simplified decoding logic.
|
2017-06-14 22:24:44 -04:00 |
|
Thomas Harte
|
d8e3103a2b
|
Fixes: switched ZX80 and ZX81 timing to the correct way around, ensured that my wait takes effect if HALT **isn't** set, and made sure to recover from it.
|
2017-06-13 21:48:17 -04:00 |
|
Thomas Harte
|
76a64d13a0
|
Made a first attempt at ZX81 emulation.
|
2017-06-13 21:25:55 -04:00 |
|
Thomas Harte
|
1e975859c2
|
Started splitting ZX80 and ZX81 paths. Also the '80 fires its horizontal sync a little earlier than the '81, so pulled that back a little.
|
2017-06-13 20:09:09 -04:00 |
|
Thomas Harte
|
4c5261bfa0
|
Made first attempt to use the horizontal counter for something; here for sync timing only, even though I've gone exclusively with '81-style timing for now.
|
2017-06-12 22:28:30 -04:00 |
|
Thomas Harte
|
8b09b4180b
|
This now at least remembers whether it is meant to be a ZX81 and has storage for a horizontal counter.
|
2017-06-12 21:33:16 -04:00 |
|
Thomas Harte
|
b9dbb6bcf8
|
Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.
|
2017-06-12 18:55:04 -04:00 |
|
Thomas Harte
|
302c2e94de
|
Corrected lingering hard-coded mask. So titles for memory configurations above 1kb now load.
|
2017-06-11 21:27:46 -04:00 |
|
Thomas Harte
|
06fe07932a
|
While tidying up, killed an unused instance variable.
|
2017-06-11 21:21:26 -04:00 |
|
Thomas Harte
|
6913c7a018
|
This also can just use rom_mask_ .
|
2017-06-11 19:29:20 -04:00 |
|
Thomas Harte
|
6b602c74b7
|
Made an attempt to support memory maps other than the unexpanded default of 1kb.
|
2017-06-11 19:29:02 -04:00 |
|
Thomas Harte
|
e40d553045
|
Bumped the tape parser up into the machine to ensure a maintained state. Temporarily disabled normally-timed tape playback.
|
2017-06-11 18:31:43 -04:00 |
|
Thomas Harte
|
e5b30cdfbb
|
Attempted to ensure appropriate resumption of processing after quick-reading a tape byte.
|
2017-06-11 17:28:47 -04:00 |
|
Thomas Harte
|
ba5f34f827
|
Narrowed view to the centre 80% of a frame.
|
2017-06-11 17:24:32 -04:00 |
|
Thomas Harte
|
84d2feb2e6
|
Cleaned up and implemented fast-tape hack. I've decided it'd be better to test some other software, potentially to give multiple issues to think about, rather than sitting around with just the one.
|
2017-06-11 16:42:49 -04:00 |
|
Thomas Harte
|
d910a4fd38
|
Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207.
Also: lots of printfs have grown temporarily as I try to figure out what I'm doing so wrong as to break loading.
|
2017-06-11 13:32:20 -04:00 |
|
Thomas Harte
|
5626d35bc4
|
Tried flipping the bit meaning; decided at least to leave it in full-byte form.
|
2017-06-06 18:38:05 -04:00 |
|
Thomas Harte
|
63e0802f4e
|
Ensured tape input appears on the returned value.
|
2017-06-06 18:16:27 -04:00 |
|
Thomas Harte
|
e3ee9604a5
|
Added comments.
|
2017-06-06 18:01:33 -04:00 |
|
Thomas Harte
|
8c66e1d99d
|
Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data.
|
2017-06-06 17:53:23 -04:00 |
|
Thomas Harte
|
ca9e8aecd6
|
Made a seemingly unsuccessful attempt to add tape input.
|
2017-06-06 10:13:32 -04:00 |
|
Thomas Harte
|
cc4cb45e9d
|
Implemented keyboard input and ensured that the signal generated is marked as composite, putting the colour-suppression ball into the CRT's court.
|
2017-06-06 09:25:18 -04:00 |
|
Thomas Harte
|
ebbf6e6133
|
Surprisingly, I think this may actually be the correct output: stopped throwing away the I part of the refresh register and flipped black and white.
|
2017-06-06 09:03:09 -04:00 |
|
Thomas Harte
|
cba07dec7e
|
Doubled up to display all eight pixels. To confirm that they are the wrong pixels.
|
2017-06-06 08:59:00 -04:00 |
|
Thomas Harte
|
6f7037b2b1
|
Made an initial stab at outputting half the correct pixels.
|
2017-06-06 08:55:07 -04:00 |
|
Thomas Harte
|
ef4b2f963d
|
Probably more-or-less corrected. But this is all a bit too interdependent.
|
2017-06-05 23:52:56 -04:00 |
|
Thomas Harte
|
97f3ff03b6
|
Restored white background and attempted to correct output timing deficiencies. Incomplete success.
|
2017-06-05 23:50:04 -04:00 |
|
Thomas Harte
|
2fbc7a2869
|
Made a very basic attempt at getting something that at least demarcates proper graphics output.
|
2017-06-05 23:32:49 -04:00 |
|
Thomas Harte
|
4983718df7
|
Got to outputting something to the CRT. Should be just proper syncs and a paper background. It's not synchronising properly, so something is amiss in my timing.
|
2017-06-05 10:47:42 -04:00 |
|
Thomas Harte
|
23ca00fd9a
|
Added memory fuzzing as a way to verify state being written by the Z80. Eventually discovered the HALT problem as fixed in the last commit, so have stripped away the caveman stuff again.
|
2017-06-05 10:36:07 -04:00 |
|
Thomas Harte
|
893f61b490
|
Attempted specifically to reproduce the 1kb ZX80 memory map in the hope of getting compact lines and in case mirroring is why I'm getting completely empty video reads. Still no action.
|
2017-06-05 09:38:49 -04:00 |
|
Thomas Harte
|
7e3a46c33e
|
[Re]discovered that sync may also be a product of the interrupt cycle. So started looking into that.
|
2017-06-04 21:54:55 -04:00 |
|
Thomas Harte
|
73654d51dd
|
Wired up actually to run.
|
2017-06-04 18:37:13 -04:00 |
|
Thomas Harte
|
096551ab3e
|
Made a first attempt to hash out the ZX80's bus. Video output isn't yet going though. Can't seem to find clarity on whether horizontal sync is really programmatic. Let's see.
|
2017-06-04 18:32:23 -04:00 |
|
Thomas Harte
|
c485c460f7
|
Imported the ZX80 and 81 system ROMs (though not publicly), added enough code to post their contents into C++ world.
|
2017-06-04 18:08:35 -04:00 |
|
Thomas Harte
|
d2637123c4
|
Added necessary support to get as far as an empty window when attempting to load a piece of ZX80 software.
|
2017-06-04 17:55:19 -04:00 |
|
Thomas Harte
|
2562306802
|
Merge branch 'master' into Z80
|
2017-05-16 21:05:00 -04:00 |
|
Thomas Harte
|
2ee8a7056e
|
Corrected TIA no longer to assume phase is an automatic quarter askew.
|
2017-05-16 20:43:28 -04:00 |
|
Thomas Harte
|
a5075d9eb5
|
Formalised the reasoning behind the colour phase fix-up and made it an opt-in per-caller value. Only the Oric currently needs to opt in.
|
2017-05-16 20:31:39 -04:00 |
|
Thomas Harte
|
eb8a2de5d6
|
Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.
|
2017-05-15 07:38:59 -04:00 |
|
Thomas Harte
|
0808e9b6fb
|
Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
|
2017-05-14 22:08:15 -04:00 |
|
Thomas Harte
|
8e35e913bb
|
Formally withdrew the 'load automatically' option for the Vic, having removed that option elsewhere.
|
2017-05-14 16:59:24 -04:00 |
|
Thomas Harte
|
5d91a2600d
|
Permitted ROM-style PRGs that are not a power-of-two in size, and added extra safety checks on loading data from a tape.
|
2017-05-08 22:15:35 -04:00 |
|
Thomas Harte
|
cb66c7e2dc
|
Performed some minor tidying.
|
2017-05-08 21:05:35 -04:00 |
|
Thomas Harte
|
61f8f2f18c
|
Switched to a more straightforward way of exiting from tape data loading.
|
2017-05-08 20:58:55 -04:00 |
|
Thomas Harte
|
7b43ae0a92
|
Implemented a catch for loading the data portion of files.
|
2017-05-07 22:22:59 -04:00 |
|
Thomas Harte
|
2807e3134f
|
Implemented speedy header finding. So that's half of it.
|
2017-05-07 20:32:48 -04:00 |
|
Thomas Harte
|
0771363f3b
|
Removed one piece of unnecessary logging.
|
2017-05-06 22:22:03 -04:00 |
|
Thomas Harte
|
2edf73908c
|
Temporarily disabled the existing fast loading implementation in pursuit of another, and started trying to correct the lack of connection between the userport VIA and the tape drive.
|
2017-05-06 22:00:12 -04:00 |
|
Thomas Harte
|
ed6b135015
|
Made final switch to permit high-sampling rate Atari audio.
|
2017-04-15 21:18:00 -04:00 |
|
Thomas Harte
|
f95015c7f6
|
Pulled out the divisor for audio.
|
2017-04-03 21:16:39 -04:00 |
|
Thomas Harte
|
814c0ada13
|
Fixed action counts for border motion.
|
2017-03-26 18:33:05 -04:00 |
|
Thomas Harte
|
dfc468f220
|
Locked down all initial state.
|
2017-03-26 15:47:04 -04:00 |
|
Thomas Harte
|
e01f3f06c8
|
Completed curly bracket movement.
|
2017-03-26 14:34:47 -04:00 |
|
Thomas Harte
|
3229502fa1
|
Standardised curly bracket placement across the Atari.
|
2017-03-23 21:59:16 -04:00 |
|
Thomas Harte
|
a26b87f348
|
Fixed: mistake was failure to count ready cycles.
|
2017-03-20 20:44:03 -04:00 |
|
Thomas Harte
|
4c3cc42c91
|
This gives a very noisy version of the real audio.
|
2017-03-20 20:38:29 -04:00 |
|
Thomas Harte
|
f3f4e1a541
|
Made a first, hacky, attempt at audio.
|
2017-03-20 19:35:51 -04:00 |
|
Thomas Harte
|
4722f6b5c4
|
Fixed sprite disappearance: test should be applied predecrement, not post — it relates to the address being used this access, not the next one.
|
2017-03-19 18:58:35 -04:00 |
|
Thomas Harte
|
7d8d1c7828
|
Fixed 'random' number generator.
|
2017-03-19 18:54:35 -04:00 |
|
Thomas Harte
|
4bb70e7d31
|
Resetting the mask upon low byte write appears to resolve some issues.
|
2017-03-19 18:49:37 -04:00 |
|
Thomas Harte
|
321030bb44
|
Added a slightly faulty but seemingly 'close' version of masking.
|
2017-03-19 18:28:06 -04:00 |
|
Thomas Harte
|
6c161b1150
|
This gives something that might be the correct background.
|
2017-03-19 17:49:48 -04:00 |
|
Thomas Harte
|
d5c37c8619
|
Shushed a little, so as to be able to see a reasonable amount of output during my lifetime.
|
2017-03-19 17:38:54 -04:00 |
|
Thomas Harte
|
7c66c36d3f
|
Attempted at least to manage appropriate data storage.
|
2017-03-19 17:31:08 -04:00 |
|
Thomas Harte
|
031a68000a
|
Added a class to contain the Pitfall 2 pager and a skeleton of initial work.
|
2017-03-18 22:08:47 -04:00 |
|
Thomas Harte
|
c3d82f88a5
|
Tidied up and commented on the Activision stack implementation.
|
2017-03-18 21:01:58 -04:00 |
|
Thomas Harte
|
c033bad0b9
|
Here's MNetwork!
|
2017-03-18 20:51:49 -04:00 |
|
Thomas Harte
|
c31d85f820
|
Re-emplaced the MegaBoy. Also cut detritus from the main Atari header.
|
2017-03-18 19:02:34 -04:00 |
|
Thomas Harte
|
217fbf257e
|
CBS RAM Plus returns.
|
2017-03-18 18:56:20 -04:00 |
|
Thomas Harte
|
0b611a14b9
|
Tigervision paging returns.
|
2017-03-18 18:50:13 -04:00 |
|
Thomas Harte
|
df6861c9dc
|
Parker Bros paging is back.
|
2017-03-18 18:21:01 -04:00 |
|
Thomas Harte
|
a4cd12394e
|
Reinstated the Activision stack pager.
|
2017-03-18 18:03:48 -04:00 |
|
Thomas Harte
|
e0bca1e37b
|
Reinstated the 16 and 32 kb Atari pagers, and ensured the 6532 always starts in a valid state.
|
2017-03-18 17:34:34 -04:00 |
|
Thomas Harte
|
55ce851bb2
|
Fixed types of the 8k cartridges, ensured the 6502 starts without an IRQ request history.
|
2017-03-18 17:04:01 -04:00 |
|
Thomas Harte
|
e8d34f2eb4
|
Having farmed out the bus, the Atari itself no longer is/owns a 6502.
|
2017-03-18 16:34:41 -04:00 |
|
Thomas Harte
|
bb3daaa99b
|
Sought to reintroduce the Atari 8k paging scheme, at the same time deciding to do away with the copy and paste of holding on to ROM data.
|
2017-03-18 15:04:01 -04:00 |
|
Thomas Harte
|
36b58d03b7
|
Formalised read bus value guarantee from the 6502, fixed missing clock signal wiring on the Atari cartridge class, reintroduced CommaVid support.
|
2017-03-18 14:46:46 -04:00 |
|
Thomas Harte
|
7958459db9
|
In theory unpaged cartridges should now work. Time to debug.
|
2017-03-18 14:01:04 -04:00 |
|
Thomas Harte
|
14a76af0d3
|
Started trying to float out bus control to cartridges.
|
2017-03-17 20:28:07 -04:00 |
|
Thomas Harte
|
afbd9fd41b
|
Fixed declared line length.
|
2017-03-14 21:33:38 -04:00 |
|
Thomas Harte
|
7302703039
|
Implemented the Activision stack paging scheme.
|
2017-03-14 20:24:05 -04:00 |
|
Thomas Harte
|
97a8a96593
|
Rejigged how the memory map is handled and implemented MNetwork support.
|
2017-03-14 20:07:54 -04:00 |
|
Thomas Harte
|
3b29276228
|
Implemented the MegaBoy paging scheme.
|
2017-03-14 17:40:01 -04:00 |
|
Thomas Harte
|
b3632a4e86
|
Institutes CBS RAM Plus emulation.
|
2017-03-14 17:25:10 -04:00 |
|
Thomas Harte
|
f0d944847b
|
Fixed setting of the second 1kb.
|
2017-03-11 18:16:29 -05:00 |
|
Thomas Harte
|
add14fb43a
|
Made an attempt to implement Tigervision paging.
|
2017-03-11 17:44:35 -05:00 |
|
Thomas Harte
|
33bda2d40c
|
Switched to image inspection for RAM guesses rather than disassembly. Which fixes the other Parker Bros titles.
|
2017-03-11 13:04:23 -05:00 |
|
Thomas Harte
|
2b5e3a600e
|
Made a first attempt at implementing the Parker Bros pager within the emulation.
|
2017-03-11 12:43:12 -05:00 |
|
Thomas Harte
|
9c72ce5bd2
|
Ensured a settling delay is permitted before an NTSC/PAL decision is made. To avoid false switches just due to startup.
|
2017-03-06 19:37:35 -05:00 |
|
Thomas Harte
|
79784a8e57
|
Followed tip: missiles are locked to the position after four output pixels, not four input pixels.
|
2017-03-04 22:23:50 -05:00 |
|
Thomas Harte
|
4751615623
|
Fixed NTSC colour cycle count, and hence the 2600's reported line lengths and phase offset.
|
2017-03-04 17:31:39 -05:00 |
|
Thomas Harte
|
d3257c345a
|
Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.
|
2017-03-04 17:00:28 -05:00 |
|
Thomas Harte
|
837cccdf83
|
Switched to deferred updates for the 6532.
|
2017-03-04 14:58:28 -05:00 |
|
Thomas Harte
|
93d1573481
|
Added a fix for certain homebrews.
|
2017-03-01 07:59:25 -05:00 |
|
Thomas Harte
|
893a5dd007
|
Added an artificial low pass filter, attempting to capture post-digital effects.
|
2017-02-28 21:29:55 -05:00 |
|
Thomas Harte
|
06dd98b23c
|
Pulled the reset time for horizontal blank extend up to position 224.
|
2017-02-28 20:28:54 -05:00 |
|
Thomas Harte
|
184c8ae707
|
Extended to emulate the CommaVid.
|
2017-02-27 20:50:59 -05:00 |
|
Thomas Harte
|
9d7985c1e1
|
Added Super Chip emulation.
|
2017-02-26 17:47:29 -05:00 |
|
Thomas Harte
|
e6a84fd26b
|
Attempted a hardware-correct implementation of missile-to-player latching. This completes the last of the **knowing** inaccuracies. The rest are as-of-yet unwitting.
|
2017-02-26 15:12:31 -05:00 |
|
Thomas Harte
|
440467ea3e
|
Started communicating which copy is being requested.
|
2017-02-26 13:39:25 -05:00 |
|
Thomas Harte
|
98376de9ad
|
Started returning 'no effect' for pot ports, rather than doing nothing. Still very much TODO though.
|
2017-02-25 22:58:58 -05:00 |
|
Thomas Harte
|
e61e355251
|
Moved to the maximum possibly required queue length of 4. Though the emulated 2600 should never need more than 2 slots as per the current calling pattern, it's not a contractual guarantee.
|
2017-02-25 17:25:10 -05:00 |
|
Thomas Harte
|
c898c8a99e
|
Ensured the missiles and ball don't attempt to enqueue. Because I don't think they're supposed to.
|
2017-02-25 17:13:22 -05:00 |
|
Thomas Harte
|
8c9062857c
|
Added a single-slot queue for player objects to defer drawing, thereby deferring pixel lookup. Which I think is correct. Though more slots might be needed.
|
2017-02-25 17:10:24 -05:00 |
|
Thomas Harte
|
77ed4ddc05
|
Slightly simplified ready line release logic.
|
2017-02-23 21:08:32 -05:00 |
|
Thomas Harte
|
82f392fada
|
This should be the other way around. I want whichever is later.
|
2017-02-22 21:54:49 -05:00 |
|
Thomas Harte
|
8291a63d5f
|
Fixed loss of audio when switching to PAL.
|
2017-02-22 21:15:37 -05:00 |
|
Thomas Harte
|
6120dae61a
|
While I'm using the hacky approach to player/missile synchronisation, I need to seed adder.
|
2017-02-22 07:39:11 -05:00 |
|
Thomas Harte
|
4f5f191cd6
|
Fixed: will no longer attempt to output pixels from before the pixel part of a line on which sync was disabled abruptly.
|
2017-02-22 07:33:36 -05:00 |
|
Thomas Harte
|
21abf4e9fc
|
Enshrined a terminology switch, albeit without any flow change behind it.
|
2017-02-22 07:29:48 -05:00 |
|
Thomas Harte
|
144d6b70d9
|
Minor cleaning.
|
2017-02-22 07:14:30 -05:00 |
|
Thomas Harte
|
b769f22ca0
|
Switched back to the collision_buffer_ being part of the TIA object, added one more assert.
|
2017-02-21 22:26:20 -05:00 |
|
Thomas Harte
|
7019d396d0
|
Threw in some asserts, discovering a bug in missile positioning.
|
2017-02-21 22:04:27 -05:00 |
|
Thomas Harte
|
f4447fd9cd
|
Attempted to fix failure of sprites properly to wrap when performing motion.
|
2017-02-21 21:53:09 -05:00 |
|
Thomas Harte
|
36396b3d62
|
Made a slightly better, albeit still inaccurate, version of missile-player lock.Enough for Combat to do reasonable things.
|
2017-02-21 20:45:20 -05:00 |
|
Thomas Harte
|
d1dbf8c21f
|
Missile to player lock is supposed to be a toggle; also factored out the commonalities of missile and ball drawing.
|
2017-02-21 07:58:37 -05:00 |
|
Thomas Harte
|
1bde0fed6f
|
Simplified relationship between Objects and the usage-specific components through inheritance.
|
2017-02-21 07:37:20 -05:00 |
|
Thomas Harte
|
7ab2358bba
|
Made an attempt to reintroduce missiles.
|
2017-02-20 22:22:39 -05:00 |
|
Thomas Harte
|
99547181f1
|
Attempted to template this thing. Without yet a plan in place for pixel lookup timing.
|
2017-02-20 21:42:59 -05:00 |
|
Thomas Harte
|
2bf784535c
|
Simplified calllng.
|
2017-02-20 18:04:40 -05:00 |
|
Thomas Harte
|
57f434c199
|
Reorganised state, with an eye towards unifying object motion and triggers.
|
2017-02-20 17:58:28 -05:00 |
|
Thomas Harte
|
99a35266e1
|
Attempted to bring frequency-switching logic into the cross-platform realm. Which for now creates an issue with the OpenGL context.
|
2017-02-19 21:20:37 -05:00 |
|
Thomas Harte
|
51bcaea60c
|
Disabled incorrect 'optimisations'.
|
2017-02-19 12:00:04 -05:00 |
|
Thomas Harte
|
e00339ef0a
|
Attempted to reintroduce the ball.
|
2017-02-19 08:02:54 -05:00 |
|
Thomas Harte
|
53cd125712
|
Added stub calls to draw the missiles and ball.
|
2017-02-19 07:28:24 -05:00 |
|
Thomas Harte
|
04693b067c
|
Fixed failure of the optimised route to pump the pixel clock; removed optimisation entirely for now.
|
2017-02-18 21:36:48 -05:00 |
|
Thomas Harte
|
cd7876a746
|
Reintroduced the extra clocking delay.
|
2017-02-18 20:18:50 -05:00 |
|
Thomas Harte
|
ed5ff49ef5
|
Fixed vertical delay, retreated from my previous thought about adding the one extra cycle of sprite delay, at least temporarily.
|
2017-02-16 20:52:01 -05:00 |
|
Thomas Harte
|
8d502a0b03
|
Decided not to run before I can walk and switched to storing the motion time and next step explicitly per object.
|
2017-02-16 20:28:37 -05:00 |
|
Thomas Harte
|
5ea232310f
|
Added a check against negative runs.
|
2017-02-16 18:55:58 -05:00 |
|
Thomas Harte
|
09309aa74f
|
Attempted to prevent extraneous moves.
|
2017-02-16 18:52:39 -05:00 |
|
Thomas Harte
|
b5357860b9
|
Made an attempt to split things apart so as to be able to introduce the proper sprite latency.
|
2017-02-14 20:56:16 -05:00 |
|
Thomas Harte
|
cd90118a0f
|
Added two, extraordinarily simple tests.
|
2017-02-12 20:32:53 -05:00 |
|
Thomas Harte
|
25776de59d
|
I think unit testing this thing is the only way forwards. Started adding appropriate hooks.
|
2017-02-12 19:55:02 -05:00 |
|
Thomas Harte
|
600bdc9af7
|
In C++, I think the implicit cast to bool negates the need for any manual collapsing?
|
2017-02-12 18:18:35 -05:00 |
|
Thomas Harte
|
0c9be2b09e
|
Shunted the collisions buffer onto a separate area of the heap for the time being, as a debugging aid. Also added a few more initial values.
|
2017-02-12 18:16:50 -05:00 |
|
Thomas Harte
|
df8a5cbe6d
|
Made attempts (i) to respect the delay flag; and (ii) to account for border-region sprite clocking.
|
2017-02-12 17:35:09 -05:00 |
|
Thomas Harte
|
9ce68c38ae
|
Made an effort to implement proper pixel output for sprites.
|
2017-02-12 14:01:50 -05:00 |
|
Thomas Harte
|
40954d6a2a
|
Attempted to factor out parts I expect to reuse for missiles and the ball.
|
2017-02-12 11:31:17 -05:00 |
|
Thomas Harte
|
ac444a3f34
|
Corrected both position increments and target time calculation.
|
2017-02-11 21:24:14 -05:00 |
|
Thomas Harte
|
b8abeced6d
|
Made an attempt to introduce the proper eventful loop for player output. With debugging yet to occur.
|
2017-02-11 21:01:58 -05:00 |
|
Thomas Harte
|
aeff59addc
|
Implemented motion 'correctly', for programs written to do all work outside of the pixel area.
|
2017-02-11 20:25:49 -05:00 |
|
Thomas Harte
|
aff69dbc34
|
Resolved spurious static analyser issue; screen mode will always be 0–6 but it doesn't know that. Setting a non-zero divider doesn't feel worth worrying about for a cleaner compile.
|
2017-02-11 13:35:22 -05:00 |
|
Thomas Harte
|
6381e4e1b0
|
All that's happened to position is that numbers have been added to it. So it can't be negative, given that it wasn't before. So a regular modulo will do.
|
2017-02-11 13:34:36 -05:00 |
|
Thomas Harte
|
905ed1f87b
|
Switched to the more natural type, which is also signed, making my logic less prone to error.
|
2017-02-11 13:16:53 -05:00 |
|
Thomas Harte
|
8de6caf6ff
|
Started trying to get into a proper structure here. Chickened out.
|
2017-02-11 12:59:13 -05:00 |
|
Thomas Harte
|
40d3f5f7f6
|
Attempted properly to respect start .
|
2017-02-11 08:26:09 -05:00 |
|
Thomas Harte
|
64d5712d1d
|
Added an incorrectly-coded version of horizontal move, at least so that I can verify that information is going into the correct slots.
|
2017-02-10 07:23:43 -05:00 |
|
Thomas Harte
|
3b20d862f0
|
Made an initial attempt to mark sprite positions. But without hmove implemented, they're all over the place.
|
2017-02-09 20:53:42 -05:00 |
|
Thomas Harte
|
2e9ef2b0ef
|
Took a shot at reinstating the horizontal blank extend flag.
|
2017-02-09 18:37:19 -05:00 |
|
Thomas Harte
|
70745286a5
|
Ensured this array is properly aligned for the uin32_t accesses I intend to make for background drawing.
|
2017-02-08 20:25:23 -05:00 |
|
Thomas Harte
|
dcb7584060
|
Added the four-cycle playfield output latency and ensured you can't get smaller-than-usual pixels by rapid register value changing.
|
2017-02-08 07:30:32 -05:00 |
|
Thomas Harte
|
a477499724
|
Got a bit more explicit with range returned by get_cycles_until_horizontal_blank and hence attempted a more thorough (/correct) version of WSYNC.
|
2017-02-07 22:14:45 -05:00 |
|
Thomas Harte
|
944d835eea
|
Switched explicitly to an accumulation model for filling the collision buffer.
|
2017-02-06 21:59:28 -05:00 |
|
Thomas Harte
|
8f5039130c
|
Changed index naming order to ensure no out-of-bounds accesses.
|
2017-02-06 21:48:41 -05:00 |
|
Thomas Harte
|
ba165bb70a
|
Made an attempt properly to populate collision registers from the collision buffer.
|
2017-02-06 21:15:55 -05:00 |
|
Thomas Harte
|
474e2e8d2c
|
Fixed once again to respect mid-line palette changes.
|
2017-02-06 20:09:12 -05:00 |
|
Thomas Harte
|
8b8eb787df
|
Fixed complete invisibility.
|
2017-02-06 18:42:58 -05:00 |
|
Thomas Harte
|
66bcdd36f3
|
Made an attempt to introduce an intermediate buffer that ends up with a bit mask of all graphical components present on it, and to use that to infer collision flags and colours, based on playfield priority and colour palette. Immediately yielding: a blank screen. Good work!
|
2017-02-06 18:29:00 -05:00 |
|
Thomas Harte
|
6bcf95042c
|
Started trying to be a bit more explicit about usage, and to divide up drawing responsibility.
|
2017-02-05 17:51:56 -05:00 |
|
Thomas Harte
|
f2437cb257
|
Added some additional documentation, started making steps towards returning sprites, fixed a counter bug that would exhibit as incorrect sync.
|
2017-01-31 20:30:32 -05:00 |
|
Thomas Harte
|
abe04334c2
|
Attempted to retain more player information, and removed the output cursor from class storage as I think it's acceptable as a temporary.
|
2017-01-30 22:42:27 -05:00 |
|
Thomas Harte
|
8545707b54
|
Reinstituted the playfield. Probably needs more buffering though. Time to look into delays.
|
2017-01-30 21:38:58 -05:00 |
|
Thomas Harte
|
2b08758b2b
|
Started capturing playfield/ball and background colours.
|
2017-01-30 08:08:03 -05:00 |
|
Thomas Harte
|
764b528891
|
Made a first attempt at switching to a model that respects blank and sync.
|
2017-01-30 07:19:19 -05:00 |
|
Thomas Harte
|
92754ace7a
|
Some mild fixes get me up to having a rolling screen of vertical lines. Which is what I was hoping for right now!
|
2017-01-29 22:16:23 -05:00 |
|
Thomas Harte
|
d51f185dc7
|
Made an attempt to reintroduce the basic horizontal loop.
|
2017-01-29 15:43:57 -05:00 |
|
Thomas Harte
|
2390358c24
|
Prevented unbounded CPU usage, albeit without yet deciding who has authority for the clock rate.
|
2017-01-29 14:19:26 -05:00 |
|
Thomas Harte
|
2432a3b4d7
|
Fixed condition — >= is smarter.
|
2017-01-29 14:00:01 -05:00 |
|
Thomas Harte
|
9c3597c7e3
|
Attempted to reintroduce enough logic to handle [most of] line timing, such that WSYNC works. Initial objective is to get back to having a working background.
|
2017-01-29 13:47:36 -05:00 |
|
Thomas Harte
|
fba6baaa9c
|
Stubbed and disabled to get back to building.
|
2017-01-28 21:56:01 -05:00 |
|
Thomas Harte
|
a246530953
|
Supposing the TIA were implemented, this is (more or less) what the Atari 2600 would now look like.
|
2017-01-28 21:46:40 -05:00 |
|
Thomas Harte
|
0ffded72a6
|
Created a placeholder class for a factored-out TIA. There's a bit more it'll need to do, like vending (or receiving) a CRT but this is the full hardware stuff, I think.
|
2017-01-28 16:19:08 -05:00 |
|
Thomas Harte
|
6d087ca054
|
Restored 2600 audio.
|
2017-01-25 21:29:19 -05:00 |
|
Thomas Harte
|
be1cb2a551
|
Fixed NTSC phase.
|
2017-01-11 21:31:24 -05:00 |
|
Thomas Harte
|
6153ada33b
|
Fixed Electron's support for automatically booting floppy disks.
|
2017-01-08 14:46:19 -05:00 |
|
Thomas Harte
|
8cd1575891
|
Similar fix to that over in Oric land: ensure a known, effective initial value for the Plus 3's control register.
|
2016-12-28 18:52:36 -05:00 |
|
Thomas Harte
|
90151e2094
|
Fixed to ensure a known initial control register value, which has taken effect.
|
2016-12-28 18:49:32 -05:00 |
|
Thomas Harte
|
a568172758
|
Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
|
2016-12-28 18:29:37 -05:00 |
|
Thomas Harte
|
4fca30b81f
|
Made the Plus 3 less chatty, documented invalidate_track .
|
2016-12-25 21:06:58 -05:00 |
|
Thomas Harte
|
3805e3d17d
|
Ensured base address is set properly at construction.
|
2016-12-22 22:46:02 -05:00 |
|
Thomas Harte
|
63107cd492
|
Tidied, very slightly.
|
2016-12-15 19:49:25 -05:00 |
|
Thomas Harte
|
a555c5762a
|
Rearranged code, hopefully into a more logical grouping.
|
2016-12-15 19:47:04 -05:00 |
|
Thomas Harte
|
4a7ddaf2e9
|
Added documentation and a quick note to self.
|
2016-12-15 19:43:04 -05:00 |
|
Thomas Harte
|
f61176cd7d
|
Reinstituted something of the don't-do-pixel-work-until-an-affecting-write-occurs optimisation.
|
2016-12-15 19:20:14 -05:00 |
|
Thomas Harte
|
c1c70a767a
|
Attempted fully to reinstate proper timing.
|
2016-12-15 18:52:16 -05:00 |
|
Thomas Harte
|
0326316bb8
|
Reinstated whole-frame counting. Thereby to reinstate proper interrupts.
|
2016-12-15 18:09:49 -05:00 |
|
Thomas Harte
|
b58b11fc93
|
Switched to a table-based dispatch of line-by-line actions, primarily to simplify.
|
2016-12-15 18:07:46 -05:00 |
|
Thomas Harte
|
fd541e1142
|
An early draft; dealing with the issue that not all cycles are necessarily consumed in a single call. Incomplete; broken. Committing for cross-machine visibility.
|
2016-12-12 08:01:10 -05:00 |
|
Thomas Harte
|
be7e05e109
|
Started attempting to move total responsibility for display-related interrupts and RAM timing into the video.
|
2016-12-11 18:34:49 -05:00 |
|
Thomas Harte
|
c5cf8d9531
|
Ensured the video subsystem correctly handles requests to run over a frame boundary.
|
2016-12-11 16:17:51 -05:00 |
|
Thomas Harte
|
52028432e1
|
Restored some semblance of output.
|
2016-12-10 22:19:10 -05:00 |
|
Thomas Harte
|
0aae1bd1ef
|
Fixed calculation of termination cycle.
|
2016-12-10 21:35:41 -05:00 |
|
Thomas Harte
|
c43e481a33
|
Started factoring video out of the Electron.
|
2016-12-10 21:07:52 -05:00 |
|
Thomas Harte
|
e62be03673
|
Removed endianness assumption.
|
2016-12-10 19:10:33 -05:00 |
|
Thomas Harte
|
a5683dfb21
|
Removed now untrue comment.
|
2016-12-10 15:19:48 -05:00 |
|
Thomas Harte
|
0e71802b92
|
Reduced Oric video to single nibble constants. Removed attempt at asynchronous flush as no longer required.
|
2016-12-10 14:17:46 -05:00 |
|
Thomas Harte
|
580f347727
|
Fixed Oric SCART mode by having it change what it's giving to the CRT based on which shader it knows will be active.
|
2016-12-10 13:55:56 -05:00 |
|
Thomas Harte
|
a549fd1ecc
|
Introduced the ability simply to piggy-back off the CRT's natural phase for the colour burst, thereby eliminating a couple of redundant independent attempts in the Oric and Electron.
|
2016-12-10 13:42:34 -05:00 |
|
Thomas Harte
|
6cdd41e5a9
|
Added direct use of the colour ROM, uploading 16 bits per pixel to contain the entire ROM composite wave.
|
2016-12-09 22:17:10 -05:00 |
|
Thomas Harte
|
3b5962b171
|
This is an initial attempt at using the actual Oric colour ROM values for composite video generation.
|
2016-12-09 20:01:27 -05:00 |
|
Thomas Harte
|
c304db0f5a
|
Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there.
|
2016-12-06 21:16:29 -05:00 |
|
Thomas Harte
|
ebb62a2d78
|
Switched the 2600 to postfix and non-camel-case instance variable names.
|
2016-12-03 14:07:38 -05:00 |
|
Thomas Harte
|
b81c058c0a
|
Factored out the Atari 2600's 6532 connection, as a low-hanging fruit.
|
2016-12-03 13:41:55 -05:00 |
|
Thomas Harte
|
3361d6b93a
|
Factored out the Atari 2600 speaker and adjusted it to postfix underscores.
|
2016-12-03 13:39:46 -05:00 |
|
Thomas Harte
|
1b1a8d3e52
|
Brought the Vic-20 into suffix naming.
|
2016-12-03 13:30:27 -05:00 |
|
Thomas Harte
|
063a62372f
|
The Commodore serial bus and C1540 are now postfix underscorers.
|
2016-12-03 13:14:03 -05:00 |
|
Thomas Harte
|
eb3a1fbfb7
|
Commuted remaining Electron underscores. It would be nice also to factor out the video, but the time hasn't come yet.
|
2016-12-03 13:01:01 -05:00 |
|
Thomas Harte
|
4fac538a57
|
Factored out the Electron's speaker and adjusted instance variable naming.
|
2016-12-03 12:41:02 -05:00 |
|
Thomas Harte
|
d1d93829cf
|
Factored out the Tape and switched it to postfix underscores.
|
2016-12-03 12:18:08 -05:00 |
|
Thomas Harte
|
2003b514aa
|
Switched the typer to postfix underscores.
|
2016-12-03 10:55:50 -05:00 |
|
Thomas Harte
|
81ee834530
|
As well as a bunch of logging, reinstated rotation position preservation across tracks.
|
2016-12-02 18:36:47 -05:00 |
|
Thomas Harte
|
93c573bfa9
|
Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc.
|
2016-12-01 21:13:16 -05:00 |
|
Thomas Harte
|
442986ee2c
|
Introduced a head loading path for 1793 machines.
|
2016-12-01 20:12:22 -05:00 |
|
Thomas Harte
|
82899f2f47
|
Ensured flag setting is atomic, removed duplication of interrupt request versus busy, found better names for the personality testers, unified delegate protocol.
|
2016-12-01 07:41:52 -05:00 |
|
Thomas Harte
|
9b6c5e814a
|
Now that it can be more explicit, this should admit that it's '93-based, not '73.
|
2016-11-28 16:22:35 -05:00 |
|
Thomas Harte
|
2f459690d4
|
It would appear the 1770 and 1773 actually differ in relation to the (non-sensical) ability not to spin-up for a Type 2, and whether a side compare can occur. So the WD1770 class now requires a personality to be specified. Which it singly fails to honour.
|
2016-11-26 23:29:30 +08:00 |
|
Thomas Harte
|
e9d6566e9c
|
Of course, changing the IRQ enable may immediately change the IRQ line. Signal if so.
|
2016-11-26 09:35:44 +08:00 |
|
Thomas Harte
|
73d30b9c00
|
Corrected typo.
|
2016-11-25 21:30:45 +08:00 |
|
Thomas Harte
|
12956901d6
|
Filled in some register mirrors.
|
2016-11-25 21:28:11 +08:00 |
|
Thomas Harte
|
54246c8f1a
|
Interrupt enabling works the other way around I think, and both registers with only one bit defined should probably return '1' in all other places?
|
2016-11-25 21:24:59 +08:00 |
|
Thomas Harte
|
8be81f6ebd
|
Supplied disks are given to the Microdisc.
|
2016-11-25 20:53:38 +08:00 |
|
Thomas Harte
|
4af678d2ed
|
Gave the Microdisc a clock signal, added just enough of force interrupt to avoid a spurious belief that a type 3 command has started.
|
2016-11-25 20:51:39 +08:00 |
|
Thomas Harte
|
5c019ad1c0
|
Okay, so it looks like both ROM paging flags are the opposite of what I previously had.
|
2016-11-25 20:42:40 +08:00 |
|
Thomas Harte
|
5be45c6c50
|
Ensured proper default behaviour.
|
2016-11-25 20:30:27 +08:00 |
|
Thomas Harte
|
d33f3b9224
|
This is the broad strokes effort at enabling Microdisc emulation.
|
2016-11-25 20:15:48 +08:00 |
|
Thomas Harte
|
7c2d9f3752
|
This seems to be right, per http://wiki.defence-force.org/doku.php?id=oric:hardware:floppy_disk_controller_wd1793
|
2016-11-22 22:35:43 +08:00 |
|
Thomas Harte
|
5ebc1c63ff
|
Switched video to postfix underscores, for consistency.
|
2016-11-22 22:28:45 +08:00 |
|
Thomas Harte
|
707763f80b
|
Added Microdisc storage to the Oric class, switching all instance storage to postfix underscore while I'm here.
|
2016-11-22 22:22:00 +08:00 |
|
Thomas Harte
|
0c3644f350
|
Made a second parse at logic. We'll see.
|
2016-11-22 22:12:32 +08:00 |
|
Thomas Harte
|
03843bf934
|
Unified delegates. Let's keep it easy for the caller.
|
2016-11-22 22:11:11 +08:00 |
|
Thomas Harte
|
13a608a8c2
|
Added what may be correct paging logic.
|
2016-11-22 22:09:52 +08:00 |
|
Thomas Harte
|
363db695e8
|
Started implementation of the Microdisc selection logic.
|
2016-11-22 08:12:53 +08:00 |
|
Thomas Harte
|
09f965e6a9
|
Fixed potential bug whereby inserting a disk into a drive that hadn't been lazily allocated yet but had already been selected wouldn't take effect.
|
2016-11-22 08:11:57 +08:00 |
|
Thomas Harte
|
ea33a28695
|
Any Oric-format disks that are inserted now make it all the way to the Oric, along with a request to emulate the Microdisc. It has received a copy of the ROM. The ball is entirely in its court now.
|
2016-11-21 20:59:25 +08:00 |
|
Thomas Harte
|
311f8c0b47
|
Restored audio.
|
2016-11-16 11:10:07 +08:00 |
|
Thomas Harte
|
8b40ae03ca
|
Extended analysis to spot IRQ and NMI vector changes, for titles that simply adjust those then exit. Ensured Oric emulator can type and load quickly on an Oric 1 just as well as on an Atmos.
|
2016-11-15 11:05:53 +08:00 |
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Thomas Harte
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e2cdfae8a7
|
The emulated Oric now has access to both versions of the BASIC ROM and picks between them based on the static analyser's recommendation.
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2016-11-15 10:39:16 +08:00 |
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Thomas Harte
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9c550c594a
|
Moved audio work back into its own thread, but this time it queues up an all happens only upon a flush. Hopefully to resolve synchronisation cost concerns.
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2016-11-09 21:17:50 -05:00 |
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Thomas Harte
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64827931bf
|
Switched the Oric implementation simply to rely upon the Storage-level tape parser. So now there's only one, authoritative one of those.
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2016-11-07 21:57:58 -05:00 |
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Thomas Harte
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45b169f341
|
Made a few mapping fixes, clarified where the default reset code lives, ensured the Oric and Vic clear their keys when the typer ends.
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2016-11-05 15:28:03 -04:00 |
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Thomas Harte
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338904fffe
|
Made similar cleanings of the Electron and Vic.
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2016-11-05 15:07:57 -04:00 |
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Thomas Harte
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9fb9d92437
|
Made the typer much more able to help out, and thereby tidied and separated the Oric's typer.
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2016-11-05 14:47:09 -04:00 |
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Thomas Harte
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626e719fab
|
Added sanity checks on loading quickly.
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2016-11-03 22:50:49 -04:00 |
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Thomas Harte
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a7e4c0c3b5
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Switched to a ROM trap for typing.
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2016-11-03 22:21:05 -04:00 |
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Thomas Harte
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8c70dc5891
|
Implemented typer for the Oric, and I'm starting to think the code is a bit too repetitious. Refactoring will be forthcoming. Added CLOAD"" as the loading command for all Oric software.
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2016-11-03 22:14:40 -04:00 |
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Thomas Harte
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9c2df231ce
|
Made fast loading optional.
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2016-11-03 07:59:30 -04:00 |
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Thomas Harte
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e9f1a6a79d
|
This appears to be it. The secret? Don't worry about the stop bits. They're just processing time. Latch onto the next start.
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2016-11-03 07:34:48 -04:00 |
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Thomas Harte
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827a919368
|
This is an initial attempt at reading actual tape data. It loses sync though.
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2016-11-02 22:30:53 -04:00 |
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Thomas Harte
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419629ee6e
|
Completed proof of theory for fast loading. It's just an around-the-back direct-to-file hack for now though.
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2016-11-02 21:09:49 -04:00 |
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Thomas Harte
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bb58caff52
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Merge branch 'master' into FastOricTape
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2016-10-31 22:11:03 -04:00 |
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Thomas Harte
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21604376e6
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Reintroduced clocking of the AY and boxed in the range of the master divider a little further.
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2016-10-30 22:51:08 -04:00 |
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Thomas Harte
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33512988fb
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Added a basic cycle skipper plus some notes.
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2016-10-30 22:39:47 -04:00 |
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Thomas Harte
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b04ba41951
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Moved code out of header.
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2016-10-30 20:16:58 -04:00 |
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Thomas Harte
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3b52ab0d37
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Cut some dead state.
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2016-10-30 20:16:52 -04:00 |
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Thomas Harte
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58f888c6ad
|
Limited CRT calls.
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2016-10-30 16:21:20 -04:00 |
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Thomas Harte
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1ff9b474bf
|
Made an attempt to make execution flow through this loop more straightforward for a branch predictor.
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2016-10-30 15:30:39 -04:00 |
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Thomas Harte
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7843a244b0
|
Ensured emulation doesn't enter an infinite loop if the user attempts to read beyond the end of a tape.
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2016-10-28 22:23:25 -04:00 |
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Thomas Harte
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4fab794747
|
Added a direct-to-two-cycles emulation path for 6522 owners.
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2016-10-27 21:13:25 -04:00 |
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Thomas Harte
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2eda0b3c86
|
Attempted to simplify the logic behind the most common 6522 usage.
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2016-10-27 21:06:31 -04:00 |
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Thomas Harte
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30d4a7c662
|
Fixed: blinking means ink vanishing and appearing. Nothing else.
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2016-10-24 21:58:15 -04:00 |
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Thomas Harte
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09687a2e2f
|
Removed errant newline.
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2016-10-20 21:30:12 -04:00 |
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Thomas Harte
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44910d90ba
|
Adjusted aberrations in semicolons.
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2016-10-20 21:20:13 -04:00 |
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Thomas Harte
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6292ac5b26
|
Yet more .hpp clean(s)ing.
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2016-10-20 21:15:21 -04:00 |
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Thomas Harte
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c5948ef177
|
Evicted more header-resident code.
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2016-10-20 21:05:32 -04:00 |
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Thomas Harte
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d335991e60
|
Shifted code out of the header.
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2016-10-20 20:53:17 -04:00 |
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Thomas Harte
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9c956f83b8
|
Made it slightly more clear that the correct test is conformed to.
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2016-10-20 19:23:36 -04:00 |
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Thomas Harte
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21cfb39ed9
|
Added 60Hz output support.
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2016-10-20 07:34:23 -04:00 |
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Thomas Harte
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5c69728625
|
Introduced a memory fuzzer, and ensured the Oric uses it.
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2016-10-19 21:31:50 -04:00 |
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Thomas Harte
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734b575d30
|
Ensured no attempt to write to pixel storage if none was available.
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2016-10-19 21:17:27 -04:00 |
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Thomas Harte
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ca28e3c64e
|
Ensured the AY is pumped linearly, not exponentially.
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2016-10-18 22:21:06 -04:00 |
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Thomas Harte
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9669a5ec9b
|
Switched to a more authentic interfacing to the AY.
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2016-10-18 19:32:15 -04:00 |
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Thomas Harte
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988bbb5ab1
|
Ensured AY registers aren't rewritten just because of a synchronise event. A stall prior to figuring out proper bus logic, clearly.
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2016-10-17 08:05:57 -04:00 |
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Thomas Harte
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1a57e89ff0
|
Altered phase so that it now merely accounts for accumulated error across a frame. Can probably do better.
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2016-10-17 08:04:15 -04:00 |
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Thomas Harte
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61ad0f8bdc
|
Fixed inverse characters, added an extra per-frame phase change, based on empirical observation, ensured header guard won't become ambiguous.
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2016-10-16 22:14:01 -04:00 |
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Thomas Harte
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a67afb7efa
|
Switched to a tight crop on the pixel part of the display.
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2016-10-15 21:43:46 -04:00 |
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Thomas Harte
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a608bbebfb
|
Performed enough wiring to put the onus back onto OricTAP to do appropriate things.
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2016-10-15 21:32:59 -04:00 |
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Thomas Harte
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6d7c3f6ac2
|
Factored out the now-sampling binary-level tape player from the Vic and connected it up to the Oric.
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2016-10-15 21:21:18 -04:00 |
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Thomas Harte
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9730e8247f
|
Ensured propagation of synchronise messages, added enough to do plain tone. Probably. So: noise and envelopes missing. And it's all far too quiet.
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2016-10-15 21:04:21 -04:00 |
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Thomas Harte
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51bdac27ae
|
Made some AY advances; it's now being polled for samples and collecting more information on what it needs to output.
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2016-10-15 17:45:39 -04:00 |
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Thomas Harte
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da9c9ad51a
|
Added in the missing keys; added variable phase to the video.
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2016-10-14 22:39:27 -04:00 |
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Thomas Harte
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288d10c253
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Got some keyboard reaction.
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2016-10-14 21:44:15 -04:00 |
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Thomas Harte
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3dbb602419
|
This seems to be a bit more likely.
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2016-10-14 21:36:59 -04:00 |
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Thomas Harte
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138eabcff4
|
Continued in my effort to wire up a keyboard. Will need further to continue.
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2016-10-14 21:35:15 -04:00 |
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Thomas Harte
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d8e4c488c2
|
Started iterating towards having an AY and a fully-working keyboard.
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2016-10-14 21:18:03 -04:00 |
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Thomas Harte
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8867ad647c
|
Made an attempt at implementing the loopbacks necessary for diagnostics.
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2016-10-13 21:47:12 -04:00 |
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Thomas Harte
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41e7eff6c8
|
Added a VIA. Now it's time to find out how poor my 6522 emulation is.
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2016-10-13 20:50:55 -04:00 |
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Thomas Harte
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c9962f6502
|
Made an almost complete implementation of video. Just one row of the diagnostics cartridge seems to be off, showing thw wrong character set.
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2016-10-13 19:34:29 -04:00 |
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Thomas Harte
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69920a4979
|
Made some basic first attempt at parsing video attributes; ensured lowest byte of ROM is readable.
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2016-10-13 07:59:11 -04:00 |
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Thomas Harte
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ae48ad1bb4
|
Meaningful text! Albeit with the initial 'O' of 'Oric' missing. I guess control codes and NMIs next?
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2016-10-12 22:03:54 -04:00 |
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Thomas Harte
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120b2d9e33
|
Switched to using a diagnostic ROM for now, as it'll definitely boot without initially requiring either a 6522 or AY. Have some forms appearing which imply I'm not doing badly, at least up to not knowing where I'm supposed to get character pixels from.
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2016-10-12 21:52:47 -04:00 |
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Thomas Harte
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1f857c619b
|
Fixed timing issues. Static box of frame achieved!
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2016-10-12 21:42:36 -04:00 |
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Thomas Harte
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304f0999cd
|
Made a faulty but hopefully creditable attempt to demarcate an Oric frame.
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2016-10-12 21:29:21 -04:00 |
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Thomas Harte
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8c8a71107e
|
Added just enough wiring to add something that will generate the video, one day.
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2016-10-12 19:20:23 -04:00 |
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Thomas Harte
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e6937d8003
|
Ensured that the ROM gets installed. So next for some video action?
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2016-10-12 18:51:02 -04:00 |
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Thomas Harte
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4a062c616f
|
Added enough wiring to get Oric TAPs through to a completely unimplemented Oric emulation.
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2016-10-11 22:20:13 -04:00 |
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Thomas Harte
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922dd6a586
|
Hit up the other two kinds of audio generator.
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2016-10-07 17:10:00 -04:00 |
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Thomas Harte
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de658b70d7
|
That's thread safety, subject to the async task queue being made to work...
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2016-10-07 17:02:36 -04:00 |
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Thomas Harte
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2d26feb073
|
Added mappings for the previously-missing characters @, [ and ].
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2016-10-04 22:03:53 -04:00 |
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Thomas Harte
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f9ee6803df
|
It's likely this should be set at startup too, based on latest info.
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2016-10-03 22:16:10 -04:00 |
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Thomas Harte
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97304e22f0
|
Adjusted per tests on StarDot; it appears the tape interrupts may fire during audio output, as if in tape output mode.
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2016-10-03 20:03:14 -04:00 |
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Thomas Harte
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dae6b45464
|
Ensured the always-on bit of the interrupt status register is indeed on.
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2016-10-03 19:15:31 -04:00 |
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Thomas Harte
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cd1ab09701
|
The Vic-20 now inserts ROMs again.
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2016-09-29 20:15:25 -04:00 |
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Thomas Harte
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79412dc84d
|
Upped MFM clock cycles, switched back to using the typer for the ADFS and adjusted ADFS ROM slots.
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2016-09-28 21:28:34 -04:00 |
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Thomas Harte
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4db086949a
|
Made an attempt to add MFM decoding to the 1770; ensured something is returned when reading the Plus 3 status register again.
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2016-09-25 21:38:52 -04:00 |
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Thomas Harte
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572d5587d9
|
Made a first stab at enabling multi-disk machines and thereby obeying (some of) the Plus 3's status register.
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2016-09-25 21:24:16 -04:00 |
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Thomas Harte
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9bbcbd1001
|
Renamed class, intending to turn a Disk::Drive into literally just that, and have a thing with a PLL that consumes events be a Controller .
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2016-09-25 20:05:56 -04:00 |
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Thomas Harte
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7f4c78139c
|
Attempted to ensure that ADFS disks get to an appropriately-configured Electron. Not immediately sure why the shift press isn't working; doesn't need to be dealt with immediately.
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2016-09-25 19:59:46 -04:00 |
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Thomas Harte
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6084020ab3
|
Added shift-break as a better way to boot suitable disks. Continued attempting to clean the 1770.
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2016-09-25 14:11:22 -04:00 |
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Thomas Harte
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ce4100e5b9
|
Fixed slots for DFS and ADFS to sideways RAM; continued working on the 1770 to get as far as trying to get the body of a sector.
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2016-09-24 22:04:54 -04:00 |
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Thomas Harte
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8db0030068
|
Fixed ROM loading by the Electron, turned the WD1770 into a 'disk drive' (it'll do for now), persuaded it to get all the way through a very specifically convenient type 1 command.
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2016-09-20 22:14:33 -04:00 |
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Thomas Harte
|
3b97b038b9
|
Corrected and sketched out state machine far enough to get to a complaint about unhandled work.
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2016-09-20 15:56:31 -04:00 |
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Thomas Harte
|
e358057440
|
Added a WD1770 run_for_cycles call. So I really can now move that as far as reporting that it has no disk?
|
2016-09-20 07:42:17 -04:00 |
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Thomas Harte
|
cd5939501f
|
Treading water some more, ensured the DFS and ADFS ROMs get to the Electron. It now even inserts the DFS ROM if it has a DFS disk image. Might need to make it a sideways RAM though? Regardless, the next job surely — surely! — has to be to stop avoiding the 1770?
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2016-09-20 07:36:57 -04:00 |
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Thomas Harte
|
a9e65e9b7a
|
Tweaked disk side density, added call-outs to a WD1770 if the Electron had one (albeit without run_for_cycles yet as I need to figure out the clock rate), added a shell of the basic functions of the WD1770. No implementation yet.
|
2016-09-19 22:06:56 -04:00 |
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Thomas Harte
|
64f2538b1f
|
Added CRC checking to DFS comprehension; fixed a bunch of places where I'd used Objective-C's #import rather than #include .
|
2016-09-19 08:16:06 -04:00 |
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Thomas Harte
|
142254a478
|
Resolved failure to open disks that arrive through analysis.
|
2016-09-17 18:11:58 -04:00 |
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Thomas Harte
|
ee8510984f
|
Added just enough wiring to restore the 2600 to functionality.
|
2016-09-15 19:34:45 -04:00 |
|
Thomas Harte
|
e3571e8b9e
|
Added insurance against an infinite loop should the tape be exhausted.
|
2016-09-12 22:22:23 -04:00 |
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Thomas Harte
|
40660fe680
|
Made yet another guess at Commodore analysis. Elevated fast tape-related unnatural speed up to the OS-side mechanisms.
|
2016-09-12 22:06:03 -04:00 |
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Thomas Harte
|
e54a2326a3
|
Made attempt to run at zero cost while processing tape input.
|
2016-09-11 17:34:02 -04:00 |
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Thomas Harte
|
eeec516fa6
|
Implemented seeking on tapes, mucked about a bit more with the Commodore analyser, at least temporarily removed cropping from the Vic emulator.
|
2016-09-11 17:09:00 -04:00 |
|
Thomas Harte
|
8c84f3581a
|
Attempted to bring some uniformity in application of configurations.
|
2016-09-08 05:32:17 -04:00 |
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Thomas Harte
|
50175a9aed
|
Added logic to try to spot when the first program is BASIC and, if so, what the correct memory model is, then to get that information to the Vic. Though it currently then gets overwritten by the view controller. Grrrr.
|
2016-09-07 22:17:19 -04:00 |
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Thomas Harte
|
21e5f407d8
|
I need to get a bit more definitive on naming but this gets all the way to setting a configuration upon an Electron.
|
2016-08-31 22:03:42 -04:00 |
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Thomas Harte
|
56c0d70c1f
|
Gave disks their own namespace.
|
2016-08-27 17:15:09 -04:00 |
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Thomas Harte
|
c0402d0c2b
|
Gave tapes their own namespace.
|
2016-08-27 17:09:45 -04:00 |
|
Thomas Harte
|
55ada536ac
|
Added a test call, further mutated result structure.
|
2016-08-27 14:25:16 -04:00 |
|
Thomas Harte
|
dab3580111
|
Experimental: can I afford a lower sampling rate if there's a low-pass filter in effect?
|
2016-08-22 22:18:05 -04:00 |
|