Thomas Harte
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06dbb7167b
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Unify TST.
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2022-10-11 21:31:14 -04:00 |
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Thomas Harte
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eff9a09b9f
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Collapse MOVE and NEG[X] similarities.
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2022-10-11 21:27:18 -04:00 |
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Thomas Harte
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1f19141746
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Eliminate BiggerInt .
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2022-10-11 16:19:47 -04:00 |
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Thomas Harte
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28093196b9
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Convert DIVU/DIVS logic to a template.
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2022-10-11 16:16:53 -04:00 |
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Thomas Harte
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eb206a08d9
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Templatise MULU/MULS.
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2022-10-11 16:02:20 -04:00 |
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Thomas Harte
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b2f005da1b
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Collapse SR/CCR bitwise operations into a template.
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2022-10-11 15:53:11 -04:00 |
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Thomas Harte
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8305a3b46a
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Consolidate compare logic.
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2022-10-11 12:57:02 -04:00 |
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Thomas Harte
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f3f23f90a3
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Consolidate repetition in CLR.
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2022-10-11 11:22:34 -04:00 |
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Thomas Harte
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77bc60bf86
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Consolidate BCLR, BCHG and BSET into a macro.
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2022-10-11 10:47:55 -04:00 |
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Thomas Harte
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ec5d57fefe
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Eliminate 64-bit work.
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2022-10-11 10:33:28 -04:00 |
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Thomas Harte
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58396f0c52
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Perform a prima facie conversion of ADD/SUB[/X] from macros to templates.
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2022-10-10 22:21:13 -04:00 |
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Thomas Harte
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c0377f074f
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Merge pull request #1095 from TomHarte/XcodeUpdate
macOS: enable dead code stripping; allow Xcode 14 to tag.
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2022-09-16 22:05:16 -04:00 |
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Thomas Harte
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4d3221fc55
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Enable dead code stripping; allow Xcode 14 to tag.
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2022-09-16 19:53:36 -04:00 |
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Thomas Harte
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59388230a6
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Record new macOS version number.
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2022-09-16 16:14:59 -04:00 |
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Thomas Harte
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1ba4363802
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Merge pull request #1094 from TomHarte/AppleIIDecoding
Resolve off-by-one error in Apple II sector decoding.
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2022-09-16 16:04:00 -04:00 |
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Thomas Harte
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d17fadbe0b
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Avoid off-by-one error in sector decoding.
Specific issue: retaining the 256 bytes up to _and including_ the checksum, rather than excluding.
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2022-09-16 15:47:38 -04:00 |
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Thomas Harte
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9cba56237d
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Upgrade to constexpr .
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2022-09-16 15:46:09 -04:00 |
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Thomas Harte
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ea9411b21c
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Breakup line, for easier debugging.
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2022-09-16 15:43:23 -04:00 |
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Thomas Harte
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38e85a340a
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Merge pull request #1085 from TomHarte/AppleIISCSI
Support SCSI drives on the Apple II
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2022-09-15 16:52:45 -04:00 |
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Thomas Harte
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fea8fecf11
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Continue DMA requests if writing, even after a phase mismatch.
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2022-09-15 16:46:22 -04:00 |
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Thomas Harte
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c4091a4cdb
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Fix address mapping, implement write.
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2022-09-15 16:39:19 -04:00 |
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Thomas Harte
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d826532031
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Read proper file contents.
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2022-09-15 16:34:20 -04:00 |
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Thomas Harte
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beca7a01c2
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Treat a phase mismatch as ending DMA.
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2022-09-15 16:34:06 -04:00 |
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Thomas Harte
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2d8e260671
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Take a shot at the phase mismatch IRQ.
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2022-09-15 16:24:06 -04:00 |
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Thomas Harte
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04f5d29ed9
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Improve logging, factor out phase_matches per TODO comment.
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2022-09-15 16:14:14 -04:00 |
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Thomas Harte
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5ed60f9153
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Mark get_state as const .
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2022-09-15 16:13:54 -04:00 |
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Thomas Harte
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2f78a1c7af
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Add SCSI controller inclusion logic.
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2022-09-15 12:17:50 -04:00 |
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Thomas Harte
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dc35ec8fa0
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Merge branch 'master' into AppleIISCSI
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2022-09-15 12:05:58 -04:00 |
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Thomas Harte
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7e3dbbbf0a
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Merge pull request #1093 from TomHarte/IIgsFill
Apple IIgs: better spell out shadowing logic.
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2022-09-13 16:45:49 -04:00 |
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Thomas Harte
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0f017302ce
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Fix tests.
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2022-09-13 16:33:44 -04:00 |
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Thomas Harte
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36c3cb1f70
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Deal with pre-ROM03 case, now that it's easy.
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2022-09-13 16:31:06 -04:00 |
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Thomas Harte
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6773a321c1
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Switch to portable direct bitwise logic.
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2022-09-13 16:02:49 -04:00 |
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Thomas Harte
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ffdf44ad4f
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Switch to overt use of std::fill.
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2022-09-13 15:39:17 -04:00 |
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Thomas Harte
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cb7f1e42ff
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Merge pull request #1091 from TomHarte/65816DxDy
Fix 65816 direct, [x/y] addressing when E=1, DL != 0.
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2022-09-09 16:57:10 -04:00 |
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Thomas Harte
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84a6c89a92
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Merge pull request #1092 from TomHarte/68kWarning
Avoid returning without value in release builds.
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2022-09-09 16:54:46 -04:00 |
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Thomas Harte
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451b730c8e
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Avoid returning without value in release builds.
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2022-09-09 16:48:12 -04:00 |
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Thomas Harte
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98d3da62b5
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Apply E mode wrap for d,x and d,y only when DL = 0.
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2022-09-09 16:02:35 -04:00 |
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Thomas Harte
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45dc99fb9d
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Further improve exposition.
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2022-09-09 15:48:25 -04:00 |
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Thomas Harte
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2edbbfbe37
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Merge pull request #1090 from TomHarte/68000Tests
Add 68000 regression test generator.
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2022-09-08 20:10:56 -04:00 |
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Thomas Harte
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dad1d7744e
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Disable test generation.
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2022-09-08 16:41:10 -04:00 |
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Thomas Harte
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de8ce3380c
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Record only 8 bits for byte accesses.
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2022-09-06 20:49:45 -04:00 |
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Thomas Harte
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b848b1389a
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Include gaps in captured transactions, better collect final RAM state.
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2022-09-06 15:08:35 -04:00 |
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Thomas Harte
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2c44ddfa95
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Better bucket, and attempt to cover exceptions.
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2022-09-06 11:26:38 -04:00 |
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Thomas Harte
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72b6ab4389
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Provide a route to operation that factors in addressing mode.
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2022-09-06 11:26:16 -04:00 |
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Thomas Harte
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1a7509e860
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Properly announce ::SameAddress.
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2022-09-05 22:26:45 -04:00 |
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Thomas Harte
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0fe94b2e6d
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Capture ::SameAddress versus ::NewAddress, for TAS recognition.
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2022-09-05 22:26:30 -04:00 |
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Thomas Harte
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93c1f7fc90
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Include prefetch in 68000 state.
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2022-09-05 22:00:04 -04:00 |
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Thomas Harte
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b6da1019bd
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Bucket tests by operation, aim for ~1,000,000 total.
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2022-09-05 21:52:48 -04:00 |
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Thomas Harte
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effe8c102d
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Provide a direct to_string on Operation .
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2022-09-05 21:52:20 -04:00 |
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Thomas Harte
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cee3f78059
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Attempt to output only relevant RAM.
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2022-09-03 15:45:06 -04:00 |
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