Thomas Harte
97a64db5e0
Edges closer towards full x86 recording.
2021-01-08 22:38:56 -05:00
Thomas Harte
86577b772b
Rethinks size; packs all captured information into an x86 Instruction.
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Albeit that operand and displacement are't yet captured. Or extractable.
2021-01-08 22:22:07 -05:00
Thomas Harte
306df7554e
Starts trying to find a good packing for X86 instructions.
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To consider: do I really need `size` on every instruction?
2021-01-08 21:33:01 -05:00
Thomas Harte
30c2c0f050
Attempts to complete operand recognition.
2021-01-07 21:59:00 -05:00
Thomas Harte
205649cac2
Decodes 8e.
2021-01-07 21:36:05 -05:00
Thomas Harte
fd49b72e31
Simplifies macros, implements d0, d1, d2 and d3.
2021-01-07 21:30:01 -05:00
Thomas Harte
995904993d
Fills in 8f, c2, c3, ca and cb.
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Also switches to RETN and RETF for near/far RET as this seems idiomatic.
2021-01-06 21:18:24 -05:00
Thomas Harte
17cbba85fc
Formalises what's missing in terms of opcodes and fills in some blanks.
2021-01-05 21:47:12 -05:00
Thomas Harte
9d7d45338f
Ostensibly gets the instruction stream correct for test case 1.
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Subject to operand and displacement currently being absent, and likely inconsistencies in field population, most of which are omitted from the Instruction anyway.
2021-01-05 21:34:35 -05:00
Thomas Harte
3b55d3f158
Nudges up to a need to decode operation from the ModRegRM byte.
2021-01-05 21:25:12 -05:00
Thomas Harte
fda2293d6b
Improves constness.
2021-01-04 22:36:39 -05:00
Thomas Harte
d4095b1b3b
Merge branch 'master' into DecodersAhoy
2021-01-03 20:56:47 -05:00
Thomas Harte
ed41154338
Merge pull request #862 from MaddTheSane/madds-patch-1
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Madd's improvements
2021-01-03 20:53:39 -05:00
Thomas Harte
38bca5f0f0
Finally runs into the wall of trying to merge operands and offsets.
2021-01-03 20:08:13 -05:00
Thomas Harte
a8738b533a
Switch for now to block-level decoding.
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It's easier to step debug.
2021-01-03 20:07:46 -05:00
Thomas Harte
29cf96c703
Adds decoding of disp16 RETs.
2021-01-03 19:39:28 -05:00
Thomas Harte
782dc3d046
Distinguishes inter- and intra-segment RET.
2021-01-03 19:37:37 -05:00
Thomas Harte
0ae217f51d
Improves exposition, adds decoding of the 0xbx patch of MOVs.
2021-01-03 19:33:16 -05:00
Thomas Harte
adcb2e03e8
Attempts to consolidate source/destination ordering.
2021-01-03 17:28:29 -05:00
Thomas Harte
11b6c1d4b5
Proceeds to three instructions correctly decoded. 'Wow'.
2021-01-03 17:03:50 -05:00
Thomas Harte
367cb1789d
Starts building an x86 test.
2021-01-03 16:37:35 -05:00
Thomas Harte
adf1484ecc
Introduces third test sequence, uneventfully.
2021-01-03 16:21:23 -05:00
Thomas Harte
5401ff6c78
Proactively fixes li sign extension.
2021-01-03 11:14:43 -05:00
Thomas Harte
eb8d0eefd5
Factors out some boilerplate and introduces second sequence.
2021-01-03 11:14:30 -05:00
Thomas Harte
c934e22cee
Introduces a first test of PowerPC decoding.
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Corrected as a result: the bcx conditional, that stdu is 64-bit only, extraction of the li field.
2021-01-02 22:47:42 -05:00
Thomas Harte
1a3effc692
Modifies contract again. This is why I'm doing this now.
2021-01-02 21:19:45 -05:00
Thomas Harte
32c942d154
Muddles drunkenly towards decoding ModRM.
2021-01-02 21:11:19 -05:00
Thomas Harte
9c5dc0ed29
Deferring ModRM work, proceeds to 0x9f.
2021-01-02 19:29:43 -05:00
Thomas Harte
290972cedf
Adds health warning.
2021-01-02 19:16:21 -05:00
Thomas Harte
dc9d370952
Does the easier part of the easier half of 8086 decoding.
2021-01-02 19:16:07 -05:00
Thomas Harte
a41be61f99
Slightly fleshes out models, for a sensible beginning.
2021-01-01 17:36:47 -05:00
Thomas Harte
3d1783ddae
Add exposition as to the purpose of decoders.
2021-01-01 17:32:57 -05:00
Thomas Harte
8151c8e409
Rounds out field list.
2021-01-01 16:38:40 -05:00
Thomas Harte
0ef42f93ff
Further rounds out decoder.
2021-01-01 11:46:26 -05:00
Thomas Harte
d318ab4e70
Edges further onwards.
2020-12-31 21:12:36 -05:00
Thomas Harte
ebfa35c2c7
Conquers another page of instructions; adds supervisor flag.
2020-12-31 18:14:38 -05:00
Thomas Harte
db50b0fe23
Gets started on 6+10 decoding, places stake as to other fields.
2020-12-31 16:51:31 -05:00
Thomas Harte
233a69a1d8
Decodes operations for the simplest 45.
2020-12-31 16:02:52 -05:00
C.W. Betts
3749b7b776
My improvements:
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Use synthesized properties for CSMissingROM.
Remove openGLView from the xib: that will quiet a warning.
Add nullability metadata to CSStaticAnalyser.
2020-12-31 13:23:46 -07:00
Thomas Harte
ed63e7ea75
Starts building out a PowerPC decoder.
2020-12-30 22:55:59 -05:00
Thomas Harte
3d79b11f92
Merge pull request #861 from TomHarte/DiskIIOtherROM
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Ensure proper in-memory ordering of the b72a2c70 ROM.
2020-12-29 22:13:24 -05:00
Thomas Harte
dfe4e49110
Ensure proper in-memory ordering of the b72a2c70 ROM.
2020-12-29 22:08:48 -05:00
Thomas Harte
c5c56f9d05
Mention my manual list sorting.
2020-12-23 11:15:57 -04:00
Thomas Harte
9f0129cab8
Merge pull request #859 from MaddTheSane/gcJoystick
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Initial GameController joystick support.
2020-12-16 21:39:28 -04:00
C.W. Betts
5a48e50355
Use isEqual: to compare GCController when connecting/disconnecting.
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Only remove observers for GCController notifications.
2020-12-14 15:41:11 -07:00
C.W. Betts
86283b1815
Actually write the setup code.
2020-12-14 01:14:40 -07:00
C.W. Betts
a38d964f62
Initial GameController joystick support.
2020-12-13 11:23:33 -07:00
Thomas Harte
2f86d5ebaf
Merge pull request #858 from TomHarte/M1ForLife
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Corrects Metal buffer sizing on Retina displays.
2020-12-09 19:18:56 -05:00
Thomas Harte
b589d6e3ef
Fixes retina-display buffer size.
2020-12-09 18:51:10 -05:00
Thomas Harte
db8b265e80
Enable M1 release builds.
2020-12-09 18:38:14 -05:00
