2756 Commits

Author	SHA1	Message	Date
Thomas Harte	a611a745e7	Switch the Macintosh to 68000 mk2.	2022-05-24 12:35:36 -04:00
Thomas Harte	b0518040b5	Plants the seek of a 68000 mark 2.	2022-05-16 11:44:16 -04:00
Thomas Harte	866b6c6129	Eliminate off_t.	2022-04-27 19:16:37 -04:00
Thomas Harte	efff91ea3d	Undo bad guess at initial switch state.	2022-04-17 17:03:05 -04:00
Thomas Harte	290dd3993b	CPC: ensure 64/128k RAM is properly selected.	2022-03-26 08:54:07 -04:00
Thomas Harte	bfd28a04ba	Remove noise.	2022-03-18 10:41:20 -04:00
Thomas Harte	359ec257c0	Add a further state, seemingly to fix high-res mode.	2022-03-18 08:27:46 -04:00
Thomas Harte	88767e402c	Switch DDFSTART/STOP state machine.	2022-03-17 20:03:36 -04:00
Thomas Harte	e698cbf092	Silence debugging information.	2022-03-13 12:48:05 -04:00
Thomas Harte	f2ce646d8d	Undo 8-cycle-if-met WAIT.	2022-03-13 12:47:48 -04:00
Thomas Harte	acba357df6	Adds empty callouts for all serial port registers.	2021-12-23 15:22:20 -05:00
Thomas Harte	a17c192a9e	Allow chip RAM size selection, while I'm here.	2021-12-22 15:30:19 -05:00
Thomas Harte	1916a9b99c	Remove stdout noise.	2021-12-22 15:22:28 -05:00
Thomas Harte	9796b308dc	Add basic implementation of fast RAM.	2021-12-22 15:17:11 -05:00
Thomas Harte	d0e3024bec	Switch to nibble-oriented lookup tables for fill mode.	2021-12-19 17:16:46 -05:00
Thomas Harte	d2ad149e56	Fill mode always runs right to left.	2021-12-19 16:43:18 -05:00
Thomas Harte	348840a2aa	It's probably a net detriment to use a template in this scenario.	2021-12-19 16:31:44 -05:00
Thomas Harte	3a719633eb	Consolidate interface; correct LOGs.	2021-12-18 19:39:41 -05:00
Thomas Harte	bd69948d37	The Copper can now skip Chipset::perform.	2021-12-18 17:53:11 -05:00
Thomas Harte	54aa211f56	Avoid infinite loops for completely undefined addresses.	2021-12-18 17:48:45 -05:00
Thomas Harte	f118891970	Breaks Chipset::perform into read and write. ... This allows each to call the other when a read occurs of a write-only address, and vice versa.	2021-12-18 17:43:53 -05:00
Thomas Harte	dbae3fc9a5	Propagate to bitplanes immediately; fix odd/even confusion.	2021-12-18 16:37:40 -05:00
Thomas Harte	c834960bfb	Withdraw separate x-and-y guess, make MOVE lose a cycle if a sleep/wake occurs.	2021-12-12 19:18:18 -05:00
Thomas Harte	600abc55b5	Compare x and y separately, wake immediately from a sleep, log more.	2021-12-12 17:26:33 -05:00
Thomas Harte	f3ec7d54bb	Clarifies wait-for-CPU-slot semantics. ... Big bonus: this guarantees `advance_dma`s will be called at most once per output cycle, even if they return `false`.	2021-12-09 19:17:44 -05:00
Thomas Harte	2b0415d552	Attempt to avoid off-by-one buffer reads, add modulation.	2021-12-06 19:28:40 -05:00
Thomas Harte	066e4421e8	Attempt volcntrld.	2021-12-06 06:35:08 -05:00
Thomas Harte	f02a241249	Inserts an additional reload.	2021-12-05 17:47:12 -05:00
Thomas Harte	a5fe1e4259	Largely debugs audio state machine. ... I think I'm still missing an address reload somewhere though, and attachment doesn't actually push.	2021-12-05 15:27:35 -05:00
Thomas Harte	9b80563443	Exposes targets for modulation.	2021-12-05 06:38:55 -05:00
Thomas Harte	91b5da06e3	Perform reload on Disabled -> WaitingForDummyDMA.	2021-12-04 19:17:40 -05:00
Thomas Harte	7320f96ae7	Capture attachment flags.	2021-12-04 18:02:43 -05:00
Thomas Harte	fdf2b9cd7b	Add local data pointers.	2021-12-04 17:58:41 -05:00
Thomas Harte	bfc70a1b60	Ensure interrupt request bits always propagate.	2021-12-04 16:50:42 -05:00
Thomas Harte	aff7a93106	Move DMAFlags to Flags.hpp.	2021-12-04 08:26:28 -05:00
Thomas Harte	3b027c4593	Switch and -> or for testing transitions from ::PlayingLow.	2021-12-04 08:24:41 -05:00
Thomas Harte	42d3bdd373	Adds a begin_state template.	2021-12-04 07:20:17 -05:00
Thomas Harte	57789092c1	Keep audio fetches in bounds.	2021-12-03 07:16:21 -05:00
Thomas Harte	6bc5268cbd	Reload period counter on low -> high transition.	2021-12-02 18:43:02 -05:00
Thomas Harte	e6fe36f45c	Add buffer-length assert; add <tuple> where std::tuple_size is used.	2021-12-02 12:53:20 -05:00
Thomas Harte	06b6f85d55	Correct stereo.	2021-12-02 11:15:29 -05:00
Thomas Harte	d6f1ea50a6	Switch to slightly more straightforward presumption of no data wanted.	2021-12-02 09:41:16 -05:00
Thomas Harte	9554869886	Simplify DMA logic.	2021-12-02 09:33:02 -05:00
Thomas Harte	364059551c	Add extra notes per errata, plus bonus state code repetitions.	2021-12-02 09:30:52 -05:00
Thomas Harte	06340b1ad7	Advance DMA pointer, treat audio as signed, request data on low -> high transition. ... There's now some audio, sometimes when there should be. But it's not correct.	2021-12-01 18:34:54 -05:00
Thomas Harte	d23511860d	Attempts audio output.	2021-12-01 06:01:58 -05:00
Thomas Harte	a8dd4660b2	Adds a pipeline for audio output.	2021-12-01 05:37:58 -05:00
Thomas Harte	eb3a0eb3c7	Attempt full implementation of collisions.	2021-11-29 18:39:33 -05:00
Thomas Harte	cd0148e0bc	Switch to a default 1mb of Chip RAM.	2021-11-29 16:55:45 -05:00
Thomas Harte	8584ee609f	Support a fetch window start on line 0.	2021-11-28 05:37:49 -05:00