6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-03 11:30:02 +00:00
Code Issues Projects Releases Wiki Activity
5,775 Commits 10 Branches 118 Tags 495 MiB
c7a5b054db
Commit Graph

714 Commits

Author SHA1 Message Date
Thomas Harte
c7a5b054db There's no TODO here; overflow is always 0 for a 16x16 multiply. 
... and the original 68000 doesn't support 32x32 multiplies.
 2020-01-03 22:44:19 -05:00
Thomas Harte
2f8078db22 Switches to should_log as a global when I'm hacking about. 2020-01-02 20:15:48 -05:00
Thomas Harte
5be30b1f7b Introduces further comparative tests, prompting a new CHK fix. 
Specifically: how to set N when both is_under and is_over are true, and to eliminate a failure fully to prefetch in the longer addressing modes.
 2020-01-01 19:11:36 -05:00
Thomas Harte
b184426f2b Ensure that an interrupt from a STOP doesn't return to the STOP. 2020-01-01 14:51:47 -05:00
Thomas Harte
1de4f179c0 Adds more thorough comment on the bus program used. 2019-12-25 19:49:49 -05:00
Thomas Harte
3cb5684d95 Fixes RTR: the whole top half of the SR should be preserved. 
Specifically, the 68000 Reference Manual says: "The supervisor portion of the status register is unaffected." Clearly when I first read that I misread it as the supervisor _flag_ (rather than _portion_) should be preserved.
 2019-12-25 19:49:20 -05:00
Thomas Harte
274867579b Deploys constexpr as a stricter const. 2019-12-22 00:22:17 -05:00
Thomas Harte
cf16f41939 Makes value8_high/low and value16 branchless. 2019-12-21 20:58:37 -05:00
Thomas Harte
08f2877382 I think the 68000 actually loads a byte value onto both the upper and lower data lines. 2019-12-21 20:37:03 -05:00
Thomas Harte
a3e64cae41 Corrects SBCD carry. 2019-12-17 22:16:02 -05:00
Thomas Harte
8a2ac87209 Reverted SBCD/NBCD V behaviour. 2019-12-16 23:08:59 -05:00
Thomas Harte
096b447b4b Corrects MOVE -(An), SR/CCR, which was not previously decrementing. 
Also adds a safety check against other instances of the same error. There seem to be none.
 2019-12-16 22:38:54 -05:00
Thomas Harte
84167af54f Corrects CHK N flag. 2019-12-16 20:01:33 -05:00
Thomas Harte
8be26502c4 Fixes NBCD -(An)+, adds some additional comments. 2019-12-16 20:01:19 -05:00
Thomas Harte
4c068e9bb8 Corrects flags on CMPA.w. 2019-12-15 20:39:47 -05:00
Thomas Harte
dc1abd874e Corrects indentation typo. 2019-12-14 23:52:53 -05:00
Thomas Harte
4dd235f677 Adds supervisor/user to logged flags in trace mode. 2019-12-08 22:39:10 -05:00
Thomas Harte
407cc78c78 Extends to offer simpler 8-bit access handling. 2019-12-08 20:19:44 -05:00
Thomas Harte
b12136691a Corrects comment. 2019-11-18 23:46:33 -05:00
Thomas Harte
db03b03276 Corrects [AND/OR/EOR].bw Dn, -(An) to decrement destination. 
It was previously doing a predecrement on the internal source address, which is unused. This fixes at least Dan Dare III and Silkworm.
 2019-11-09 11:25:23 -05:00
Thomas Harte
6afefa107e Resolves unused variable warning. 2019-11-05 23:18:25 -05:00
Thomas Harte
07582cee4a BusGrant is a further signal I will need. 2019-11-03 21:10:42 -05:00
Thomas Harte
a67e0014a4 Fixes video base address and mono/colour monitor value. 
Now I see a GEM desktop. In blue.
 2019-11-02 19:36:15 -04:00
Thomas Harte
c070f2100c Attempts to regularise data bus access. 2019-11-01 23:01:06 -04:00
Thomas Harte
1c154131f9 Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate. 2019-10-29 22:36:29 -04:00
Thomas Harte
ecc0cea5a1 Added a potential branch for the newer TOS memory map. 2019-10-26 16:52:06 -04:00
Thomas Harte
8a14f5d814 Updates to Xcode11 recommended project settings. 
The updated compiler also flagged a potential issue with CPU::Z80::Register not being a namespace re: 'Refresh' versus CPU::Z80::PartialMachineCycle. I don't entirely see it, but this fixes the problem.

I also finally figured out what the compiler was trying to tell me about ROMRequester.xib.
 2019-09-22 12:13:56 -04:00
Thomas Harte
6a80832140 Moves timing of interrupt sampling into prefetch queue advancement. 
As per comment, that is definitely the only place it can occur; I don't know whether it always occurs there.
 2019-08-04 21:06:34 -04:00
Thomas Harte
35b1a55c12 Corrects DIVS negative flag. 2019-08-04 20:36:33 -04:00
Thomas Harte
e3794c0c0e Takes a second pass at DIVS timing, seeming to correct that side of things. 2019-08-04 20:33:43 -04:00
Thomas Harte
478f2533b5 Corrects 68000 address bus during interrupt acknowledge. 
All unused bits should be 1, not 0.
 2019-08-03 15:38:36 -04:00
Thomas Harte
b7b62aa3f6 Resolves some type conversion warnings. 2019-07-26 23:20:40 -04:00
Thomas Harte
5769944918 Shrinks MicroOp struct size from 16 bytes to 4. 2019-07-25 10:14:36 -04:00
Thomas Harte
9ef1211d53 Adds missing header file. 2019-07-24 22:13:32 -04:00
Thomas Harte
f2ae04597f Updates test case. 2019-07-24 22:07:17 -04:00
Thomas Harte
1327de1c82 Slims the Program struct down to 8 bytes total. 2019-07-24 22:02:50 -04:00
Thomas Harte
827c4e172a Cuts a third from the Program struct. 
Observation: [source/destination]_address are always one of the address registers. So you can fit both within a single byte.

Net effect: around a 12% reduction in execution costs, given that this reduces the size of the instructions table from 3mb to 2mb.
 2019-07-24 18:39:36 -04:00
Thomas Harte
c300bd17fa Regularises as many source/destination sets as fit the current setter. 2019-07-24 18:22:44 -04:00
Thomas Harte
0187fd8eae Hides all runtime Program member accesses behind macros. 
... and fixes unit tests.
 2019-07-24 12:01:30 -04:00
Thomas Harte
4aca6c5ef8 Adds a note of admission here. 2019-07-23 23:03:15 -04:00
Thomas Harte
fa226bb1b9 Seeks to reduce enquiry costs. 2019-07-17 15:09:26 -04:00
Thomas Harte
cac97a9663 Devolves drive responsibility. 2019-07-10 22:39:56 -04:00
Thomas Harte
2ccb564a7b Throws some extra logging into place, to test the IWM changeover. 2019-07-10 21:39:45 -04:00
Thomas Harte
ed4ddcfda8 Reduces call/return overhead on Microcycle methods. 2019-07-09 19:55:30 -04:00
Thomas Harte
69b94719a1 Switches to faster bit count logic. 2019-07-09 18:41:20 -04:00
Thomas Harte
5078f6fb5c Marginally reduces MOVE heft. 2019-07-09 18:07:11 -04:00
Thomas Harte
94457d81b6 Eliminates redundant and integer-size-troubling AND on ASL. 2019-07-08 18:33:50 -04:00
Thomas Harte
fb352a8d40 Ensures assert is completely excluded if NDEBUG. 2019-07-08 18:00:37 -04:00
Thomas Harte
b9c2c42bc0 Switches drives to using floats for time counting. 
Hopefully to eliminate a lot of unnecessary `Time` work; inaccuracies should still be within tolerable range.
 2019-07-02 15:43:03 -04:00
Thomas Harte
c4cbe9476c Corrects EA selection logic, fixing MOVEP. 2019-07-02 13:54:21 -04:00