Thomas Harte
426e90eebf
Adds logic to work around Nintendo dependence in the krom tests.
...
Let the real work begin!
2020-11-03 14:18:40 -05:00
Thomas Harte
3889646d6b
Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC.
2020-11-02 21:09:32 -05:00
Thomas Harte
0178aaee2b
Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
...
(Rather than a preserved but ignored top byte)
2020-11-02 18:55:28 -05:00
Thomas Harte
53f60f7c87
Adds some notes for a pending ADB implementation.
2020-11-01 14:49:04 -05:00
Thomas Harte
2da71acefd
Stubs in the ADB GLU.
2020-10-31 21:00:15 -04:00
Thomas Harte
45f5896b76
Stubs video switches into the IIgs.
2020-10-31 20:39:32 -04:00
Thomas Harte
531a3bb7e6
Ensures RAM is zero-initialised, for now, to aid in repeatable bug finding.
2020-10-31 20:03:23 -04:00
Thomas Harte
1b28d929e4
Factors out the Apple II/IIe video switches and mode selection logic.
2020-10-31 20:02:50 -04:00
Thomas Harte
e8943618dc
Adds some extra commentary and distinguishes X/Y sizing from M.
2020-10-31 10:21:13 -04:00
Thomas Harte
1ae2f6f449
PHD and PLD should always be 16-bit; PLP 8-bit.
2020-10-31 09:22:35 -04:00
Thomas Harte
88e26b42f5
Fixed: PHP pushes only 8 bits regardless of mode.
2020-10-30 22:36:00 -04:00
Thomas Harte
03d1aff6c0
Fixes 8-bit read/write.
2020-10-30 22:17:55 -04:00
Thomas Harte
e4459b6256
Adds power-on bit to speed register.
2020-10-30 21:50:39 -04:00
Thomas Harte
2be817a6a1
Maps in "the interrupt ROM addresses".
2020-10-30 21:42:43 -04:00
Thomas Harte
a833bb892b
Increases logging substantially.
2020-10-30 20:11:55 -04:00
Thomas Harte
7f3f6c339f
Corrects stacked program bank during native-mode exceptions.
2020-10-30 20:11:39 -04:00
Thomas Harte
0d562699a2
Ensures unmapped regions are really unmapped.
2020-10-29 22:18:01 -04:00
Thomas Harte
034056d0cd
Adds full 8-bit clock addressing; stubs clock into the IIgs.
2020-10-29 21:38:36 -04:00
Thomas Harte
1249fb598b
Factors Apple's RTC out of the Macintosh.
2020-10-29 21:03:02 -04:00
Thomas Harte
5a8b8478d2
Corrects unhandled IO assert.
...
The IIgs proper is actually waiting on communication with the RTC.
2020-10-28 22:14:02 -04:00
Thomas Harte
6c54699c44
Connects up an SCC.
...
Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
2020-10-28 22:07:34 -04:00
Thomas Harte
266022b193
Fixes PEA.
2020-10-28 22:00:28 -04:00
Thomas Harte
94a6da6b7d
Exposes much of the auxiliary and language card stuff to the IIgs bus.
2020-10-28 21:58:20 -04:00
Thomas Harte
885fae1534
Stubs in a speed register.
2020-10-28 21:23:45 -04:00
Thomas Harte
1df2ce513a
Ensures that reset doesn't push to the stack.
2020-10-28 21:23:35 -04:00
Thomas Harte
1e4679ae14
Corrects JSL
and RTL
.
2020-10-28 17:25:40 -04:00
Thomas Harte
267dd59a59
Gets as far as seemingly yet another memory-map setting.
...
Tomorrow, maybe?
2020-10-27 22:31:58 -04:00
Thomas Harte
0a91ac5af5
Adds some extra notes, starts getting into trying to run the IIgs.
2020-10-27 22:09:45 -04:00
Thomas Harte
ad93ad6018
Attempts to finish off shadowing.
2020-10-27 22:05:04 -04:00
Thomas Harte
0c700094ea
Goes branchless on shadowing.
2020-10-27 21:56:03 -04:00
Thomas Harte
20631a157b
Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage.
2020-10-27 21:37:39 -04:00
Thomas Harte
bdda84dfde
Adds a very basic shadowing test.
...
For the record, I'm aware that there's a lot here that I'm not testing. I think the smart move is to get towards a running machine and see which configurations it actually tries to set up, then follow along with appropriate testing; it might cause me to discover a flaw in my comprehension before I've made the same mistake in both the code and a test.
2020-10-27 19:59:41 -04:00
Thomas Harte
e44f95a882
Takes a first, faltering shot at shadowing.
2020-10-27 19:49:47 -04:00
Thomas Harte
31cd45f8b5
Takes a run at set_card_paging and simplifies method of shadowing.
2020-10-27 19:33:47 -04:00
Thomas Harte
74f9f6ad3b
Tests and corrects ROM access beyond bank $00.
2020-10-27 19:02:15 -04:00
Thomas Harte
1dfdb51e61
Hits a few other easy cases.
...
Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
2020-10-26 21:49:47 -04:00
Thomas Harte
18832dc19d
Attempts to expand the language card stuff to all affected pages.
2020-10-26 20:30:41 -04:00
Thomas Harte
3dee0666cb
Corrects current bank $00 language card behaviour.
2020-10-26 17:46:40 -04:00
Thomas Harte
f830f6a57a
Adds failing test of initial ROM mirroring.
...
It's the end of the evening, so this is it for today.
2020-10-25 22:13:54 -04:00
Thomas Harte
82c733c68c
Adds some very basic actual tests.
2020-10-25 21:40:50 -04:00
Thomas Harte
ed510409c4
Starts memory map test class, already finding a typo.
2020-10-25 21:31:21 -04:00
Thomas Harte
7614eba4bf
Factors out the IIgs memory map logic.
...
As testing would be rational.
2020-10-25 21:10:04 -04:00
Thomas Harte
13c8032465
ROM isn't writeable. The clue is in the name.
2020-10-25 18:29:17 -04:00
Thomas Harte
44fc08cd5b
Switches to a mapping system that supports non-continuous regions, and is smaller.
2020-10-25 18:28:32 -04:00
Thomas Harte
7631b11c55
Corrects double low-res colour serialisation.
2020-10-24 19:26:32 -04:00
Thomas Harte
726b5f62bb
Corrects read/write access to auxiliary soft switches.
2020-10-24 19:00:03 -04:00
Thomas Harte
ddd84db510
Edges towards a functioning IIgs memory map.
...
Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
2020-10-23 19:41:10 -04:00
Thomas Harte
966241b4cc
Adds documentation, ensures the language card signals less noisily.
2020-10-23 18:44:47 -04:00
Thomas Harte
9371a8993f
Factors out auxiliary memory switches and related decisions.
2020-10-22 22:33:31 -04:00
Thomas Harte
410c99de54
Factors out the language card memory selection logic.
2020-10-22 21:01:12 -04:00