Thomas Harte
aa478cd222
Stops trying to force bit ID into the addressing mode.
2021-01-19 21:51:01 -05:00
Thomas Harte
c78c121159
Succeeds at executing a single instruction.
2021-01-18 20:16:01 -05:00
Thomas Harte
e71e506883
This assert is redundant; not worth an extra #include.
2021-01-18 17:56:40 -05:00
Thomas Harte
a601ac0cab
Corrects performer population, lookup, calls.
2021-01-18 17:53:14 -05:00
Thomas Harte
9b92753e0a
In theory this should 'execute' up to the first unconditional branch.
...
Where execution means: do very little.
2021-01-18 17:11:11 -05:00
Thomas Harte
ec0018df79
Routes in the ADB keyboard ROM. This should get as far as parsing.
2021-01-18 16:59:49 -05:00
Thomas Harte
8b19c523cf
Starts to bend towards getting some performers in motion.
2021-01-18 16:45:52 -05:00
Thomas Harte
5ace61f9b9
Continues walking very slowly towards cached execution.
2021-01-18 11:20:45 -05:00
Thomas Harte
8a74f5911c
Minor reorganisation to finish the day.
2021-01-17 21:56:15 -05:00
Thomas Harte
4982430a29
Takes a run at most of the remaining addressing modes.
2021-01-17 21:52:16 -05:00
Thomas Harte
dea79c6dea
Adds missing #include.
2021-01-17 20:56:22 -05:00
Thomas Harte
ad03858c6e
Switches performers to member functions. Very slightly starts work on M50740 performers.
2021-01-17 20:53:11 -05:00
Thomas Harte
54b26c7991
Bends to using 8-bit lookups for M50740 instructions.
2021-01-17 20:03:36 -05:00
Thomas Harte
17c3a3eb4b
Seeks to switch to maintaining a bank of performers.
...
My thinking here is that for really simple processors there'll be 256 or less, meaning that they can be stored by simple uint8_t; for every other processor I can currently think of it'll likely be uint16_t.
Either way, that's a much better outcome than using plain pointers, which on architectures I currently build for will always be 8 bytes. For the simple processors I can get eight times as much into the cache; for the others four times.
2021-01-17 19:38:23 -05:00
Thomas Harte
5f413a38df
Switches all American-style dates.
...
I'd failed to configure my new computer appropriately, it seems.
2021-01-16 22:09:19 -05:00
Thomas Harte
8860d0ff51
Starts to establish the CachingExecutor.
2021-01-16 22:06:16 -05:00
Thomas Harte
8bd471fa3c
Corrects recursive call.
2021-01-16 21:50:48 -05:00
Thomas Harte
cd6ac51aa6
Muddles along to generating functions.
...
Albeit right now without a body.
2021-01-16 21:45:44 -05:00
Thomas Harte
10caa1a1fb
Steps gingerly towards execution.
2021-01-16 20:51:02 -05:00
Thomas Harte
722e0068ca
Adds additional exposition.
2021-01-16 20:10:20 -05:00
Thomas Harte
8f2eea8819
Corrects AccessType::Read.
2021-01-16 20:04:48 -05:00
Thomas Harte
3b2d65fa16
Adds access type declaration.
2021-01-16 20:04:01 -05:00
Thomas Harte
3dc36b704a
Starts on the next piece: parsers.
2021-01-16 19:54:40 -05:00
Thomas Harte
37a20e125c
Completes the M50740 decoder.
...
Completely untested.
2021-01-15 22:47:52 -05:00
Thomas Harte
2910faf963
Adds missing #include.
2021-01-15 22:33:14 -05:00
Thomas Harte
321e10fffb
Adds 'InstructionSets' to the SDL and Qt projects.
2021-01-15 22:30:02 -05:00
Thomas Harte
1acb8c3c42
Completes the opcode map.
2021-01-15 22:24:37 -05:00
Thomas Harte
f667dd223f
Advances to 50% of the opcode map.
2021-01-15 22:05:34 -05:00
Thomas Harte
e0d90f69ec
Fills in the first quarter of the opcode map.
2021-01-15 21:58:46 -05:00
Thomas Harte
d82187bee2
Decides to shove bit number into AddressingMode.
2021-01-15 21:50:05 -05:00
Thomas Harte
3c20e1f037
Adds files for the M50740 and corrects namespace errors elsewhere.
2021-01-15 21:30:30 -05:00
Thomas Harte
15bedc74d4
Merge branch 'master' into AppleIIgs
2021-01-15 21:15:10 -05:00
Thomas Harte
4bd6ffa9e4
Merge pull request #863 from TomHarte/DecodersAhoy
...
Sketches out the concept of a `Decoder`
2021-01-15 21:14:49 -05:00
Thomas Harte
9c2c918760
Better sorts by function, corrects TEST description.
2021-01-15 21:07:02 -05:00
Thomas Harte
47d20699d8
Completes list, ensures POP acts as documented.
2021-01-15 20:48:31 -05:00
Thomas Harte
e8ce70dccb
Chips further away at documentation.
2021-01-15 18:52:59 -05:00
Thomas Harte
fa4938f29c
Establishes the reason I'm sort-of documenting these.
2021-01-15 18:27:55 -05:00
Thomas Harte
ddb4bb1421
Better plans project layout.
2021-01-15 18:16:01 -05:00
Thomas Harte
ca94e9038e
Introduces 'far' test, fixes parsing.
2021-01-14 22:15:38 -05:00
Thomas Harte
2c72a77a25
Adds byte-by-byte decoder test; corrects divergences.
2021-01-13 21:51:18 -05:00
Thomas Harte
8c0e06e645
Adds a test for 0x83 and fixes sign extension.
...
ODA doesn't seem to accept 0x82, but testing 0x83 adds some confidence.
2021-01-13 20:42:21 -05:00
Thomas Harte
a24ae727a7
Takes a run at 0x82 and 0x83, completing the set.
2021-01-13 20:29:44 -05:00
Thomas Harte
5058a8b96a
Completes the first test stream.
...
... and improves decoding consistency in conjunction.
2021-01-12 21:49:22 -05:00
Thomas Harte
762ecab3aa
Adds operand/displacement capture.
...
This gets unit test as far as a disagreement over how to handle bad 0xc4 suffixes.
2021-01-10 22:55:25 -05:00
Thomas Harte
9ba5b7c1d4
Adds a few more asserts.
...
It's still just operands and displacements failing, which is nice.
2021-01-08 23:21:01 -05:00
Thomas Harte
5f807b6e47
Ensures that the operand is the only thing failing in decoding of the first instruction.
2021-01-08 23:02:06 -05:00
Thomas Harte
718f950071
Implements 80 and 81.
2021-01-08 22:50:59 -05:00
Thomas Harte
68fe16a092
Marks intent for operand/displacement.
2021-01-08 22:45:27 -05:00
Thomas Harte
97a64db5e0
Edges closer towards full x86 recording.
2021-01-08 22:38:56 -05:00
Thomas Harte
86577b772b
Rethinks size; packs all captured information into an x86 Instruction.
...
Albeit that operand and displacement are't yet captured. Or extractable.
2021-01-08 22:22:07 -05:00
