Thomas Harte
d805e9a8f0
Actually, octave probably works this way around? Higher octaves = higher frequencies.
2020-04-14 21:39:12 -04:00
Thomas Harte
aa45142728
Endeavours to fix attenuation and add FM synthesis.
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I now definitely think my frequency counting is wrong.
2020-04-14 18:32:06 -04:00
Thomas Harte
09d1aed3a5
Attempts to voice the current attenuation (and, therefore, the ADSR output), even if linearly rather than logarithmically.
2020-04-13 22:12:55 -04:00
Thomas Harte
a1f80b5142
Takes a stab at per-operator ADSR.
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Heavy caveats apply: no KSR is applied, non-ADSR attenuation isn't applied, attenuation isn't voiced in general.
2020-04-13 21:39:06 -04:00
Thomas Harte
cb1970ebab
Switch to more compact form of output for bool.
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This also will hopefully deal with GCC's slightly confused claim that 'value' may be used without having been initialised down at #define OutputIntC (i.e. after it's out of scope, but I can sort of see why GCC might get confused while it remains in scope).
2020-04-12 14:40:32 -04:00
Thomas Harte
d3fbdba77c
Add missing #include.
2020-04-12 14:20:02 -04:00
Thomas Harte
632d797c9d
Adjusts frequency formula. This could be close.
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I guess next I need to get ADSR/volume in general working, before I can go FM? Then I'll worry about using the proper log-sin/exp tables.
2020-04-12 14:15:09 -04:00
Thomas Harte
559a2d81c1
Baby step: starts trying to output the raw FM carrier, no modulation, no ADSR.
2020-04-12 12:46:40 -04:00
Thomas Harte
7a5f23c0a5
Adds accommodations for the OPLL.
2020-04-10 22:05:22 -04:00
Thomas Harte
84b115f15f
Attempts to move forward in defining what the parts of an OPL are meant to do.
2020-04-10 19:13:52 -04:00
Thomas Harte
a0d14f4030
Starts trying to make sense of the various fields at play.
2020-04-08 23:15:44 -04:00
Thomas Harte
dd6769bfbc
Splits OPLL and OPL2 classes.
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Logic is: they have different mixers (additive in the OPL2, time-division multiplexing in the OPLL) as well as different register sets. So I'll put operator and channel logic directly into those structs.
2020-04-07 23:15:26 -04:00
Thomas Harte
027af5acca
Allow LFSR to be instantiated with a given value.
2020-04-05 22:58:09 -04:00
Thomas Harte
db4b71fc9a
Adds correct LSFR, something of OPLL -> OPL2 logic.
2020-04-05 22:57:53 -04:00
Thomas Harte
d9e41d42b5
Adds the OPL2 to SConstruct.
2020-04-05 21:34:19 -04:00
Thomas Harte
0ed7d257e1
Add some extra notes, implement correct mapping to only 18 operators. Not 22.
2020-04-05 14:32:55 -04:00
Thomas Harte
335a68396f
Attempts to complete OPL2 register decoding.
2020-04-04 23:39:09 -04:00
Thomas Harte
84cdf6130f
Starts at least trying to decode OPL2 register writes.
2020-04-04 23:29:25 -04:00
Thomas Harte
b0abc4f7bb
Implements enough wiring that the Master System will instantiate and talk to an OPLL.
2020-04-03 20:05:36 -04:00
Thomas Harte
ab81d1093d
Merge pull request #782 from TomHarte/6502Tidy
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Makes `State`, and therefore the 'Reflection' dependency, an optional adjunct to the 6502.
2020-04-02 20:49:18 -04:00
Thomas Harte
e4d4e4e002
Adds 6502 State to the SConstruct file.
...
On the assumption I'll actually use it at some point.
2020-04-02 19:16:22 -04:00
Thomas Harte
cc357a6afa
Removes boilerplate from header.
2020-04-02 19:15:57 -04:00
Thomas Harte
dfc1c7d358
Separates 6502 State object to make it optional.
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Also makes a few minor const improvements while I'm poking around.
2020-04-02 19:11:27 -04:00
Thomas Harte
7ed8e33622
Eliminates unused 6502 counter.
2020-04-02 18:49:28 -04:00
Thomas Harte
474822e83d
Merge pull request #781 from TomHarte/NoMoreCRTMachine
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Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine.
2020-04-02 09:46:54 -04:00
Thomas Harte
fe3942c5b3
Updates comments.
2020-04-01 23:49:07 -04:00
Thomas Harte
f417fa82a4
Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine.
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Simultaneously cleans up some of the naming conventions and tries to make things a bit more template-compatible.
2020-04-01 23:19:34 -04:00
Thomas Harte
c4b114133a
Merge pull request #779 from TomHarte/6502State
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Provisionally adds `State` and `get/set_state` to the 6502.
2020-03-31 21:05:29 -04:00
Thomas Harte
2f4b0c2b9a
Removes non-functional assert.
2020-03-30 21:48:07 -04:00
Thomas Harte
a491650c8b
Adds safety asserts.
2020-03-30 21:39:31 -04:00
Thomas Harte
6805acd74f
Adds padding for all integer types.
2020-03-30 00:31:25 -04:00
Thomas Harte
95c68c76e1
Corrects use of StructImpl.
2020-03-30 00:27:40 -04:00
Thomas Harte
60aa383c95
Makes a not-quite-correct attempt at a .description for reflective structs.
2020-03-30 00:24:49 -04:00
Thomas Harte
edc553fa1d
Removes duplicative 'register'.
2020-03-29 22:58:00 -04:00
Thomas Harte
4f2ebad8e0
Takes a shot a set_state.
2020-03-29 22:50:30 -04:00
Thomas Harte
1810ef60be
Adds --fix-missing in the hope of catching more issues automatically.
2020-03-29 18:41:30 -04:00
Thomas Harte
f720a6201b
Adds explicit type cast.
2020-03-29 18:36:57 -04:00
Thomas Harte
cfb75b58ca
Pulls all 6502 MicroOp sequences into the main operations_ table.
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This will make state restoration somewhat more tractable.
2020-03-29 18:36:41 -04:00
Thomas Harte
4fbe983527
Provisionally adds State
and get_state
to the 6502.
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`set_state` may be a little more complicated, requiring a way to advance in single-cycle steps **without applying bus accesses**.
2020-03-28 00:33:27 -04:00
Thomas Harte
272383cac7
Merge pull request #778 from TomHarte/AppleIIDisks
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Resolves a potential crash with NIB files
2020-03-25 21:52:26 -04:00
Thomas Harte
39380c63cb
Throws in some consts.
2020-03-25 21:25:50 -04:00
Thomas Harte
ea26f4f7bf
Eliminates test code, adds a caveat.
2020-03-25 21:22:30 -04:00
Thomas Harte
5fd2be3c8e
Makes a genuine attempt at five and three decoding.
2020-03-25 20:50:26 -04:00
Thomas Harte
2320b5c1fe
Takes some steps towards five-and-three decoding.
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Now I 'just' need to figure out how bits are distributed within the decoded sector. The XORing and data checksum seem the same (?)
2020-03-25 00:15:31 -04:00
Thomas Harte
e5cbdfc67c
It turns out that 5-and-3 disks have a different header prologue.
2020-03-24 21:59:55 -04:00
Thomas Harte
894d196b64
Avoids massive overallocation where sync blocks overlap the index hole.
2020-03-24 21:34:33 -04:00
Thomas Harte
af037649c3
Merge pull request #777 from TomHarte/ShowCRCs
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Show CRC32s of missing ROMs.
2020-03-23 21:33:10 -04:00
Thomas Harte
cfca3e2507
Adds missing header for std::setw, std::set fill.
2020-03-23 21:26:50 -04:00
Thomas Harte
7a12a0149a
Ensures BIOS is really not paged if not loaded.
2020-03-23 20:00:31 -04:00
Thomas Harte
fcdc1bfbd0
Prints the CRC32(s) of any missing ROMs.
2020-03-23 20:00:13 -04:00