Commit Graph

74 Commits

Author SHA1 Message Date
Adrian Conlon
b22d7e47e5 Addressing mode simplifications 2024-03-14 14:54:52 +00:00
Adrian Conlon
8e0092ec9d Tidy up noexcept specification 2022-01-17 19:10:15 +00:00
Adrian Conlon
cea3fd47af Lots of reworking of the 6809 core, still looking for the FP bug. 2021-12-08 19:49:05 +00:00
Adrian Conlon
22506ea56c Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting...
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2021-07-18 14:28:40 +01:00
Adrian Conlon
e9900424b7 6809: Start moving away from macro based read/modify/write implementation
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-12-28 18:37:21 +00:00
Adrian Conlon
7296ff7cce MC6809 tidy a few items and show a "functional" (rather than macro based) rmw routine. 2020-04-06 23:08:11 +01:00
Adrian Conlon
ff02159886 MC6809: Add a cycle eater routine.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-04-04 12:27:26 +01:00
Adrian Conlon
d4e6e13fde First stab at cycle accurate 6809
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-04-03 10:13:42 +01:00
Adrian Conlon
d0467421ff Improve compatibility with .net emulator code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-11-09 18:58:23 +00:00
Adrian Conlon
ee3ecc682d Add R/W pins to the MC6809 and MOS6502 processors. Hoping it'll ease peripheral development.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-09-15 12:49:32 +01:00
Adrian Conlon
254cfbe342 Tidied up pin management to be synchronised with the .Net code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-09-06 23:55:57 +01:00
Adrian Conlon
f0376fa81e Use macros to define our device pins.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-14 23:17:54 +00:00
Adrian Conlon
92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-14 02:10:17 +00:00
Adrian Conlon
68030610d8 Move to an event driven clock tick event for all CPUs
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-09 23:24:33 +00:00
Adrian Conlon
a13ad5042a Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-06 11:27:43 +00:00
Adrian Conlon
f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-12-29 19:17:36 +00:00
Adrian Conlon
dc477cd050 Use explicit enumeration types (improves type safety) where appropriate.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-12-01 15:24:29 +00:00
Adrian Conlon
deb9a6d43c Correct more analysis problems. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-28 21:27:14 +00:00
Adrian Conlon
e156b1ff1a Correct some more compilation warnings (across the whole EightBit project).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-25 19:02:11 +00:00
Adrian Conlon
b926f4b7f1 Simplify 6809 conditionals a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-10 20:31:14 +00:00
Adrian Conlon
4dc0becb74 Refactor the 6502 implementation to be a lot more like the MC6809. Hopefully show bugs in the latter a little more easily.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-31 23:29:13 +00:00
Adrian Conlon
1a317c7907 C++14/17 refactoring for MC6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-27 21:55:54 +01:00
Adrian Conlon
83497b0b9e Share some implementation details on the MC6809, where possible. Somewhat closer to how I imagine the hardware is implemented...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-18 22:25:52 +01:00
Adrian Conlon
4b2f8e3599 Correct "LE" definition to at least match the MC6809 documentation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-17 20:39:58 +01:00
Adrian Conlon
4e48f4a5a0 Slightly simplify half-carry evaluation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-14 23:18:13 +01:00
Adrian Conlon
0c07d39250 Share (hopefully!) correct overflow implementations
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-14 21:19:03 +01:00
Adrian Conlon
707a742899 Not complete, but this gets large chunks of the MC6809 addition and subtraction parts of the emulator working correctly
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-14 20:40:20 +01:00
Adrian Conlon
5dc185866e Add a test for ADCA immediate. Half carry and overflow flags incorrect!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-10-07 09:14:30 +01:00
Adrian Conlon
d45401d9b1 Tidy a couple of MC6809 niggles:
1) Move the stdafx.h to the correct place (out of the include search path)
2) Simplify long branch extra cycle handling
3) Rename derived flag handling, to remove B prefix
4) Make interrupt mask flag handling a little easier to read

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-22 10:54:05 +01:00
Adrian Conlon
7c03521025 Refactor plsu/s pshu/s to share code more easily
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-21 00:28:08 +01:00
Adrian Conlon
c85176431b Refactor 6809 jsr/rts code a little. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-29 14:03:24 +01:00
Adrian Conlon
50826d36b6 Add a little pin documentation to the 6809 processor.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-26 19:02:41 +01:00
Adrian Conlon
dc6803a5b6 Whoops: powerOn should always be public (6809)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-26 17:27:50 +01:00
Adrian Conlon
ef5e325b6d Tidy 6809 header file usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-26 13:07:26 +01:00
Adrian Conlon
ab78ba5db0 Start adding definition of BA/BS flags.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 14:55:57 +01:00
Adrian Conlon
c105ee37bf Have a stab at sorting out processor pin handling.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 12:09:26 +01:00
Adrian Conlon
6d4223c368 Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 01:34:30 +01:00
Adrian Conlon
f8097af5a4 Whoops: correct overly enthusiastic shift on the 6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 12:57:04 +01:00
Adrian Conlon
adb6433737 Easier to read flag handling in the 6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 12:30:16 +01:00
Adrian Conlon
21e8360dc1 First stab at interrupt handling on the 6809 processor.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 12:14:14 +01:00
Adrian Conlon
1eb59279a8 Remove unneeded powerOn override from the 6809 processor.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 10:54:16 +01:00
Adrian Conlon
57928602d5 Tidy instruction prefixing in the 6809, such that executed/ing instruction events fire correctly.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 10:49:13 +01:00
Adrian Conlon
a43b1109bc Add TST instruction to the 6809 processor
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 00:33:18 +01:00
Adrian Conlon
c7ca555995 Add various SUB/SBC instructions to the 6809 processor
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-24 00:14:44 +01:00
Adrian Conlon
722e7b89c2 Add implementation of ST instruction for the 6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-23 23:09:19 +01:00
Adrian Conlon
1e32514e1d Implement SEX/SWI/SWI2/SWI3/SYNC/TFR instructions for the 6809
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-23 14:09:46 +01:00
Adrian Conlon
e555fe335f Whoops: correct return values of 6809 branch helpers.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-23 09:32:37 +01:00
Adrian Conlon
4703b89a42 First stab at 6809 branching
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-22 23:06:36 +01:00
Adrian Conlon
10684a02f4 Add RTI/RTS instructions to the 6809 processor
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-22 10:21:22 +01:00
Adrian Conlon
07248972bf Add implementations of ROL/ROR for the 6809 processor
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-22 09:11:02 +01:00