2012-02-18 12:03:15 +00:00
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//===-- PPCRegisterInfo.h - PowerPC Register Information Impl ---*- C++ -*-===//
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2005-04-21 23:30:14 +00:00
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//
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2004-08-17 04:55:41 +00:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-21 23:30:14 +00:00
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//
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2004-08-17 04:55:41 +00:00
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//===----------------------------------------------------------------------===//
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//
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2008-02-10 18:45:23 +00:00
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// This file contains the PowerPC implementation of the TargetRegisterInfo
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// class.
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2004-08-17 04:55:41 +00:00
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC32_REGISTERINFO_H
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#define POWERPC32_REGISTERINFO_H
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2005-10-14 23:51:18 +00:00
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#include "PPC.h"
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2004-08-17 04:55:41 +00:00
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#include <map>
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2011-06-27 18:32:37 +00:00
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#define GET_REGINFO_HEADER
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#include "PPCGenRegisterInfo.inc"
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2004-08-17 04:55:41 +00:00
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namespace llvm {
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2006-07-11 00:48:23 +00:00
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class PPCSubtarget;
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2006-11-27 23:37:22 +00:00
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class TargetInstrInfo;
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2004-08-17 04:55:41 +00:00
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class Type;
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2005-10-16 05:39:50 +00:00
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class PPCRegisterInfo : public PPCGenRegisterInfo {
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2004-08-17 04:55:41 +00:00
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std::map<unsigned, unsigned> ImmToIdxMap;
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2006-07-11 00:48:23 +00:00
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const PPCSubtarget &Subtarget;
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2006-11-13 23:36:35 +00:00
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const TargetInstrInfo &TII;
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2012-09-12 14:47:47 +00:00
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mutable int CRSpillFrameIdx;
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2004-08-17 04:55:41 +00:00
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public:
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2006-11-13 23:36:35 +00:00
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PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
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2006-04-17 21:07:20 +00:00
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2009-02-06 17:43:24 +00:00
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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2012-05-07 22:10:26 +00:00
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virtual const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const;
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2009-02-06 17:43:24 +00:00
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2011-11-22 16:21:04 +00:00
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const;
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2004-08-17 04:55:41 +00:00
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/// Code Generation virtual methods...
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2012-03-04 03:33:22 +00:00
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const uint16_t *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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2012-09-16 18:10:23 +00:00
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const uint32_t *getCallPreservedMask(CallingConv::ID CC) const;
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2006-05-18 00:12:58 +00:00
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2007-02-19 21:49:54 +00:00
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BitVector getReservedRegs(const MachineFunction &MF) const;
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2012-06-19 13:57:17 +00:00
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virtual bool avoidWriteAfterWrite(const TargetRegisterClass *RC) const;
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2008-03-03 22:19:16 +00:00
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/// requiresRegisterScavenging - We require a register scavenger.
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/// FIXME (64-bit): Should be inlined.
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bool requiresRegisterScavenging(const MachineFunction &MF) const;
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2012-04-23 21:39:35 +00:00
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const;
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2004-08-17 04:55:41 +00:00
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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2008-03-03 22:19:16 +00:00
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void lowerDynamicAlloc(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS) const;
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void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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2011-12-06 20:55:36 +00:00
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void lowerCRRestore(MachineBasicBlock::iterator II, unsigned FrameIndex,
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int SPAdj, RegScavenger *RS) const;
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2012-09-12 14:47:47 +00:00
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bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
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int &FrameIdx) const;
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2010-08-26 23:32:16 +00:00
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS = NULL) const;
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2004-08-17 04:55:41 +00:00
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2006-03-28 13:48:33 +00:00
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// Debug information queries.
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2009-11-12 21:00:03 +00:00
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unsigned getFrameRegister(const MachineFunction &MF) const;
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2007-02-21 22:54:50 +00:00
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// Exception handling queries.
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unsigned getEHExceptionRegister() const;
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unsigned getEHHandlerRegister() const;
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2004-08-17 04:55:41 +00:00
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};
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} // end namespace llvm
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#endif
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