2007-06-06 07:42:06 +00:00
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//===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2007-06-06 07:42:06 +00:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format MIPS assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mips-asm-printer"
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#include "Mips.h"
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2008-07-14 14:42:54 +00:00
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#include "MipsSubtarget.h"
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2007-06-06 07:42:06 +00:00
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#include "MipsInstrInfo.h"
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#include "MipsTargetMachine.h"
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2007-07-11 23:24:41 +00:00
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#include "MipsMachineFunction.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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2009-02-18 23:12:06 +00:00
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#include "llvm/CodeGen/DwarfWriter.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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2007-07-11 23:24:41 +00:00
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#include "llvm/CodeGen/MachineFrameInfo.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/CodeGen/MachineInstr.h"
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2009-08-19 05:49:37 +00:00
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#include "llvm/MC/MCStreamer.h"
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2009-08-22 20:48:53 +00:00
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#include "llvm/MC/MCAsmInfo.h"
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2009-09-13 17:14:04 +00:00
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#include "llvm/MC/MCSymbol.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/Target/TargetData.h"
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2009-07-28 03:13:23 +00:00
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#include "llvm/Target/TargetLoweringObjectFile.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/Target/TargetMachine.h"
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2007-11-12 19:49:57 +00:00
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#include "llvm/Target/TargetOptions.h"
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2009-07-15 20:24:03 +00:00
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#include "llvm/Target/TargetRegistry.h"
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2009-07-08 19:04:27 +00:00
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#include "llvm/Support/ErrorHandling.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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2007-07-11 23:24:41 +00:00
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#include "llvm/Support/Debug.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/Support/CommandLine.h"
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2009-07-14 20:18:05 +00:00
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#include "llvm/Support/FormattedStream.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/Support/MathExtras.h"
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#include <cctype>
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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2009-10-25 06:33:48 +00:00
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class MipsAsmPrinter : public AsmPrinter {
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2008-07-14 14:42:54 +00:00
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const MipsSubtarget *Subtarget;
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2009-02-24 08:30:20 +00:00
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public:
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2009-07-15 20:24:03 +00:00
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explicit MipsAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
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2009-08-22 20:48:53 +00:00
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const MCAsmInfo *T, bool V)
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2009-07-01 01:48:54 +00:00
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: AsmPrinter(O, TM, T, V) {
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2008-07-14 14:42:54 +00:00
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Subtarget = &TM.getSubtarget<MipsSubtarget>();
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}
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2007-06-06 07:42:06 +00:00
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virtual const char *getPassName() const {
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return "Mips Assembly Printer";
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}
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2008-08-02 19:42:36 +00:00
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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2007-06-06 07:42:06 +00:00
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void printOperand(const MachineInstr *MI, int opNum);
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2008-08-13 07:13:40 +00:00
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void printUnsignedImm(const MachineInstr *MI, int opNum);
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2007-06-06 07:42:06 +00:00
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void printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future inclusion of features easier. Among new features,
we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
integer
and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
return copy, no homing location within EABI, non 32-bit stack objects
arguments, and asm constraint for float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-05 19:05:21 +00:00
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void printFCCOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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2008-08-06 06:14:43 +00:00
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void printSavedRegsBitmask(MachineFunction &MF);
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2007-07-11 23:24:41 +00:00
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void printHex32(unsigned int Value);
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2007-08-28 05:06:17 +00:00
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2009-08-12 22:10:57 +00:00
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const char *emitCurrentABIString();
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2007-10-09 03:01:19 +00:00
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void emitFunctionEnd(MachineFunction &MF);
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2007-07-11 23:24:41 +00:00
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void emitFrameDirective(MachineFunction &MF);
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2008-07-19 13:16:11 +00:00
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2009-08-08 01:32:19 +00:00
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void printInstruction(const MachineInstr *MI); // autogenerated.
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2009-09-13 20:19:22 +00:00
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static const char *getRegisterName(unsigned RegNo);
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2009-09-13 20:08:00 +00:00
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2007-06-06 07:42:06 +00:00
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bool runOnMachineFunction(MachineFunction &F);
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2010-01-27 23:23:58 +00:00
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virtual void EmitFunctionEntryLabel();
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2009-09-30 22:06:26 +00:00
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void EmitStartOfAsmFile(Module &M);
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2007-06-06 07:42:06 +00:00
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};
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} // end of anonymous namespace
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#include "MipsGenAsmWriter.inc"
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2007-08-28 05:06:17 +00:00
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//===----------------------------------------------------------------------===//
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//
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// Mips Asm Directives
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//
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// -- Frame directive "frame Stackpointer, Stacksize, RARegister"
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// Describe the stack frame.
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//
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// -- Mask directives "(f)mask bitmask, offset"
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// Tells the assembler which registers are saved and where.
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// bitmask - contain a little endian bitset indicating which registers are
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// saved on function prologue (e.g. with a 0x80000000 mask, the
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// assembler knows the register 31 (RA) is saved at prologue.
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// offset - the position before stack pointer subtraction indicating where
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// the first saved register on prologue is located. (e.g. with a
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//
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// Consider the following function prologue:
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//
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2008-02-27 06:33:05 +00:00
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// .frame $fp,48,$ra
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// .mask 0xc0000000,-8
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// addiu $sp, $sp, -48
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// sw $ra, 40($sp)
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// sw $fp, 36($sp)
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2007-08-28 05:06:17 +00:00
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//
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// With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
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// 30 (FP) are saved at prologue. As the save order on prologue is from
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// left to right, RA is saved first. A -8 offset means that after the
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// stack pointer subtration, the first register in the mask (RA) will be
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// saved at address 48-8=40.
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//
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//===----------------------------------------------------------------------===//
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2007-07-11 23:24:41 +00:00
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2008-07-14 14:42:54 +00:00
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//===----------------------------------------------------------------------===//
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// Mask directives
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//===----------------------------------------------------------------------===//
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2008-08-06 06:14:43 +00:00
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// Create a bitmask with all callee saved registers for CPU or Floating Point
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// registers. For CPU registers consider RA, GP and FP for saving if necessary.
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2007-07-11 23:24:41 +00:00
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void MipsAsmPrinter::
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2008-08-06 06:14:43 +00:00
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printSavedRegsBitmask(MachineFunction &MF)
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2007-08-28 05:06:17 +00:00
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{
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2008-02-10 18:45:23 +00:00
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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2008-08-06 06:14:43 +00:00
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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2007-08-28 05:06:17 +00:00
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2008-08-06 06:14:43 +00:00
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// CPU and FPU Saved Registers Bitmasks
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unsigned int CPUBitmask = 0;
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unsigned int FPUBitmask = 0;
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2007-08-28 05:06:17 +00:00
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2008-08-06 06:14:43 +00:00
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// Set the CPU and FPU Bitmasks
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2007-08-28 05:06:17 +00:00
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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2008-08-06 06:14:43 +00:00
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned RegNum = MipsRegisterInfo::getRegisterNumbering(CSI[i].getReg());
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if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass)
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CPUBitmask |= (1 << RegNum);
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else
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FPUBitmask |= (1 << RegNum);
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}
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2007-08-28 05:06:17 +00:00
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2008-08-06 06:14:43 +00:00
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// Return Address and Frame registers must also be set in CPUBitmask.
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2007-08-28 05:06:17 +00:00
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if (RI.hasFP(MF))
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2008-08-06 06:14:43 +00:00
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CPUBitmask |= (1 << MipsRegisterInfo::
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2007-10-09 03:01:19 +00:00
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getRegisterNumbering(RI.getFrameRegister(MF)));
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2007-08-28 05:06:17 +00:00
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if (MF.getFrameInfo()->hasCalls())
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2008-08-06 06:14:43 +00:00
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CPUBitmask |= (1 << MipsRegisterInfo::
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2007-10-09 03:01:19 +00:00
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getRegisterNumbering(RI.getRARegister()));
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2007-08-28 05:06:17 +00:00
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2008-08-06 06:14:43 +00:00
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// Print CPUBitmask
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O << "\t.mask \t"; printHex32(CPUBitmask); O << ','
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<< MipsFI->getCPUTopSavedRegOff() << '\n';
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// Print FPUBitmask
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O << "\t.fmask\t"; printHex32(FPUBitmask); O << ","
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<< MipsFI->getFPUTopSavedRegOff() << '\n';
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2007-08-28 05:06:17 +00:00
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}
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// Print a 32 bit hex number with all numbers.
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void MipsAsmPrinter::
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printHex32(unsigned int Value)
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{
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2008-08-21 00:14:44 +00:00
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O << "0x";
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2007-08-28 05:06:17 +00:00
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for (int i = 7; i >= 0; i--)
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2008-08-21 00:14:44 +00:00
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O << utohexstr( (Value & (0xF << (i*4))) >> (i*4) );
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2007-07-11 23:24:41 +00:00
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}
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2008-07-14 14:42:54 +00:00
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//===----------------------------------------------------------------------===//
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// Frame and Set directives
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//===----------------------------------------------------------------------===//
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/// Frame Directive
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2009-07-29 05:09:30 +00:00
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void MipsAsmPrinter::emitFrameDirective(MachineFunction &MF) {
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2008-07-14 14:42:54 +00:00
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned stackReg = RI.getFrameRegister(MF);
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unsigned returnReg = RI.getRARegister();
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unsigned stackSize = MF.getFrameInfo()->getStackSize();
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2009-09-13 20:31:40 +00:00
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O << "\t.frame\t" << '$' << LowercaseString(getRegisterName(stackReg))
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2008-07-19 13:16:32 +00:00
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<< ',' << stackSize << ','
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2009-09-13 20:31:40 +00:00
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<< '$' << LowercaseString(getRegisterName(returnReg))
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2008-07-19 13:16:32 +00:00
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<< '\n';
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2008-07-14 14:42:54 +00:00
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}
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/// Emit Set directives.
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2009-07-29 05:09:30 +00:00
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const char *MipsAsmPrinter::emitCurrentABIString() {
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2008-07-14 14:42:54 +00:00
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switch(Subtarget->getTargetABI()) {
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case MipsSubtarget::O32: return "abi32";
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case MipsSubtarget::O64: return "abiO64";
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case MipsSubtarget::N32: return "abiN32";
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case MipsSubtarget::N64: return "abi64";
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case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
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default: break;
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}
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2009-07-14 16:55:14 +00:00
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llvm_unreachable("Unknown Mips ABI");
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2008-07-14 14:42:54 +00:00
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return NULL;
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}
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2007-07-11 23:24:41 +00:00
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/// Emit the directives used by GAS on the end of functions
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2009-07-29 05:09:30 +00:00
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void MipsAsmPrinter::emitFunctionEnd(MachineFunction &MF) {
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2008-07-14 14:42:54 +00:00
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// There are instruction for this macros, but they must
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// always be at the function end, and we can't emit and
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// break with BB logic.
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O << "\t.set\tmacro\n";
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O << "\t.set\treorder\n";
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2007-10-09 03:01:19 +00:00
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2010-01-17 21:43:43 +00:00
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O << "\t.end\t" << *CurrentFnSym << '\n';
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if (MAI->hasDotTypeDotSizeDirective() && !Subtarget->isLinux())
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O << "\t.size\t" << *CurrentFnSym << ", .-" << *CurrentFnSym << '\n';
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2007-07-11 23:24:41 +00:00
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}
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2010-01-27 23:23:58 +00:00
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void MipsAsmPrinter::EmitFunctionEntryLabel() {
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O << "\t.ent\t" << *CurrentFnSym << '\n';
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OutStreamer.EmitLabel(CurrentFnSym);
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}
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2007-06-06 07:42:06 +00:00
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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2009-07-29 05:09:30 +00:00
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bool MipsAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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2007-06-06 07:42:06 +00:00
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SetupMachineFunction(MF);
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2010-01-27 23:23:58 +00:00
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EmitFunctionHeader();
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emitFrameDirective(MF);
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printSavedRegsBitmask(MF);
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O << '\n';
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2007-06-06 07:42:06 +00:00
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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2010-01-27 23:23:58 +00:00
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if (I != MF.begin())
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2009-09-13 18:25:37 +00:00
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EmitBasicBlockStart(I);
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2007-06-06 07:42:06 +00:00
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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2009-10-06 02:19:11 +00:00
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processDebugLoc(II, true);
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2009-09-09 23:14:36 +00:00
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2007-06-06 07:42:06 +00:00
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// Print the assembly for the instruction.
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printInstruction(II);
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2009-09-09 23:14:36 +00:00
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2009-11-13 21:34:57 +00:00
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if (VerboseAsm)
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2009-09-09 23:14:36 +00:00
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EmitComments(*II);
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O << '\n';
|
2009-10-06 02:19:11 +00:00
|
|
|
|
|
|
|
processDebugLoc(II, false);
|
2007-06-06 07:42:06 +00:00
|
|
|
++EmittedInsts;
|
|
|
|
}
|
2007-11-05 03:02:32 +00:00
|
|
|
|
|
|
|
// Each Basic Block is separated by a newline
|
|
|
|
O << '\n';
|
2007-06-06 07:42:06 +00:00
|
|
|
}
|
|
|
|
|
2007-07-11 23:24:41 +00:00
|
|
|
// Emit function end directives
|
2007-10-09 03:01:19 +00:00
|
|
|
emitFunctionEnd(MF);
|
2010-01-27 23:23:58 +00:00
|
|
|
|
|
|
|
// Print out jump tables referenced by the function
|
2010-01-28 01:02:27 +00:00
|
|
|
EmitJumpTableInfo();
|
2010-01-27 23:23:58 +00:00
|
|
|
|
2007-06-06 07:42:06 +00:00
|
|
|
// We didn't modify anything.
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2008-08-02 19:42:36 +00:00
|
|
|
// Print out an operand for an inline asm expression.
|
2009-07-29 05:09:30 +00:00
|
|
|
bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
|
|
|
|
unsigned AsmVariant,const char *ExtraCode){
|
2008-08-02 19:42:36 +00:00
|
|
|
// Does this asm operand have a single letter operand modifier?
|
|
|
|
if (ExtraCode && ExtraCode[0])
|
|
|
|
return true; // Unknown modifier.
|
|
|
|
|
|
|
|
printOperand(MI, OpNo);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2009-07-29 05:09:30 +00:00
|
|
|
void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
|
2007-06-06 07:42:06 +00:00
|
|
|
const MachineOperand &MO = MI->getOperand(opNum);
|
2007-11-05 03:02:32 +00:00
|
|
|
bool closeP = false;
|
2009-09-01 17:27:58 +00:00
|
|
|
|
|
|
|
if (MO.getTargetFlags())
|
2009-08-27 19:57:56 +00:00
|
|
|
closeP = true;
|
2009-09-01 17:27:58 +00:00
|
|
|
|
|
|
|
switch(MO.getTargetFlags()) {
|
|
|
|
case MipsII::MO_GPREL: O << "%gp_rel("; break;
|
|
|
|
case MipsII::MO_GOT_CALL: O << "%call16("; break;
|
|
|
|
case MipsII::MO_GOT:
|
|
|
|
if (MI->getOpcode() == Mips::LW)
|
|
|
|
O << "%got(";
|
2009-08-27 19:40:40 +00:00
|
|
|
else
|
2009-08-27 19:57:56 +00:00
|
|
|
O << "%lo(";
|
2009-09-01 17:27:58 +00:00
|
|
|
break;
|
|
|
|
case MipsII::MO_ABS_HILO:
|
|
|
|
if (MI->getOpcode() == Mips::LUi)
|
|
|
|
O << "%hi(";
|
|
|
|
else
|
|
|
|
O << "%lo(";
|
|
|
|
break;
|
2007-06-06 07:42:06 +00:00
|
|
|
}
|
2009-09-01 17:27:58 +00:00
|
|
|
|
2009-09-13 20:31:40 +00:00
|
|
|
switch (MO.getType()) {
|
2007-06-06 07:42:06 +00:00
|
|
|
case MachineOperand::MO_Register:
|
2009-09-13 20:31:40 +00:00
|
|
|
O << '$' << LowercaseString(getRegisterName(MO.getReg()));
|
2007-06-06 07:42:06 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case MachineOperand::MO_Immediate:
|
2008-08-13 07:13:40 +00:00
|
|
|
O << (short int)MO.getImm();
|
2007-06-06 07:42:06 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case MachineOperand::MO_MachineBasicBlock:
|
2010-01-26 04:55:51 +00:00
|
|
|
O << *MO.getMBB()->getSymbol(OutContext);
|
2007-06-06 07:42:06 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
case MachineOperand::MO_GlobalAddress:
|
2010-01-17 21:43:43 +00:00
|
|
|
O << *GetGlobalValueSymbol(MO.getGlobal());
|
2007-06-06 07:42:06 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case MachineOperand::MO_ExternalSymbol:
|
2010-01-17 21:43:43 +00:00
|
|
|
O << *GetExternalSymbolSymbol(MO.getSymbolName());
|
2007-06-06 07:42:06 +00:00
|
|
|
break;
|
|
|
|
|
2007-11-12 19:49:57 +00:00
|
|
|
case MachineOperand::MO_JumpTableIndex:
|
2009-08-22 21:43:10 +00:00
|
|
|
O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
|
2010-01-16 00:21:18 +00:00
|
|
|
<< '_' << MO.getIndex();
|
2007-11-12 19:49:57 +00:00
|
|
|
break;
|
|
|
|
|
2007-06-06 07:42:06 +00:00
|
|
|
case MachineOperand::MO_ConstantPoolIndex:
|
2009-08-22 21:43:10 +00:00
|
|
|
O << MAI->getPrivateGlobalPrefix() << "CPI"
|
2007-12-30 23:10:15 +00:00
|
|
|
<< getFunctionNumber() << "_" << MO.getIndex();
|
2009-11-19 06:06:13 +00:00
|
|
|
if (MO.getOffset())
|
|
|
|
O << "+" << MO.getOffset();
|
2007-06-06 07:42:06 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2009-07-14 16:55:14 +00:00
|
|
|
llvm_unreachable("<unknown operand type>");
|
2007-06-06 07:42:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (closeP) O << ")";
|
|
|
|
}
|
|
|
|
|
2009-07-29 05:09:30 +00:00
|
|
|
void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum) {
|
2008-08-13 07:13:40 +00:00
|
|
|
const MachineOperand &MO = MI->getOperand(opNum);
|
|
|
|
if (MO.getType() == MachineOperand::MO_Immediate)
|
|
|
|
O << (unsigned short int)MO.getImm();
|
|
|
|
else
|
|
|
|
printOperand(MI, opNum);
|
|
|
|
}
|
|
|
|
|
2007-06-06 07:42:06 +00:00
|
|
|
void MipsAsmPrinter::
|
2009-07-21 17:39:48 +00:00
|
|
|
printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
|
2007-09-24 20:15:11 +00:00
|
|
|
// when using stack locations for not load/store instructions
|
|
|
|
// print the same way as all normal 3 operand instructions.
|
|
|
|
if (Modifier && !strcmp(Modifier, "stackloc")) {
|
|
|
|
printOperand(MI, opNum+1);
|
|
|
|
O << ", ";
|
|
|
|
printOperand(MI, opNum);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-11-05 03:02:32 +00:00
|
|
|
// Load/Store memory operands -- imm($reg)
|
|
|
|
// If PIC target the target is loaded as the
|
|
|
|
// pattern lw $25,%call16($28)
|
2007-06-06 07:42:06 +00:00
|
|
|
printOperand(MI, opNum);
|
|
|
|
O << "(";
|
|
|
|
printOperand(MI, opNum+1);
|
|
|
|
O << ")";
|
|
|
|
}
|
|
|
|
|
Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future inclusion of features easier. Among new features,
we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
integer
and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
return copy, no homing location within EABI, non 32-bit stack objects
arguments, and asm constraint for float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-05 19:05:21 +00:00
|
|
|
void MipsAsmPrinter::
|
2009-07-21 17:39:48 +00:00
|
|
|
printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
|
Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
yet, but they allow the future inclusion of features easier. Among new features,
we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
integer
and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
return copy, no homing location within EABI, non 32-bit stack objects
arguments, and asm constraint for float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-05 19:05:21 +00:00
|
|
|
const MachineOperand& MO = MI->getOperand(opNum);
|
|
|
|
O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
|
|
|
|
}
|
|
|
|
|
2009-09-30 22:06:26 +00:00
|
|
|
void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
|
2009-08-19 05:49:37 +00:00
|
|
|
// FIXME: Use SwitchSection.
|
2009-07-21 17:39:48 +00:00
|
|
|
|
2008-07-14 14:42:54 +00:00
|
|
|
// Tell the assembler which ABI we are using
|
2008-07-19 13:16:32 +00:00
|
|
|
O << "\t.section .mdebug." << emitCurrentABIString() << '\n';
|
2008-07-14 14:42:54 +00:00
|
|
|
|
|
|
|
// TODO: handle O64 ABI
|
|
|
|
if (Subtarget->isABI_EABI())
|
|
|
|
O << "\t.section .gcc_compiled_long" <<
|
2008-07-19 13:16:32 +00:00
|
|
|
(Subtarget->isGP32bit() ? "32" : "64") << '\n';
|
2008-07-14 14:42:54 +00:00
|
|
|
|
|
|
|
// return to previous section
|
2008-07-19 13:16:32 +00:00
|
|
|
O << "\t.previous" << '\n';
|
2007-06-06 07:42:06 +00:00
|
|
|
}
|
|
|
|
|
2009-06-23 23:59:40 +00:00
|
|
|
// Force static initialization.
|
2009-07-15 20:24:03 +00:00
|
|
|
extern "C" void LLVMInitializeMipsAsmPrinter() {
|
2009-07-25 06:49:55 +00:00
|
|
|
RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
|
|
|
|
RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);
|
2009-07-15 20:24:03 +00:00
|
|
|
}
|