2012-02-17 08:55:11 +00:00
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//===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
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2007-06-06 07:42:06 +00:00
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2007-06-06 07:42:06 +00:00
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//
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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//
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// This file defines an instruction selector for the MIPS target.
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//
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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#define DEBUG_TYPE "mips-isel"
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2013-03-14 18:27:31 +00:00
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#include "MipsISelDAGToDAG.h"
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#include "Mips16ISelDAGToDAG.h"
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#include "MipsSEISelDAGToDAG.h"
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2007-06-06 07:42:06 +00:00
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#include "Mips.h"
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2012-12-03 16:50:05 +00:00
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#include "MCTargetDesc/MipsBaseInfo.h"
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2007-11-05 03:02:32 +00:00
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#include "MipsMachineFunction.h"
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2007-06-06 07:42:06 +00:00
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#include "MipsRegisterInfo.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/CodeGen/MachineFunction.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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2007-12-31 04:13:23 +00:00
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2012-02-28 02:55:02 +00:00
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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2013-01-02 11:36:10 +00:00
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/Type.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/Support/CFG.h"
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2007-06-06 07:42:06 +00:00
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#include "llvm/Support/Debug.h"
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2009-07-08 20:53:28 +00:00
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/Target/TargetMachine.h"
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2007-06-06 07:42:06 +00:00
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using namespace llvm;
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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// Instruction Selector Implementation
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2007-06-06 07:42:06 +00:00
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// MipsDAGToDAGISel - MIPS specific code to select MIPS machine
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// instructions for SelectionDAG operations.
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2011-04-15 21:51:11 +00:00
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//===----------------------------------------------------------------------===//
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2012-03-08 01:51:59 +00:00
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2012-02-24 22:34:47 +00:00
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bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
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bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
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2012-02-28 07:46:26 +00:00
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2013-03-14 18:33:23 +00:00
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processFunctionAfterISel(MF);
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2012-02-24 22:34:47 +00:00
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return Ret;
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}
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2007-06-06 07:42:06 +00:00
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2007-11-12 19:49:57 +00:00
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/// getGlobalBaseReg - Output the instructions required to put the
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/// GOT address into a register.
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2009-06-03 20:30:14 +00:00
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SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
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2012-02-24 22:34:47 +00:00
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unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
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2013-06-19 21:36:55 +00:00
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return CurDAG->getRegister(GlobalBaseReg,
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getTargetLowering()->getPointerTy()).getNode();
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2007-11-12 19:49:57 +00:00
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}
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2007-06-06 07:42:06 +00:00
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/// ComplexPattern used on MipsInstrInfo
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/// Used on Mips Load/Store instructions
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2013-02-16 00:14:37 +00:00
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bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
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SDValue &Offset) const {
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2013-03-14 18:27:31 +00:00
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llvm_unreachable("Unimplemented function.");
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2013-02-15 21:20:45 +00:00
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return false;
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}
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2013-02-16 00:14:37 +00:00
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bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
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SDValue &Offset) const {
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2013-03-14 18:27:31 +00:00
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llvm_unreachable("Unimplemented function.");
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return false;
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2007-06-06 07:42:06 +00:00
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}
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2013-02-16 00:14:37 +00:00
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bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
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SDValue &Offset) const {
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2013-03-14 18:27:31 +00:00
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llvm_unreachable("Unimplemented function.");
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return false;
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2012-10-28 06:02:37 +00:00
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}
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2013-03-14 18:33:23 +00:00
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bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
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2013-03-14 18:27:31 +00:00
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SDValue &Offset, SDValue &Alias) {
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llvm_unreachable("Unimplemented function.");
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return false;
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2011-12-20 23:10:57 +00:00
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}
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2007-06-06 07:42:06 +00:00
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/// Select instructions not customized! Used for
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/// expanded, promoted and normal instructions
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2010-01-05 01:24:18 +00:00
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SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
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2007-06-06 07:42:06 +00:00
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unsigned Opcode = Node->getOpcode();
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// Dump information about the Node being selected
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2010-03-02 06:34:30 +00:00
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DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
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2007-06-06 07:42:06 +00:00
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// If we have a custom node, we already have selected!
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2008-07-17 19:10:17 +00:00
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if (Node->isMachineOpcode()) {
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2010-03-02 06:34:30 +00:00
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DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
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2007-06-06 07:42:06 +00:00
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return NULL;
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}
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2013-03-14 18:27:31 +00:00
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// See if subclasses can handle this node.
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2013-03-14 18:33:23 +00:00
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std::pair<bool, SDNode*> Ret = selectNode(Node);
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2013-03-14 18:27:31 +00:00
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if (Ret.first)
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return Ret.second;
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2011-12-20 23:10:57 +00:00
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2007-06-06 07:42:06 +00:00
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switch(Opcode) {
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2011-12-20 22:58:01 +00:00
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default: break;
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// Get target GOT address.
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case ISD::GLOBAL_OFFSET_TABLE:
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return getGlobalBaseReg();
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2011-12-20 22:25:50 +00:00
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2012-09-15 01:52:08 +00:00
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#ifndef NDEBUG
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case ISD::LOAD:
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case ISD::STORE:
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assert(cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
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cast<MemSDNode>(Node)->getAlignment() &&
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"Unexpected unaligned loads/stores.");
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break;
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#endif
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2007-06-06 07:42:06 +00:00
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}
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// Select the default instruction
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2010-01-05 01:24:18 +00:00
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SDNode *ResNode = SelectCode(Node);
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2007-06-06 07:42:06 +00:00
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2010-03-02 06:34:30 +00:00
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DEBUG(errs() << "=> ");
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2010-01-05 01:24:18 +00:00
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if (ResNode == NULL || ResNode == Node)
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DEBUG(Node->dump(CurDAG));
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2007-06-06 07:42:06 +00:00
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else
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DEBUG(ResNode->dump(CurDAG));
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2009-08-23 06:49:22 +00:00
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DEBUG(errs() << "\n");
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2007-06-06 07:42:06 +00:00
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return ResNode;
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}
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2011-06-21 00:40:49 +00:00
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bool MipsDAGToDAGISel::
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SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
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std::vector<SDValue> &OutOps) {
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assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
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OutOps.push_back(Op);
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return false;
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}
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2011-03-04 17:51:39 +00:00
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/// createMipsISelDag - This pass converts a legalized DAG into a
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2007-06-06 07:42:06 +00:00
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/// MIPS-specific DAG, ready for instruction scheduling.
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FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
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2013-03-14 18:27:31 +00:00
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if (TM.getSubtargetImpl()->inMips16Mode())
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return llvm::createMips16ISelDag(TM);
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return llvm::createMipsSEISelDag(TM);
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2007-06-06 07:42:06 +00:00
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}
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