Evan Cheng
08cec1ef27
More ARM scheduling itinerary fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:41:41 +00:00
Jim Grosbach
42fac8ee3b
MC machine encoding for simple aritmetic instructions that use a shifted
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register operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:16:21 +00:00
Jason W Kim
17b443df43
Second set of ARM/MC/ELF changes.
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Added ARM specific ELF section types.
Added AttributesSection to ARMElfTargetObject
First step in unifying .cpu assembly tag with ELF/.o
llc now asserts on actual ELF emission on -filetype=obj :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116257 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 23:01:44 +00:00
Evan Cheng
60ff87914f
Proper VST scheduling itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 22:03:18 +00:00
Eric Christopher
5f9e8b971b
Use a sane mechanism for that assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116249 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 22:01:22 +00:00
Eric Christopher
050d16c2a9
We're not going to handle dynamic allocas anywhere else.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:37:35 +00:00
Eric Christopher
fb0b892f7e
Make sure that the call stack adjustments have default operands. Also
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leave custom lowerings for later.
Fixes some nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116232 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:20:02 +00:00
Jakob Stoklund Olesen
4f9af2ef65
PowerPC varargs functions store live-in registers on the stack. Make sure we use
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virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.
This fixes PR8357.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116222 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 20:43:09 +00:00
Eric Christopher
8ff9a9da0a
Found a bug turning this on by default. Disable again for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 20:26:21 +00:00
Eric Christopher
fa6b29dacd
Fix help text.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116218 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 20:15:02 +00:00
Eric Christopher
feadddd6b6
Change flag from Enable to Disable since we're enabled by default.
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Also don't use fast-isel on non-darwin since it's untested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116217 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 20:05:22 +00:00
Andrew Trick
1a2cf3b4d9
Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 19:02:04 +00:00
Jim Grosbach
62547267f0
More binary encoding stuff, taking advantage of the new "by name" operand
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matching in tblgen to do the predicate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 18:51:51 +00:00
Eric Christopher
a2efc5ff6e
Turn on arm fast isel by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 18:48:18 +00:00
Francois Pichet
1265776243
MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 11:36:19 +00:00
Eric Christopher
a1640d9ed9
Copy and pasteo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 08:40:05 +00:00
Eric Christopher
dccd2c3c43
Whitespace cleanup in ARM fast isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 08:38:55 +00:00
Eric Christopher
6a880d6ba8
Add srem libcall support to ARM fast isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 08:37:26 +00:00
Eric Christopher
7bdc4de4e7
Add i8 sdiv support for ARM fast isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 08:31:54 +00:00
Eric Christopher
3bbd396853
Implement select handling for ARM fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 08:27:59 +00:00
Chris Lattner
60cb528246
Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if
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it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 05:44:40 +00:00
Michael J. Spencer
335b806c62
X86: Call ulldiv and ftol2 on Windows instead of their libgcc eqivilents.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 05:29:15 +00:00
Michael J. Spencer
92bf38c956
X86: MinGW should always use libgcc on Windows.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116177 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 23:11:06 +00:00
Michael J. Spencer
1802a9f8fe
X86: Call _alldiv instead of __divdi3 on Windows (excluding cygwin).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 22:04:34 +00:00
Michael J. Spencer
ec38de2ca8
Fix Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 22:04:20 +00:00
Chris Lattner
749dc72bdc
fix the expansion of va_arg instruction on PPC to know the arg
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alignment for PPC32/64, avoiding some masking operations.
llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-10 18:34:00 +00:00
Michael J. Spencer
c0c8df3cea
Fix Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 11:00:50 +00:00
Evan Cheng
10dc63feeb
Add VLD4 scheduling itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 04:07:58 +00:00
Evan Cheng
84f69e8436
Finish vld3 and vld4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116140 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 01:45:34 +00:00
Evan Cheng
40bb6836f6
Complete vld2 instruction itineries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116136 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 01:26:12 +00:00
Evan Cheng
8ae6ffacdd
Multiply instructions are issued on pipeline 0. They do not need to reserve pipeline 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116135 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 01:15:04 +00:00
Evan Cheng
d2ca813549
Correct some load / store instruction itinerary mistakes:
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1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 01:03:04 +00:00
Bill Wendling
0aa38b9381
Check to make sure that the iterator isn't at the beginning of the basic block
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before decrementing. <rdar://problem/8529919>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-09 00:03:48 +00:00
Chris Lattner
0d9a0865c6
add jit support for the new psuedo instructions I added for
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the add/or xform. The JIT isn't mcized yet, boo.
This fixes Olden/voronoi, bh and a ton of other stuff that
uses the jit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116125 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 23:59:27 +00:00
Chris Lattner
8dae787db4
machine a mutable machineinstr down into emitInstruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116124 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 23:54:01 +00:00
Eric Christopher
e93417bcc8
Fix the store part of this as well. Fixes smg2000.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 23:52:16 +00:00
Jim Grosbach
56ac907c57
Implement a few more binary encoding bits. Still very early stage proof-of-
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concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.
This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 21:45:55 +00:00
Cameron Esfahani
ec37b00b17
Recommit 116056, now with the missing file...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 19:24:18 +00:00
Jim Grosbach
3e09413c2c
Reapply 116059, this time without the fatfingered pasto at the top.
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''const'ify getMachineOpValue() and associated helpers.'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 17:45:54 +00:00
Jim Grosbach
2cee75a254
Reverting 116059. Bots are unhappy with it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 17:28:40 +00:00
Andrew Trick
5900201aa7
reverting 116056: win64_params.ll may need to be conditionalized?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 17:22:42 +00:00
Jim Grosbach
461caba214
'const'ify getMachineOpValue() and associated helpers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 16:52:44 +00:00
Cameron Esfahani
d7b8d91d4a
Small patch to restore home register stack space allocation for the Win64 case. Add test case. This code eventually needs to be tighter, since it's always allocating it, even in leaf routines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 10:31:30 +00:00
Bob Wilson
7d24705f65
Change register allocation order for ARM VFP and NEON registers to put the
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callee-saved registers at the end of the lists. Also prefer to avoid using
the low registers that are in register subclasses required by certain
instructions, so that those registers will more likely be available when needed.
This change makes a huge improvement in spilling in some cases. Thanks to
Jakob for helping me realize the problem.
Most of this patch is fixing the testsuite. There are quite a few places
where we're checking for specific registers. I changed those to wildcards
in places where that doesn't weaken the tests. The spill-q.ll and
thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch
of live values to force spills on those tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 06:15:13 +00:00
Chris Lattner
d043529b34
fix a subtle bug I introduced in my refactoring, where we stopped preferring
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the i8 versions of instructions in some cases. In test6, we started
generating:
cmpq $0, -8(%rsp) ## encoding: [0x48,0x81,0x7c,0x24,0xf8,0x00,0x00,0x00,0x00]
## <MCInst #478 CMP64mi32
## <MCOperand Reg:114>
## <MCOperand Imm:1>
## <MCOperand Reg:0>
## <MCOperand Imm:-8>
## <MCOperand Reg:0>
## <MCOperand Imm:0>>
instead of:
cmpq $0, -8(%rsp) ## encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
## <MCInst #479 CMP64mi8
## <MCOperand Reg:114>
## <MCOperand Imm:1>
## <MCOperand Reg:0>
## <MCOperand Imm:-8>
## <MCOperand Reg:0>
## <MCOperand Imm:0>>
Fix this and add some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 05:12:14 +00:00
Chris Lattner
15df55d8c2
reapply: Use the new TB_NOT_REVERSABLE flag instead of special
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reapply: reimplement the second half of the or/add optimization. We should now
with no changes. Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 03:57:25 +00:00
Chris Lattner
99ae6659da
reapply the patch reverted in r116033:
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"Reimplement (part of) the or -> add optimization. Matching 'or' into 'add'"
With a critical fix: the add pseudos clobber EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 03:54:52 +00:00
Daniel Dunbar
b88b00ba2b
Revert "Reimplement (part of) the or -> add optimization. Matching 'or' into
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'add'", which seems to have broken just about everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 02:07:32 +00:00
Daniel Dunbar
b38109fc2d
Revert "Use the new TB_NOT_REVERSABLE flag instead of special ", which depends
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on r116007, which I am about to revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 02:07:29 +00:00
Daniel Dunbar
32f0cdba30
Revert "reimplement the second half of the or/add optimization. We should now",
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which depends on r116007, which I am about to revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 02:07:26 +00:00