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Author SHA1 Message Date
Owen Anderson
0bccec368a Tests for NEON encoding of vrev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117502 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 22:54:49 +00:00
Owen Anderson
498ec20703 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 22:49:00 +00:00
Jim Grosbach
6b15639e26 Trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:39:08 +00:00
Owen Anderson
d2fbdb7f5c Provide correct encodings for the get_lane and set_lane variants of vmov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:28:09 +00:00
Rafael Espindola
3cede2d0b2 Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:23:52 +00:00
Kevin Enderby
529b1a4398 Added the x86 instruction ud2b (2nd official undefined instruction). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:46:49 +00:00
Jim Grosbach
ccf72caa92 JIT imm12 encoding for constant pool entry references. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117483 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:39:40 +00:00
Bob Wilson
f20700ca77 SelectionDAG shuffle nodes do not allow operands with different numbers of 
elements than the result vector type.  So, when an instruction like:

%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>

is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements.  That is:

shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]

That's probably the right thing for x86 but for NEON, we'd much rather have:

shuffle [a,b,c,d], undef

Teach the DAG combiner how to do that transformation for ARM.  Radar 8597007.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117482 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:38:28 +00:00
Rafael Espindola
bc82d8b84f Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:28:07 +00:00
Jim Grosbach
f31430f6ec ARM JIT fix for LDRi12 and company. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117478 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:55:59 +00:00
Benjamin Kramer
07ee63283c Replace pointer arithmetic with StringRef::substr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:53:52 +00:00
Owen Anderson
f587a9352a Provide correct NEON encodings for vdup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:25:54 +00:00
Michael J. Spencer
6dad10ed66 x86-Win32: Switch ftol2 calling convention from stdcall to C. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:38 +00:00
Michael J. Spencer
3931b54a5f COFF: Add IMAGE_SCN_MEM_READ to text sections. 
There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:29 +00:00
Michael J. Spencer
579d7a3dcc Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:20 +00:00
Rafael Espindola
4fa3478fc2 Set default type and flags for .init and .fini. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:45:20 +00:00
Owen Anderson
82203218d1 Tests for NEON encoding of vmovl, vmovn, vqmovn, and vqmovun. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:17:12 +00:00
Devang Patel
f95a271922 Give a name to nameless argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:08:31 +00:00
Owen Anderson
027c84dd3e Tests for NEON encoding of vcls, vclz, and vcnt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:05:25 +00:00
Owen Anderson
df800f1b1b Tests for NEON encoding of vneg and vqneg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117463 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:57:26 +00:00
Rafael Espindola
83ff4d2b0d Produce an error for an invalid use of .symver. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:56:18 +00:00
Jim Grosbach
093177d5cd The new LDR* instruction patterns should handle the necessary encoding of 
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:52:51 +00:00
Owen Anderson
633919c79a Tests for NEON encoding of vabs and vqabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:50:07 +00:00
Owen Anderson
0745c389d9 Add correct NEON encodings for vsli and vsri. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6 Add correct NEON encodings for vsra and vrsra. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:29:29 +00:00
Jim Grosbach
063efbf569 The immediate operands of an LDRi12 instruction doesn't need the addrmode2 
encoding tricks. Handle the 'imm doesn't fit in the insn' case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:50:31 +00:00
Jim Grosbach
0ed257c036 Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:30:18 +00:00
Rafael Espindola
bf052ac5d1 Symbols defined as the difference of other two end up in the ABS section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:04:30 +00:00
Rafael Espindola
8818213247 Add support for the .symver directive. This is really ugly, but most of it is 
contained in the ELF object writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 15:18:17 +00:00
Rafael Espindola
a6866969ba Move more logic to isInSymtab and simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 14:44:52 +00:00
Mikhail Glushenkov
401b90a4bc 80-col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 09:09:10 +00:00
Mikhail Glushenkov
11d03f690e Remove try/catch(...) from Win32/Signals.inc. 
catch(...) is used in Win32/Signals.inc for catching Win32 structured
exceptions, but according to [1], this is wrong.

We can't simply change try/catch to __try/__finally, since this syntax is not
supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1
macros on MinGW [2], but I think that that solution obfuscates the code too
much.

The use of try/catch(...) in Signals.inc makes it impossible to link
MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we
just remove try/catch(...) from Signals.inc, since the meaning of the code won't
change.

[1] http://members.cox.net/doug_web/eh.htm
[2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117442 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 09:09:04 +00:00
Mikhail Glushenkov
d33b77bbb0 It is confusing to call a random-access iterator 'InputIterator'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117441 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 07:39:54 +00:00
Mikhail Glushenkov
0da14f7a9d Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117440 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 07:39:48 +00:00
Kevin Enderby
e460890351 Yet another tweak to X86 instructions to add ud2a as an alias to ud2 
(still to add ud2b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 03:01:02 +00:00
Kevin Enderby
5a378076a4 Another tweak to X86 instructions to add the missing flex instruction (without 
the wait prefix).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 02:53:04 +00:00
Kevin Enderby
f4630ecc3f Tweaks to X86 instructions to allow the 'w' suffix in places it makes 
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler
allows for these instructions.  Done differently than in r117031 that
caused a valgrind error which was later reverted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 02:32:19 +00:00
Jim Grosbach
77aee8e22c LDRi12 machine instructions handle negative offset operands normally (simple 
integer values), not with the addrmode2 encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117429 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 01:19:41 +00:00
Bill Wendling
1b383ba6ae Random cleanups and format changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117428 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 01:07:41 +00:00
Kevin Enderby
41e8cc73cf Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc 
will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen
c95c1465fd Handle critical loop predecessors by making both inside and outside registers 
live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117424 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
0960a650b7 Compute critical loop predecessors in the same way as critical loop exits. 
Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117423 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
8c593f9173 Physical registers trivially have multiple connected components all the time. 
Only virtuals should be requires to be connected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:39:01 +00:00
Jim Grosbach
f85dd04bfa One more spot where the new arm mode LDR instruction representation 
doesn't need the additional addrmode2 register operand. Missed it the first
time around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:38:16 +00:00
Wesley Peck
a06038369b Adding disassembler to the MicroBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117420 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:23:01 +00:00
Jim Grosbach
c1d30212e9 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 00:19:44 +00:00
Jim Grosbach
28e3fe961f Since I parameterized this bit, I should probably actually use said parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117418 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 23:58:04 +00:00
Dan Gohman
f99f1197c7 Enable clang autocompletion by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117415 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 23:24:54 +00:00
Dale Johannesen
1de4aa904e Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches 
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 23:11:10 +00:00
Andrew Trick
3d26d5d524 Remove the vector of live vregs. I thought we would need to track 
them, but hopefully we won't. And this is not the right data structure
to do it anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-26 22:58:24 +00:00