Stuart Hastings
0e29ed081b
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
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rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 19:04:40 +00:00
Akira Hatanaka
17a1e87751
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
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saving and restoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:39:33 +00:00
Andrew Trick
f85092c255
indvars: Prototyping Sign/ZeroExtend elimination without canonical IVs.
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No functionality enabled by default. Use -disable-iv-rewrite.
Extended IVUsers to keep track of the phi that represents the users' IV.
Added the WidenIV transform to replace a narrow IV with a wide IV
by doing a one-for-one replacement of IV users instead of expanding the
SCEV expressions. [sz]exts are removed and truncs are inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:25:42 +00:00
Charles Davis
cde87e2377
Now that they're implemented, make the Win64 EH MCAsmStreamer methods call
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super.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:19:22 +00:00
Chad Rosier
5def9657e4
Fixed regression due to commit 131709, which disables vararg tail call optimizations on Win64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131740 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 17:49:39 +00:00
Evan Cheng
0b65599015
Revert accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 17:38:48 +00:00
Charles Davis
d0b76d0004
"Implement" the HandlerData Win64 EH method in the base MCStreamer.
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There's really nothing to implement. All this really does is swap to a
pseudo-section that later gets written to the unwind info struct. That
needs to be implemented in the object streamers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131734 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 16:06:22 +00:00
Benjamin Kramer
eb274e6bdd
Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 15:11:26 +00:00
Benjamin Kramer
6e35e4c8c1
Remove noisy semicolons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 09:20:25 +00:00
Cameron Zwarich
21a70bf4a5
Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to preserve
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the phikill flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 03:54:04 +00:00
Andrew Trick
074397d75e
indvars: minor cleanup in preparation for sign/zero extend elimination.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 03:37:48 +00:00
Akira Hatanaka
cd0f90f831
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 02:30:51 +00:00
Akira Hatanaka
d992f6c666
Remove code that creates unnecessary frame objects.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 01:45:06 +00:00
Akira Hatanaka
da0a3571d6
Define variables and functions in MipsFunctionInfo.
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This is the first of a series of patches that attempt to simplify handling of
stack frame objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 01:17:58 +00:00
Chad Rosier
a166089f36
Don't attempt to tail call optimize for Win64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:59:28 +00:00
Evan Cheng
2e6496026f
Revert r131664 and fix it in instcombine instead. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:54:37 +00:00
Cameron Zwarich
5a4b3d8c8f
Fix PR9955 by only attaching load memory operands to load instructions and
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similarly for stores. Now "make check" passes with the MachineVerifier forced
on with the VerifyCoalescing option!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 23:44:34 +00:00
Eli Friedman
dc51575a5f
Add fast-isel support for zeroext and signext ret instructions on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:16:13 +00:00
Rafael Espindola
78ff647e44
Looks like OS X assemblers (including MC) don't like
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foo:
bar = foo
.quad bar
Avoid producing it. Fixes PR9951.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131687 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:05:56 +00:00
Rafael Espindola
a6f2678f08
Misc code refactorings:
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* Remove unnecessary arguments now that ForceExpAbs is a method.
* Use ForceExpAbs in EmitAbsValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:40:34 +00:00
Eric Christopher
2bbecd8f6d
Oddly people want to use the 'r' constraint for fp constants on x86.
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Fixes rdar://9218925
Fixes PR9601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:33:47 +00:00
Charles Davis
61558aaf4f
Implement the EndProlog Win64 EH method on the base MCStreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:24:54 +00:00
Cameron Zwarich
3a2d255ce6
Fix PR9947 by placing OPFL_MemRefs on the node using memory operands rather than
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the root if there is only one such node. This leaves only 2 verifier failures in
the entire test suite when running "make check".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:13:30 +00:00
Eli Friedman
24a69c7be2
Fix up this test to use explicit triples (Win64 passes a different number of arguments in registers).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:13:08 +00:00
Jason W Kim
861b9c6a39
This fixes one divergence between LLVM and binutils for ARM in the
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text section.
Assume the following bit of annotated assembly:
.section .data.rel.ro,"aw",%progbits
.align 2
.LAlpha:
.long startval(GOTOFF)
.text
.align 2
.type main,%function
.align 4
main: ;;; assume "main" starts at offset 0x20
0x0 push {r11, lr}
0x4 movw r0, :lower16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-4) + 8) = -20
0x8 movt r0, :upper16:(.LAlpha-(.LBeta+8))
;;; ==> (.AddrOf(.LAlpha) - ((.AddrOf(.LBeta) - .AddrOf(".")) + 8)
;;; ==> (??? - ((16-8) + 8) = -16
0xc ... blah
.LBeta:
0x10 add r0, pc, r0
0x14 ... blah
.LGamma:
0x18 add r1, pc, r1
Above snippet results in the following relocs in the .o file for the
first pair of movw/movt instructions
00000024 R_ARM_MOVW_PREL_NC .LAlpha
00000028 R_ARM_MOVT_PREL .LAlpha
And the encoded instructions in the .o file for main: must be
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec i.e. -20
28: e34f0ff0 movt r0, #65520 ; 0xfff0 i.e. -16
However, llc (prior to this commit) generates the following sequence
00000020 <main>:
20: e92d4800 push {fp, lr}
24: e30f0fec movw r0, #65516 ; 0xffec - i.e. -20
28: e34f0fff movt r0, #65535 ; 0xffff - i.e. -1
What has to happen in the ArmAsmBackend is that if the relocation is PC
relative, the 16 bits encoded as part of movw and movt must be both addends,
not addresses. It makes sense to encode addresses by right shifting the value
by 16, but the result is incorrect for PIC.
i.e., the right shift by 16 for movt is ONLY valid for the NON-PCRel case.
This change agrees with what GNU as does, and makes the PIC code run.
MC/ARM/elf-movt.s covers this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:55:25 +00:00
Devang Patel
d3a1788da1
Reapply r131605. This time with a fix, which is to use NoFolder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:52:46 +00:00
Rafael Espindola
a3bff99f0a
ADD64ri32 sign extends its argument, so we need to use a R_X86_64_32S.
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Fixes PR9934.
We really need to start tblgening the relocation info :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:32:34 +00:00
Akira Hatanaka
a1a7ba8382
Align i64 arguments to 64 bit boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:29:48 +00:00
Charles Davis
c3b162857a
Implement the Win64 EH prolog instruction methods on the base MCStreamer.
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I had to change the API slightly to avoid overloading issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131666 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 19:35:55 +00:00
Eli Friedman
097f9a94f6
Fix up the new StandardPasses to run the same scalarrepl passes as the old one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 19:14:54 +00:00
Evan Cheng
0efaa5e6a1
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:57:12 +00:00
Stuart Hastings
3dfc4b1222
Update some currently-disabled code, preparing for eventual use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131663 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:48:20 +00:00
Akira Hatanaka
59d266029c
Increase number of available registers when target is MIPS32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:25:03 +00:00
Evan Cheng
aaa7f499c1
Add comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:18:39 +00:00
Akira Hatanaka
95b8ae190e
Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stankovic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:06:05 +00:00
Joerg Sonnenberger
f8cd708f14
Reapply 131644 including the missing header changes:
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Introduce -fatal-assembler-warnings for the obvious purpose
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:00:13 +00:00
Stuart Hastings
d22f036c2a
Reverting 131641 to investigate 'bot complaint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:54:42 +00:00
Eli Friedman
8bd71a1ec1
Revert r131644; it's breaking the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:48:09 +00:00
Charles Davis
440596ffe5
Turns out GAS does have Win64 EH directives. (It also supports WinCE EH.) Make
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ours compatible with GAS.
In retrospect, I should have emailed binutils about this earlier. Thanks to
Kai Tietz for pointing out that GAS already had SEH directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131652 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:46:39 +00:00
Jim Grosbach
6635b04a43
80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:34:53 +00:00
Joerg Sonnenberger
bae1c924ce
Introduce -fatal-assembler-warnings for the obvious purpose
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:27:01 +00:00
Akira Hatanaka
d48cfaec35
Fix data layout string. i64 is aligned to 64 bit boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 17:21:09 +00:00
Stuart Hastings
b6dcf3c514
Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be
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pseudos. rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 16:59:50 +00:00
Stuart Hastings
26847d40db
Move test to Transforms/InstCombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 05:53:22 +00:00
Cameron Zwarich
055cdfc541
Use the correct register class for Cell varargs spilling. This fixes all of the
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verifier failures in the CodeGen/CellSPU tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 04:44:19 +00:00
Mon P Wang
28e2b1d29a
Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for this change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 04:15:07 +00:00
Charles Davis
91d9a1c0f7
Implement the StartChained and EndChained Win64 EH methods on MCStreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 04:04:13 +00:00
Cameron Zwarich
d76773a221
Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 03:11:06 +00:00
Cameron Zwarich
0113e4e3f2
Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointless
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piclabel operand. The operand in the tablegen definition doesn't actually turn
into an MI operand, so it just confuses anything checking the TargetInstrDesc
for the number of operands. It suffices to just have an implicit def of LR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:56:28 +00:00
Cameron Zwarich
462b6dc6bf
Reuse the TargetInstrDesc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:56:23 +00:00