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16423 Commits

Author SHA1 Message Date
Jim Grosbach
bade37bb8b Make <target>CodeEmitter::getBinaryCodeForInstr() a const method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-08 00:21:28 +00:00
Chris Lattner
05e27c5786 Use the new TB_NOT_REVERSABLE flag instead of special 
casing FsMOVAPDrr/FsMOVAPSrr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116016 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-08 00:03:02 +00:00
Chris Lattner
a228376185 simplify some map operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116014 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 23:57:02 +00:00
Chris Lattner
122e2ea043 Reimplement (part of) the or -> add optimization. Matching 'or' into 'add' 
is general goodness because it allows ORs to be converted to LEA to avoid
inserting copies.  However, this is bad because it makes the generated .s
file less obvious and gives valgrind heartburn (tons of false positives in
bitfield code).

While the general fix should be in valgrind, we can at least try to avoid
emitting ADD instructions that *don't* get promoted to LEA.  This is more
work because it requires introducing pseudo instructions to represents
"add that knows the bits are disjoint", but hey, people really love valgrind.

This fixes this testcase:
https://bugs.kde.org/show_bug.cgi?id=242137#c20

the add r/i cases are coming next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116007 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 23:36:18 +00:00
Evan Cheng
344d9db970 Code refactoring. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116002 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 23:12:15 +00:00
Chris Lattner
45a1cb26a3 Reduce casting in various tables by defining the table 
with the right types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 23:08:41 +00:00
Chris Lattner
afcd543a55 simplify code: don't build up vector only to assert it is empty. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115997 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 22:26:19 +00:00
Owen Anderson
ce665bd2e2 Now with fewer extraneous semicolons! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 22:25:06 +00:00
Jim Grosbach
d6d4b42ba4 Trivial MC code emitter shell. No instruction forms actually handled yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115993 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 22:12:50 +00:00
Jim Grosbach
9af82ba42b Include the auto-generated bits for machine encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115987 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 21:57:55 +00:00
Eric Christopher
df1f5a924e Remember to promote load/store types for stack to register size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 21:40:18 +00:00
Chris Lattner
9649e9acdd convert test to use the existing classes that the multipatterns 
use.  Since TEST is completely different than all other binops,
don't define a multipattern for it.

This completes factorization of binops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115982 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 21:31:03 +00:00
Chris Lattner
00e94baf4e convert cmp to use a multipattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115978 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:56:25 +00:00
Evan Cheng
835580fc3a Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:50:20 +00:00
Jim Grosbach
ae93ed1dd7 ARM instruction don't have instruction prefixes, so remove the helper functions 
for them from the MCCodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115975 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:41:30 +00:00
Chris Lattner
9e94000c16 reduce redundancy between pattern copies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115968 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:14:23 +00:00
Chris Lattner
a2b8b16c7e the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115967 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:06:24 +00:00
Owen Anderson
154c5c46fc Improve comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115966 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:05:18 +00:00
Chris Lattner
a3208e122c convert adc/sbb to a multipattern. Because the adde/sube nodes 
are not defined as returning EFLAGS (like add_flag and friends),
the entire multipattern and several of the subclasses need to be
cloned.

This could be handled through better instantiation support in tblgen,
but it isn't meta enough.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:01:55 +00:00
Owen Anderson
9966306aa7 Add initialization routines for Target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115957 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 18:50:11 +00:00
Jakob Stoklund Olesen
8456c4f957 Fix obvious mistake pointed out by Michael Spencer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 18:47:10 +00:00
Kalle Raiskila
218c98c284 Add the missing cases to the type->registerclass conversion function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115921 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 16:32:42 +00:00
Kalle Raiskila
8a52fa674b Implement two virtual functions in SPUTargetLowering. 
Before the implementation of isLegalAddressingMode, some rare cases 
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a 
bad TargetLowering, or if the bug is elsewhere and this patch just 
hides it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115919 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 16:24:35 +00:00
Eric Christopher
ee56ea6243 Use the correct register class for load instructions - fixes 
compilation of MultiSource/Benchmarks/Bullet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115907 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 05:50:44 +00:00
Eric Christopher
5d18d92aad Use the correct register class here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115906 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 05:39:19 +00:00
Eric Christopher
338c253d7e Use the thumb2 conditional move instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115905 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 05:31:49 +00:00
Eric Christopher
1107734e22 Remove in-progress assertion, add TODO. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115904 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 05:14:08 +00:00
Evan Cheng
5a50ceeaea Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vldr / vstr, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115898 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 01:50:48 +00:00
Chris Lattner
b046810fe4 add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS, 
allowing us to convert ADD over.  deletes 160 lines of .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115897 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 01:37:01 +00:00
Chris Lattner
521ff704a1 Fix a few issues in ArithBinOpEFLAGS that made it specific to and. 
Start using ArithBinOpEFLAGS for OR, XOR, and SUB.

This removes 500 lines from the .td file.  Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115896 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 01:26:27 +00:00
Chris Lattner
4b181c87de Convert 'and' to single instance of a multipattern 
which instantiates the 34 versions of and all in one
swoop.  The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.

No change in the generated .inc files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115893 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 01:10:20 +00:00
Jim Grosbach
a4257162be Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:53:56 +00:00
Chris Lattner
511c686f76 add a new BinOpAI class to represent the immediate form that directly acts on EAX. 
This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115885 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:43:39 +00:00
Jim Grosbach
3bbdcea49a Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115884 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:42:42 +00:00
Chris Lattner
1bb9adae4c add a bunch of classes for other common patterns. 
As usual, no change in generated .inc files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115882 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:35:28 +00:00
Chris Lattner
2b8d30d080 Define a new BinOpRI8 class and use it to define the imm8 versions of and. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115880 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:12:45 +00:00
Jakob Stoklund Olesen
635127a8c6 Constrain the offset register to a *_NOSP register class when inserting LEA 
instructions.

This unbreaks the machine code verifier and fixes PR8317.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115879 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:07:26 +00:00
Chris Lattner
78266110bf add the pattern operator to match to X86TypeInfo, use this to 
convert AND64ri32 to use BinOpRI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115878 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 00:01:39 +00:00
Jakob Stoklund Olesen
8f42a19fb0 Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass. 
This function looks like it is about ready to be generated by TebleGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115876 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 23:56:46 +00:00
Jim Grosbach
fa7fb64fad remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115860 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 22:46:47 +00:00
Jason W Kim
def9ac48b7 First in a sequence of ARM/MC/*ELF* specific work. 
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115859 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 22:36:46 +00:00
Jim Grosbach
3c38f96af2 Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115853 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 22:01:26 +00:00
Jim Grosbach
1d6111c5ac Kill of the vestiges of the 'call' Modifier (no longer needed for PLT). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115845 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 21:36:43 +00:00
Jim Grosbach
35636281c7 Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed 
"lane" operand modifier.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115843 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 21:22:32 +00:00
Jim Grosbach
65dc30340c Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be 
pseudo instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115840 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 21:16:16 +00:00
Jim Grosbach
7cd2729d2a Add a 'pattern' arg to the ARM PseudoNeonI class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115831 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 20:36:55 +00:00
Jim Grosbach
4dea941c8d target operand flag values aren't a bitmask 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115798 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 16:51:55 +00:00
Evan Cheng
a0792de66c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This 
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 06:27:31 +00:00
Chris Lattner
b2fc409827 enhance X86TypeInfo to include information about the encoding and 
operand kind for immediates.  Use these to define a new BinOpRI
class and switch AND8/16/32ri over to it.  AND64ri32 needs some
more refactoring before it can make the switcheroo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115752 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 05:55:42 +00:00
Chris Lattner
3ab0b59aad add a class for _REV nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115748 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 05:35:22 +00:00
Chris Lattner
08808f9733 sink more intelligence into the ITy base class. Now it knows 
that i8 operations are even and i16,i32,i64 operations have a
low opcode bit set (they are odd).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 05:28:38 +00:00
Chris Lattner
44402c0701 refactor things a bit, now the REX_W and OpSize prefix bytes are inferred from the type info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 05:20:57 +00:00
Chris Lattner
da4b361726 with tblgen suitably extended, we can now get the load node from typeinfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 04:58:43 +00:00
Chris Lattner
417b54354b lets go all meta and define new X86 type wrappers that declare the associated 
gunk that goes along with an MVT (e.g. reg class, preferred load operation,
memory operand)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 00:45:24 +00:00
Chris Lattner
ff27af206e introduce a new BinOpRM class and use it to factor AND*rm. This points out 
that I need a heavier handed approach to get ultimate factorization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115726 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 00:30:49 +00:00
Chris Lattner
c7252ce743 remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places 
where !cast is just as short.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 00:19:21 +00:00
Chris Lattner
78caacc226 replace stuff like: 
let AsmString = !strconcat(
                     !strconcat(!strconcat(opc, "${p}"), !strconcat(".", dt)),
                     !strconcat("\t", asm));

with:

  let AsmString = !strconcat(opc, "${p}", ".", dt, "\t", asm);

:)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 00:05:18 +00:00
Chris Lattner
8d978a75b4 allow !strconcat to take more than two operands to eliminate 
!strconcat(!strconcat(!strconcat(!strconcat

Simplify some x86 td files to use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:58:18 +00:00
Eric Christopher
e540a6f94a Comment out fastisel debugging message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115717 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:50:58 +00:00
Chris Lattner
20b2499a7c associate the instruction suffix letter with the integer gpr 
register class, and use this to simplify use of BinOpRR.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115716 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:43:04 +00:00
Chris Lattner
e00047c906 introduce a new BinOpRR class, and convert 4 and instructions to use it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:32:05 +00:00
Eric Christopher
022b7fb045 Random cleanup and make the intermediate register in fptosi a 
32-bit fp reg, not 64-bit.

Fixes SingleSource.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:13:24 +00:00
Chris Lattner
6dbbff9172 Move cmov pseudo instructions to InstrCompiler, 
convert all the rest of the cmovs to the multiclass,
with good results:

 X86InstrCMovSetCC.td |  598 +--------------------------------------------------
 X86InstrCompiler.td  |   61 +++++
 2 files changed, 77 insertions(+), 582 deletions(-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115707 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:09:10 +00:00
Chris Lattner
25cbf504fe Use #NAME# to have the CMOV multiclass define things with the same names as before 
(e.g. CMOVBE16rr instead of CMOVBErr16).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:00:14 +00:00
Chris Lattner
df72eaef3d enhance tblgen to support anonymous defm's, use this to 
simplify the X86 CMOVmr's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115702 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 22:51:56 +00:00
Chris Lattner
286997c745 convert cmov mr patterns to use a multipattern. Death to redundancy 
and verbosity


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115701 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 22:42:54 +00:00
Chris Lattner
d350e4757e switch CMOVBE to the multipattern: 
21 insertions(+), 53 deletions(-)

Moar change coming before I switch the rest.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115697 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 22:23:58 +00:00
Chris Lattner
e583c892d8 fix a bug I introduced in r115669, which ended up with MOV64mr_TC 
not getting marked as mayStore.  This fixes llvm-gcc bootstrap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115693 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 22:16:48 +00:00
Chris Lattner
b484213d1b add a multiclass for cmov's, but don't start using it yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115692 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 22:01:02 +00:00
Chris Lattner
d244699067 use a multipattern to define setcc instructions: 
X86InstrCMovSetCC.td |  200 ++++++---------------------------------------------
 1 file changed, 27 insertions(+), 173 deletions(-)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 21:34:29 +00:00
Chris Lattner
2c383d8c4d move SETB pseudos into the same place in InstrCompiler.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115686 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 21:18:04 +00:00
Chris Lattner
508fc4708b Replace a gross hack (the MOV64ri_alt instruction) with a slightly less 
gross hack (having the asmmatcher handle the alias).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 21:09:45 +00:00
Chris Lattner
748a2fe917 distribute the rest of the contents of X86Instr64bit.td out to 
the right places.  X86Instr64bit.td now dies, long live x86-64!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 20:49:15 +00:00
Chris Lattner
10701928ff move the rest of the simple 64-bit arithmetic into InstrArithmetic.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115663 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 20:35:37 +00:00
Chris Lattner
5bbbcdb1d8 continue moving 64-bit stuff into X86InstrArithmetic.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 20:23:31 +00:00
Jim Grosbach
d86609fca4 Increase the number of bits used internally by the ARM target to represent the 
addressing mode from four to five.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 18:14:55 +00:00
Chris Lattner
64227940e7 move 64-bit add and adc to InstrArithmetic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115632 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 16:59:08 +00:00
Chris Lattner
c7d4655b57 rewrote two addr constraints so that they are only set, not set and then nestedly cleared. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115631 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 16:52:25 +00:00
Chris Lattner
6367cfc470 split the 32-bit integer arithmetic instructions out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115627 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 16:39:12 +00:00
Chris Lattner
5249ff34fb integrate the 64-bit shifts into X86InstrShiftRotate.td. Enough for tonight. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 07:13:35 +00:00
Chris Lattner
5f58e84af8 move 32-bit shift and rotates out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115607 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 07:00:12 +00:00
Chris Lattner
2c065e1c86 add new file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115606 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:52:35 +00:00
Chris Lattner
8917cd3d67 move sign and zero extensions out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115605 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:52:26 +00:00
Chris Lattner
d8cc2722a4 move some instructions from Instr64Bit -> InstrInfo. 
bswap32 doesn't read eflags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115604 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:47:35 +00:00
Chris Lattner
5673e1d314 move CMOV_FR32 and friends to InstrCompiler, since they are 
pseudo instructions.

Move POPCNT to InstrSSE since they are SSE4 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:41:40 +00:00
Chris Lattner
41efbfaa66 move various pattern matching support goop out of X86Instr64Bit, to live 
with the 32-bit stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115602 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:37:31 +00:00
Chris Lattner
35649fc3dd split conditional moves and setcc's out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:33:16 +00:00
Chris Lattner
d3f033d969 move string pseudo instructions to InstrCompiler consolidate 64-bit and 32-bit together. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115600 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:27:48 +00:00
Chris Lattner
010496c6a7 move the atomic pseudo instructions out to X86InstrCompiler.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:22:35 +00:00
Chris Lattner
8af88ef157 move more pseudo instructions out to X86InstrCompiler.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115598 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:10:16 +00:00
Chris Lattner
d071b83b5d move VMX instructions out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:06:53 +00:00
Chris Lattner
87be16a9e1 continue moving stuff out to X86InstrSystem.td. Move 
control flow stuff out to X86InstrControl.td.  Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:04:14 +00:00
Michael J. Spencer
f000a7a212 fix MSVC 2010 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:00:43 +00:00
Michael J. Spencer
2bbb769091 Cleanup Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:00:33 +00:00
Chris Lattner
434c7cb8a1 refactor .td files a bit, moving system instructions out to X86InstrSystem.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 05:32:15 +00:00
Jim Grosbach
33caa07cc5 Re-apply r115363 and r115366 now that r115525 has removed the un-needed header 
that caused the circular dependencies on Linux.

Built OK for me on OSX and Linux (Ubuntu) with configure/make and CMake. Will
keep an eye on the bots....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 00:34:11 +00:00
Bill Wendling
6cf6c79e82 The pshufw instruction came about in MMX2 when SSE was introduced. Don't place 
it in with the SSSE3 instructions.

Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-04 20:24:01 +00:00
Jim Grosbach
c5ccf73dee Remove unneeded header 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115525 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-04 17:53:40 +00:00
Jan Wen Voung
083cf1574f Add hook in MCSection to decide when to use "optimized nops", for each 
section kind. Previously, optimized nops were only used for MachO.
Also added tests for ELF and COFF.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-04 17:32:41 +00:00
Anton Korobeynikov
e7beda183d va_args support for Win64. 
Patch by Cameron!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 22:52:07 +00:00
Anton Korobeynikov
6af61ca789 Properly emit stack probe on win64 (for non-mingw targets). 
Based on the patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115479 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 22:02:38 +00:00
Eli Friedman
d32d85e5ba Add 3DNowA instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 20:23:13 +00:00
Chris Lattner
591d76ea5a the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 19:09:13 +00:00
Rafael Espindola
0febc4657b Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do 
so and also change X86 for consistency.

Investigating if this can be improved a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:59:45 +00:00
Chris Lattner
cc07d7116a add support for the prefetch/prefetchw instructions, move femms into 
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:42:30 +00:00
Chris Lattner
f132fa0e74 what the heck, add support for the rest of the 3dNow! binary operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115467 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:24:18 +00:00
Chris Lattner
548abfcbd6 Implement support for the bizarre 3DNow! encoding (which is unlike anything 
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:08:05 +00:00
Evan Cheng
ec45f60cab Major changes to Cortex-A9 itinerary. 
1. Model dual issues as two FUs.
2. Model the pipelines correctly: two symmetric ALUs, the multiplier is a
   dependent pipeline on ALU0.
The changes do not have much impact on codegen right now. But I plan to make
pre-RA scheduler multi-issue aware which should take good advantage of the
changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 02:03:59 +00:00
Chris Lattner
7330d97069 stub out a header to put 3dNow! instructions into. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115429 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 23:06:23 +00:00
Chris Lattner
d476914607 fix a regression introduced in r115243, in which the instruction 
backing int_x86_ssse3_pshuf_w got removed.  This caused PR8280.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 21:32:15 +00:00
Nick Lewycky
d0669493b8 Wind these directories back too. File adds and removes are properly represented 
in patches. :-(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115396 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 01:16:59 +00:00
Nick Lewycky
0e7fdf5f09 Continue reverting r115363. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115395 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 01:08:17 +00:00
Nick Lewycky
c57707dd87 Revert patches r115363 r115367 r115391 due to build breakage: 
llvm[2]: Updated LibDeps.txt because dependencies changed
llvm[2]: Checking for cyclic dependencies between LLVM libraries.
find-cycles.pl: Circular dependency between *.a files:
find-cycles.pl:   libLLVMMSP430AsmPrinter.a libLLVMMSP430CodeGen.a



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115393 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 01:06:42 +00:00
Jim Grosbach
0e69aff03a Update CMake files for recent AsmPrinter->InstPrinter changes. Can someone who 
is more familiar with CMake please review?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115391 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 00:39:56 +00:00
Eric Christopher
890dbbec57 Start on lowering global addresses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115390 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 00:32:44 +00:00
Jim Grosbach
443e625d8a PrintSpecial() can go away now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:27:48 +00:00
Eric Christopher
c9932f6f60 Stub out constant GV handling, fixes C++ eh tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115375 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:24:42 +00:00
Jim Grosbach
78890f41f4 Nuke the rest of the :comment references 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115373 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:21:38 +00:00
Jim Grosbach
adde5da638 Nuke a bunch of no-longer-needed comment-only asm strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115370 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 23:09:33 +00:00
Jim Grosbach
7722980950 Now that the asmprinter itself isn't in the subdir, rename 'AsmPrinter' to 
'InstPrinter' to fall into line with the other MC-ized assembly printer
using targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115367 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:57:18 +00:00
Evan Cheng
055028215d Fix r115332: correctly model AGU / NEON mux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115365 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:52:29 +00:00
Owen Anderson
e3cc84a43d Thread the determination of branch prediction hit rates back through the if-conversion heuristic APIs. For now, 
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:45:50 +00:00
Jim Grosbach
6314ef9e81 Move the asmprinter and MC lowering out of the AsmPrinter (soon to be 
InstPrinter) subdir

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115363 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:45:38 +00:00
Jim Grosbach
7ac1609a3b Rename the AsmPrinter directory to InstPrinter for those targets that have 
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:39:28 +00:00
Evan Cheng
ef0ccad725 Fix scheduling infor for vmovn and vshrn which I broke accidentially. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:48:06 +00:00
Evan Cheng
df9da6a033 Add operand cycles for vldr / vstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115353 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:40:30 +00:00
Eric Christopher
e6ca6771e3 Direct calls only for arm fast isel for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 21:33:12 +00:00
Evan Cheng
cae6a12a99 NEON scheduling info fix. vmov reg, reg are single cycle instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115344 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:50:58 +00:00
Eric Christopher
45547b844d Fix thinko on store instructions. Fixes test_indvars failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:46:04 +00:00
Owen Anderson
00d4f48168 Make the spelling of the flags for old-style if-conversion heuristics consistent between ARM and Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115341 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:33:47 +00:00
Owen Anderson
aa9f0a57d0 Provide an option to restore old-style if-conversion heuristics for Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 20:28:06 +00:00
Evan Cheng
7c3423f413 Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 19:41:46 +00:00
Jim Grosbach
bffa1a5cf3 grammar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115314 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 14:57:48 +00:00
Benjamin Kramer
b0f96facd6 Delete token *after* reading from it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115311 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 12:25:27 +00:00
Kalle Raiskila
8258135c90 Zap some redundant 'ori $?, $?, 0' from SPU. 
Also remove some code that died in the process.
One now non-existant ori is checked for.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115306 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 09:20:01 +00:00
Eric Christopher
14df88282b Implement double return values in calls. Fixes 
SingleSource/Regression/C/casts.c.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115246 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 00:00:11 +00:00
Dale Johannesen
0488fb649a Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 23:57:10 +00:00
Owen Anderson
b3c04ec956 Temporarily add a flag to make it easier to compare the new-style ARM if 
conversion heuristics to the old-style ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115239 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 23:48:38 +00:00
Jim Grosbach
ddcf859851 Clean up asm writer usage for x86 and msp430 to flag that the writer should 
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115238 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 23:40:25 +00:00
Eric Christopher
086378597d Movement and cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115225 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 22:34:19 +00:00
Eric Christopher
f9764fa14f Start of generalized call support for ARM fast isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115203 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 20:49:44 +00:00
Jim Grosbach
a3fbadfcd8 Nuke a few more unused asm strings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 19:53:58 +00:00
Jim Grosbach
3787a40e03 Move getPointerSize() to the base class since it's not dependent on MachO 
vs. ELF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:45:51 +00:00
Jim Grosbach
af2a8b21f1 Remove extraneous ';' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:19:17 +00:00
Chris Lattner
905f2e0669 preemptively add the rest of the non-n fpstack instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:11:29 +00:00
Jim Grosbach
71d933a49e The asm strings are never used at all, so just nuke 'em entirely. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115160 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:56:53 +00:00
Chris Lattner
9ee4aed3b6 implement support for finit, PR8258 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115156 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:42:53 +00:00
Chris Lattner
0bb83a84d4 add support for fstcw, PR8259 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:39:29 +00:00
Kevin Enderby
8ebf66236e Adds getPointerSize() to the AsmBackend which will be needed by the final patch 
for the dwarf .loc support to emit dwarf line number tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:38:07 +00:00
Jim Grosbach
2f24c4ece0 80 column fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115149 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 15:25:22 +00:00
Jason W Kim
a4c27248b5 Fix two tiny issues (ARM does not need COFF) and comment sanity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 14:58:19 +00:00
Jim Grosbach
f73fd7278f trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115136 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:21:00 +00:00
Jim Grosbach
87dc3aa2d8 Remove misplaced ';'. Make buildbots happy, hopefully. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115135 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:20:34 +00:00
Rafael Espindola
a8c02c3bdd Correctly produce R_X86_64_32 or R_X86_64_32S. 
With this patch in

movq    $foo, foo(%rip)
foo:
.long   foo

We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:11:42 +00:00
Jason W Kim
afd1cc2578 Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:45:56 +00:00
Jim Grosbach
7ebc863c15 Go ahead and jump! 
Now that the MC lowering handles the expansion of the pseudos, kill the horrible
blobs of text.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:18:06 +00:00
Jason W Kim
d4d4f4f488 I added a new file ARMAsmBackend which stubs out in similar ways to 
the eqv X86 class.
For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend
(also mimicking X86)

Tested against -r115126



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115129 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:17:26 +00:00
Jim Grosbach
a4e97de71d Now that the pseudos that needed this are all custom lowered, we can go back 
to an empty PrintSpecial()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115128 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 02:02:22 +00:00
Jim Grosbach
2317e40539 Nuke it from orbit. It's the only way to be sure. 
(Kill the dead non-MC asm printer for the ARM target.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115127 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 01:57:53 +00:00
Evan Cheng
0e55fd61ae ARM instruction itinerary fixes: 
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 01:08:25 +00:00
Benjamin Kramer
9510a2538b Add constant folding for strspn and strcspn to SimplifyLibCalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 00:58:35 +00:00
Eric Christopher
a9a7a1a9a5 Refactor arm fast isel libcall handling so that pieces can be used 
for generic call handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115105 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 23:11:09 +00:00
Eric Christopher
e487b017e9 Noticed by inspection when looking for other cmov bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115100 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 23:00:29 +00:00
Evan Cheng
3881cb7a5d Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP 
pipeline forwarding path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 22:42:35 +00:00
Eric Christopher
8cf6c60710 Add a convenience variable so I'm not chasing all over looking for 
a context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 22:24:45 +00:00
Jim Grosbach
828916203a Add specializations of addrmode2 that allow differentiating those forms 
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 19:03:54 +00:00
Nick Lewycky
8892b033e4 Add parens to fix GCC warning: 
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 18:56:57 +00:00
Chris Lattner
a25f933396 implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 18:39:16 +00:00
Bob Wilson
7122ba7efb Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. 
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 17:54:10 +00:00
Jim Grosbach
be91232900 Add braces for legibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115043 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 17:32:29 +00:00
Jim Grosbach
b454cdaebc One Printer to rule them all, One Printer to find them, 
One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115038 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 15:23:40 +00:00
Gabor Greif
05642a3eba improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2 
added some doxygen on the way

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115033 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 10:12:08 +00:00
Chris Lattner
6f42027263 fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 05:05:03 +00:00
Chris Lattner
f3654db458 add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115027 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 04:55:40 +00:00
Chris Lattner
78a194693b make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same 
order as cctools for diffability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 03:43:43 +00:00
Chris Lattner
8a5072903e implement support for 32-bit address operands in 64-bit mode, which 
are defined to emit the 0x67 prefix byte.  rdar://8482675


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115021 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 03:33:25 +00:00
Chris Lattner
b2ef4c1235 add basic avx support to the disassembler, also teach it about ssmem/sdmem 
operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115019 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:57:56 +00:00
Chris Lattner
bf6018ac5a add asmparser support for cvttpd2dq by removing some Int_ prefixes. 
Clean up cvttps2dq by removing some redundant implementations of the
same instruction.  rdar://8456382


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:36:32 +00:00
Chris Lattner
0c04e4f58f implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115017 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:24:57 +00:00
Chris Lattner
7c51a3172c implement rdar://8456378 and PR7557 - support for the fstsw, 
an instruction that requires a WHOLE NEW wonderful kind of alias.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115015 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:50:45 +00:00
Chris Lattner
7036f8be4d change the protocol TargetAsmPArser::MatchInstruction method to take an 
MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115014 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:42:58 +00:00
Eric Christopher
229207aa2e Rework comparison handling to set a register on true/false. This avoids 
problems with phi-nodes in blocks that have hard and not virtual registers.

Accordingly update branch handling to compensate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115013 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:14:47 +00:00
Eric Christopher
f8476e6742 Remove unnecessary set ahead of time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115011 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:50:57 +00:00
Evan Cheng
5d42c567c9 Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115010 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:49:25 +00:00
Eric Christopher
98de5b4603 Remove assert, add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:49:09 +00:00
Evan Cheng
7e1bf305cf Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115008 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 00:27:46 +00:00
Evan Cheng
63d66eed16 Add support to model pipeline bypass / forwarding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 23:50:49 +00:00
Eric Christopher
744c7c8e1b 32-bit constant ints only for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 22:47:54 +00:00
Oscar Fuentes
3609eb0de2 Removed a bunch of unnecessary target_link_libraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 22:39:14 +00:00
Owen Anderson
654d5440a4 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:57:50 +00:00
Eric Christopher
fd60980eb2 Integer materialization needed the same thinko change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:55:34 +00:00
Nick Lewycky
a6136b7156 Resolve this GCC warning: 
ARMTargetMachine.cpp:53: error: control reaches end of non-void function


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:40:26 +00:00
Anton Korobeynikov
4f922f2cca User proper libcall names & condcodes while compiling for ARM EABI. 
Patch by Evzen Muller!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114991 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 21:39:26 +00:00
Owen Anderson
b20b85168c Part one of switching to using a more sane heuristic for determining if-conversion profitability. 
Rather than having arbitrary cutoffs, actually try to cost model the conversion.

For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114973 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 18:32:13 +00:00
Jim Grosbach
2d0f53bd63 Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 17:05:56 +00:00
Oscar Fuentes
c577c271b1 Use the canonical library name for library PIC16Passes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114953 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 14:24:47 +00:00
Oscar Fuentes
4dbb2dbf76 Added library LLVMPIC16passes to CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 14:02:45 +00:00
Oscar Fuentes
38e1390c29 Add ARM Disassembler to the CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 11:48:19 +00:00
Che-Liang Chiou
acf1d482bf Remove trailing spaces of MipsMachineFunction.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 10:06:53 +00:00
Che-Liang Chiou
36919ac8a5 Remove trailing spaces of MipsTargetObjectFile.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-28 09:55:24 +00:00