6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-23 16:30:00 +00:00
Code Issues Projects Releases Wiki Activity
29,547 Commits 39 Branches 0 Tags 277 MiB
128a7a7a4a
Commit Graph

7205 Commits

Author SHA1 Message Date
Evan Cheng
b38cba928e ARM callseq_end should have a input flag operand so it would be scheduled right after the call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33832 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 09:11:58 +00:00
Evan Cheng
fc4034259f Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33831 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 08:53:01 +00:00
Bill Wendling
736610c874 Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses 
non-Mach-O-specific information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33819 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 02:41:58 +00:00
Bill Wendling
e318391d4d Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The 
PPCMachOWriter is now trivial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33818 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 02:40:57 +00:00
Bill Wendling
d118cd27e3 Put destructor out-of-line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33817 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 02:40:10 +00:00
Evan Cheng
bd5d3dbdbe - Branch max. displacement calculation bug. 
- Add debugging info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33811 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-03 02:08:34 +00:00
Lauro Ramos Venancio
4642ca6589 bugfix: SP isn't resetted when function has FP and there is no spills. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33800 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 23:08:40 +00:00
Evan Cheng
a21335dd76 Another thumb large stack offset codegen bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33795 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 21:08:39 +00:00
Evan Cheng
05cc424082 Use MBB.empty() instead of MBB.size() for speed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33789 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 19:09:19 +00:00
Evan Cheng
1dd6a606ad Watch out for empty BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33788 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 18:49:02 +00:00
Evan Cheng
f48ae3353e Ugh. Only meant to do this in thumb mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33780 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 08:58:48 +00:00
Chris Lattner
2d1222c060 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33778 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 04:36:46 +00:00
Reid Spencer
832254e1c2 Changes to support making the shift instructions be true BinaryOperators. 
This feature is needed in order to support shifts of more than 255 bits
on large integer types.  This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
   shl i32 %X, 1
instead of
   shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 02:16:23 +00:00
Evan Cheng
9a2ef9509e Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33775 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-02 01:53:26 +00:00
Evan Cheng
b0636156ef Thumb does not have clz. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33773 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 23:34:03 +00:00
Lauro Ramos Venancio
c33f674ca3 Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33763 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 21:43:53 +00:00
Evan Cheng
556f33c6e2 Pasto. Lots of it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33762 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 20:44:52 +00:00
Lauro Ramos Venancio
6f46e59d2a Fix .thumb_func directive on linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33759 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 18:25:34 +00:00
Jim Laskey
b82313fdc2 Support for non-landing pad exception handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33755 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 16:31:34 +00:00
Evan Cheng
b43216ee4a - Off by one bugs in maximum displacement calculation / testing. 
- In thumb mode, a new constpool island BB size should be 4 + 2 to
  compensate for the potential padding due to alignment requirement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33753 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 10:16:15 +00:00
Anton Korobeynikov
b25fe82671 Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only 
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33752 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 08:39:52 +00:00
Evan Cheng
e0c2b6b9a8 .set pc relative displacement bug: label should be moved down one instruction 
to just before the add r1, pc:

Before:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

Now:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
        mov r1, #PCRELV0
LPCRELL0:
        add r1, pc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33744 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 03:04:49 +00:00
Evan Cheng
736cefff85 Add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33743 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 02:46:20 +00:00
Evan Cheng
9312313a56 Also set alignment of stack-based structs to 4 in thumb mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33741 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 02:18:36 +00:00
Evan Cheng
9d945f78e5 Special epilogue for vararg functions. We cannot do a pop to pc because 
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
        pop {r4, r5, r6, r7}
        pop {r3}
        add sp, #3 * 4
        bx r3


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33739 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 01:49:46 +00:00
Evan Cheng
2021abe154 Pessmistically assume the .align 2 before the first constpool entry adds 
two bytes padding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33734 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 01:09:47 +00:00
Evan Cheng
5b49ab9996 Possible JT improvements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33733 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 01:07:48 +00:00
Chris Lattner
9aa2895360 Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33732 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-01 00:39:08 +00:00
Evan Cheng
3bf12d0460 Don't emit unnecessary .align directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33729 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 23:39:39 +00:00
Evan Cheng
a2e35588c6 Handle an interesting corner case: the constpool_entry being reference is two 
instructions away, i.e. its address is equal to PC.
        %r0 = tLDRpci <cp#0>
        bx
        CONSTPOOL_ENTRY 0 <cp#0>, 4


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 23:35:18 +00:00
Evan Cheng
7588ad478a Don't want to add FramePtr to callee save spill list twice. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33727 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 23:17:29 +00:00
Evan Cheng
3548006a29 Darwin ABI requires FP to point to stack slot of prev FP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33724 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:25:33 +00:00
Evan Cheng
11a065e599 Add entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33723 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:11:38 +00:00
Evan Cheng
0fa10515ee Thumb add sp, #imm requires the immediate value be multiple of 4. For now, 
change preferred alignment of short, byte, bool to 4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33722 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:08:40 +00:00
Evan Cheng
86eb515359 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33721 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 22:06:44 +00:00
Evan Cheng
dff1ab2001 Dead comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33719 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 21:31:25 +00:00
Evan Cheng
3471b60e95 Thumb asm syntax does not want 's' suffix for flag setting opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33717 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 20:12:31 +00:00
Evan Cheng
c0dbec7e10 When determining whether a pc relative branch / load displacement fits in the 
instruction field, adjust it for PC value (4 for thumb, 8 for arm).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33711 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 19:57:44 +00:00
Chris Lattner
95b9d6e5d8 A relatively simple PPC optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33709 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 19:49:20 +00:00
Evan Cheng
a9b8b8d62c Some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33707 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 18:29:27 +00:00
Evan Cheng
934536dab2 ConstPool island bug: watch out for cases where UserMI is the last MI of the BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33706 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio
b5b84f92bf ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33703 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 13:12:46 +00:00
Evan Cheng
193f850880 Specify the right CC for comparison libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33702 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 09:30:58 +00:00
Evan Cheng
b6ab2547cb Observe -soft-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33699 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 08:40:13 +00:00
Evan Cheng
0c61584d05 - Added Thumb constpool island support. 
- Islands are inserted right after the user MI since thumb LDR cannot encode
  negative offset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33690 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-31 02:22:22 +00:00
Evan Cheng
36640905e1 During PEI, if the immediate value of sp + offset is too large (i.e. something 
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33667 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 23:01:46 +00:00
Evan Cheng
c60e76d139 - Fix codegen for pc relative constant (e.g. JT) in thumb mode: 
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33664 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 20:37:08 +00:00
Reid Spencer
5cbf985dcb For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 20:08:39 +00:00
Evan Cheng
ad1b9a503c Copy and paste bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33658 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 08:22:33 +00:00
Evan Cheng
b267ca17d1 Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33657 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-30 08:04:53 +00:00