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28723 Commits

Author SHA1 Message Date
Reed Kotler
52c03fbb3b Add Simple return instruction to Mips fast-isel 
Reviewers: dsanders

Reviewed by: dsanders

Differential Revision: http://reviews.llvm.org/D3430



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207565 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 17:57:50 +00:00
Daniel Sanders
a70510a1c6 [mips] Remove two more redundant 'let Predicates = [HasStdEnc]' statements that were missed 
Summary:
The InstSE class already initializes Predicates to [HasStdEnc].

No functional change (confirmed by diffing tablegen-erated files before and
after)

Differential Revision: http://reviews.llvm.org/D3548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207558 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 17:04:30 +00:00
Daniel Sanders
8c4dcca434 [mips] Remove more redundant 'let Predicates = [HasStdEnc]' statements 
Summary:
The InstSE class already initializes Predicates to [HasStdEnc].

No functional change (confirmed by diffing tablegen-erated files before and
after)

Differential Revision: http://reviews.llvm.org/D3547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207551 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 16:37:01 +00:00
Daniel Sanders
18f4763a08 [mips] Remove redundant 'let Predicates = [HasStdEnc]' statements 
Summary:
The MipsPat class already initializes Predicates to [HasStdEnc].

No functional change (confirmed by diffing tablegen-erated files before and
after)

Differential Revision: http://reviews.llvm.org/D3546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207548 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 16:24:10 +00:00
Joerg Sonnenberger
edc4595472 Parse and create GOT_PREL relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207526 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 13:42:02 +00:00
Daniel Sanders
285c5693b8 [mips][msa] Fix element extraction where the index is variable. 
Summary:
This isn't supported directly so we splat the vector element and extract
the most convenient copy.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3530

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207524 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 13:31:37 +00:00
Rafael Espindola
1c5f439f41 Centralize the handling of the thumb bit. 
This patch centralizes the handling of the thumb bit around
MCStreamer::isThumbFunc and makes isThumbFunc handle aliases.

This fixes a corner case, but the main advantage is having just one
way to check if a MCSymbol is thumb or not. This should still be
refactored to be ARM only, but at least now it is just one predicate
that has to be refactored instead of 3 (isThumbFunc,
ELF_Other_ThumbFunc, and SF_ThumbFunc).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207522 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 12:46:50 +00:00
Tim Northover
d5d3e188f0 X86: emit hidden stubs into a proper non_lazy_symbol_pointer section. 
rdar://problem/16660411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207518 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 10:06:10 +00:00
Tim Northover
8ea9566fee ARM: emit hidden stubs into a proper non_lazy_symbol_pointer section. 
rdar://problem/16660411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207517 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 10:06:05 +00:00
Benjamin Kramer
43705683fd AArch64: Mark vector long multiplication as expand. 
There are no patterns for this. This was already fixed for ARM64 but I forgot
to apply it to AArch64 too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207515 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 09:37:54 +00:00
Elena Demikhovsky
e3e08acd09 AVX-512: optimized a shuffle pattern to VINSERTI64x4. 
Added intrinsics for VPERMT2PS/PD/D/Q instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207513 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 09:09:15 +00:00
Craig Topper
eda7f44b27 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207511 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:58:41 +00:00
Craig Topper
0fd57f4b56 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. AArch64 edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207510 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:58:34 +00:00
Craig Topper
a4f9f5e7de [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. ARM64 edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207509 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:58:25 +00:00
Craig Topper
aab65f8023 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207508 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:58:16 +00:00
Craig Topper
e17a0260a8 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. MSP430 edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207507 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:58:09 +00:00
Craig Topper
91b10fb0e9 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207506 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:58:02 +00:00
Craig Topper
6b7b725179 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. NVPTX edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207505 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:57:44 +00:00
Craig Topper
e651935ab8 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. PowerPC edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207504 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:57:37 +00:00
Craig Topper
c279ae979e [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207503 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:57:24 +00:00
Craig Topper
47f50878a9 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Sparc edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207502 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:57:13 +00:00
Craig Topper
d4657fb0c1 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. XCore edition 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207501 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:57:00 +00:00
Hao Liu
5bbe6121c3 [ARM64]Fix a bug about incorrect operand order in an EXT instruction, which is introduced by r207485. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207500 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 07:51:19 +00:00
Hao Liu
270f09d712 [ARM64]Fix a bug when lowering shuffle vector to an EXT instruction. 
E.g. Mask like <-1, -1, 1, ...> will generate incorrect EXT index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207485 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 01:50:36 +00:00
Eric Christopher
aa475b48cc None of these targets actually define their own CFI_INSTRUCTION 
opcode so there's no reason to use the target namespace for it
rather than TargetOpcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207475 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 00:16:46 +00:00
Eric Christopher
dc1721b004 80-column fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207474 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 00:16:42 +00:00
Eric Christopher
3756feaadc 80-column, tab characters, comment fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207473 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 00:16:40 +00:00
Eric Christopher
4ffd83b92b Fix 80-columns, tab characters, and comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207472 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-29 00:16:33 +00:00
Quentin Colombet
aec1f2c2f5 [X86] Add more details in the comments of X86TargetLowering::getScalingFactorCost. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207432 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 18:39:57 +00:00
Chad Rosier
2f3691eb61 [ARM64] Fix an issue where we were always assuming a copy was coming from a D subregister. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207423 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 16:21:50 +00:00
Tim Northover
fc1cc11670 ARM: stop passing unused values up the TableGen hierarchy. 
It's bad enough that I have to look up 5 different levels of TableGen class
definitions to work out what bits go where in a simple NEON instruction anyway,
without having to keep track of umpteen unused parameters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207420 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 13:53:00 +00:00
Patrik Hagglund
696bbc59ae Fix gcc -Wsign-compare warning in X86DisassemblerTables.cpp. 
X86_MAX_OPERANDS is changed to unsigned.

Also, add range-based for loops for affected loops. This in turn
needed an ArrayRef instead of a pointer-to-array in
InternalInstruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207413 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 12:12:27 +00:00
Tim Northover
16aac4387f ARM64: diagnose use of v16-v31 in certain indexed NEON instructions. 
Someone couldn't bear to have a completely orthogonal set of floating-point
registers, so we've got some instructions that only accept v0-v15 (coming in
ARMv9, V128_prime: you're allowed v2, v3, v5, v7, ...).

Anyway, we were permitting even the out of range registers during assembly
(CodeGen handled it correctly). This adds a diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207412 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 11:27:43 +00:00
Hao Liu
0ddc7447d9 [ARM64]Fix a bug cannot select UQSHL/SQSHL with constant i64 shift amount. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207399 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 07:34:27 +00:00
Craig Topper
7d811a53de Convert more SelectionDAG functions to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207397 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 05:57:50 +00:00
Craig Topper
c34a25d59d [C++] Use 'nullptr'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207394 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-28 04:05:08 +00:00
Rafael Espindola
2dc04b4604 Add emitThumbSet to the arm target streamer. 
This fixes the asm printer implementation and lets the parser be unaware of
what .thumb_set is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207381 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 20:23:58 +00:00
Craig Topper
f564ea31f0 Convert SelectionDAG::MorphNodeTo to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207378 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 19:21:16 +00:00
Craig Topper
1aa05f3844 Convert SelectionDAG::SelectNodeTo to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207377 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 19:21:11 +00:00
Craig Topper
7e1ae6d9e0 Convert one last signature of getNode to take an ArrayRef of SDUse. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207376 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 19:21:06 +00:00
Craig Topper
a7f892b33b Convert SelectionDAG::getMergeValues to use ArrayRef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207374 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 19:20:57 +00:00
Benjamin Kramer
3551384ae2 X86TTI: Adjust sdiv cost now that we can lower it on plain SSE2. 
Includes a fix for a horrible typo that caused all SDIV costs to be
slightly off :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207371 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 18:47:54 +00:00
Benjamin Kramer
ad1f916eaf X86: If SSE4.1 is missing lower SMUL_LOHI of v4i32 to pmuludq and fix up the high parts. 
This is more expensive than pmuldq but still cheaper than scalarizing the whole thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207370 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 18:47:41 +00:00
Rafael Espindola
70883a252c Avoid using MCSymbolData on the asm streamer. 
Only the object streamers need to track if a symbol should be marked thumb or
not. This ports the ELF case. The COFF case is not ported since it is currently
not working for some other reason (I will report a bug).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207366 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 17:10:46 +00:00
Saleem Abdulrasool
f090afddb4 ARM: MSVC does not support = default 
Explicitly "implement" the destructor as MSVC does not support defaulted methods
yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207350 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 05:28:10 +00:00
Saleem Abdulrasool
2d0d7fd085 Add WoA object file emission support 
Introduce support for WoA PE/COFF object file emission from LLVM.  Add the new
target specific PE/COFF Streamer (ARMWinCOFFStreamer) that handles the ARM
specific behaviour of PE/COFF object emission.  ARM exception information is not
yet emitted and is a TODO item.

The ARM specific object writer (ARMWinCOFFObjectWriter) handles the ARM specific
relocation handling in conjunction with the WinCOFFObjectWriter in the MC layer.
The MC layer needs to be updated to deal with the relocation adjustments.
Branch relocations are adjusted by 4 bytes (unlikely their ELF counterparts).

Minor tweaks to switch multiple conditional checks into equivalent switch
statements.  The ObjectFileInfo is updated to relax the object file setup for
Windows COFF.  Move the architecture checks into an assertion.  Windows COFF is
currently only supported on x86, x86_64, and ARM (thumb).  Rather than
defaulting to ELF, we will refuse to generate an object file.  This is better
though as you do not get an (arbitrary) object file which is different from the
request.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207345 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 03:48:22 +00:00
Saleem Abdulrasool
6c76c959e4 MC: create X86WinCOFFStreamer for target specific behaviour 
This introduces a target specific streamer, X86WinCOFFStreamer, which handles
the target specific behaviour (e.g. WinEH).  This is mostly to ensure that
differences between ARM and X86 remain disjoint and do not accidentally cross
boundaries.  This is the final staging change for enabling object emission for
Windows on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207344 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 03:48:12 +00:00
Saleem Abdulrasool
2c2af22832 ARM: Support SingleParameterDotFile on WoA 
Currently, the integrated assembler is the only choice for assembling Windows on
ARM binaries.  IAS supports the .file <filename> directive which emits the file
symbol into the resulting object binary.  Mark the GNU COFF information to
indicate support for this feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207341 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-27 03:47:57 +00:00
Craig Topper
86d321f9d1 Replace std::vector with SmallVector for some small, known size vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207330 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-26 19:29:47 +00:00
Craig Topper
72c93595de Convert getMemIntrinsicNode to take ArrayRef of SDValue instead of pointer and size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207329 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-26 19:29:41 +00:00