Rafael Espindola
1c3329f707
Fix PR4185.
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Handle FpSET_ST0_80 being used when ST0 is still alive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 12:02:51 +00:00
Chris Lattner
e372333597
simplify closing paren and (rip) printing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73841 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 02:22:53 +00:00
Chris Lattner
4150c086d0
indentation fix
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73840 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 02:22:34 +00:00
Chris Lattner
2f429e5eb6
remove #if 0 code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73837 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 01:48:49 +00:00
Chris Lattner
aecaa1f143
cosmetic changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-21 01:27:55 +00:00
Chris Lattner
5c0b16d0c4
change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
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a global with that gets printed with the :mem modifier. All operands to lea's
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this. There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).
This also makes the use of EBX explicit in the operand list in the 32-bit,
instead of implicit in the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73834 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 20:38:48 +00:00
Chris Lattner
8cb65a5092
remove dead code, the main codepath never has to deal
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with MBB's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 19:34:47 +00:00
Chris Lattner
7680e73341
eliminate the "call" operand modifier from the asm descriptions, modeling
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it as a pcrel immediate instead. This gets pc-rel weirdness out of the
main printoperand codepath.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73829 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 19:34:09 +00:00
Chris Lattner
7f8217f64b
fix edit-o
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 08:13:12 +00:00
Chris Lattner
dc479f6ebf
some comments and cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73818 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 07:59:10 +00:00
Chris Lattner
c12430644a
implement support for lowering subregs when preparing to print
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LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.
Implement support for printing mbb labels as operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 07:03:18 +00:00
Devang Patel
e9fe6c7729
Remove unused field.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73815 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 01:07:54 +00:00
Devang Patel
66b4d3ba52
Initialize MMI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 01:00:07 +00:00
Chris Lattner
ad48be0ea3
hook up printMemReference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 00:50:32 +00:00
Chris Lattner
f38c03af2a
Start implementing translation of MachineInstr to MCInst. Next
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step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73810 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-20 00:49:26 +00:00
Chris Lattner
d5fb790613
stub out some hacky code for wiring up the new asmprinter interfaces
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on X86. Not useful yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 23:59:57 +00:00
Devang Patel
5090f19f09
DwarfWriter is used to emit EH info also.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73792 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 23:21:20 +00:00
Evan Cheng
ae69a2a12b
Enable arm pre-allocation load / store multiple optimization pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 23:17:27 +00:00
Devang Patel
1e86a66b00
mv CodeGen/DebugLoc.h Support/DebugLoc.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 22:08:58 +00:00
Devang Patel
14a55d952c
Move up dwarf writer initialization in common AsmPrinter class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73784 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 21:54:26 +00:00
Anton Korobeynikov
e494b9e0d7
Unbreak cyclic deps
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 19:36:55 +00:00
Chris Lattner
225503a5b5
fix the sparc codegen to not depend on the sparc asmprinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 15:48:10 +00:00
Evan Cheng
b1019480b6
Add comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73761 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 07:06:07 +00:00
Eli Friedman
7e2242be71
Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to
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handle with an SSE2 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73760 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 07:00:55 +00:00
Evan Cheng
7a42b08be8
Should be using Bcc (average) latency to determine if-conversion threshold, not BL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73759 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 06:56:26 +00:00
Eli Friedman
aace4b1a2c
Misc tweaks to Intel asm printing to make it more compatible with MASM.
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Patch by Benedict Gaster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 04:48:38 +00:00
Evan Cheng
974fe5d691
Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 01:59:04 +00:00
Evan Cheng
8557c2bcb8
Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 01:51:50 +00:00
Eli Friedman
6b7bb42c36
Mark a few Thumb instructions commutable; just happened to spot this
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while experimenting. I'm reasonably sure this is correct, but please
tell me if these instructions have some strange property which makes this
change unsafe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 01:43:08 +00:00
Chris Lattner
fadc83c699
add a file I missed, this goes with r73743
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 00:47:59 +00:00
Chris Lattner
475370b036
Add some scaffolding for a new experimental asmprinter
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implementation. The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst. MCInst
and the new asmprinters will not depend on most of the
llvm code generators. This allows building diassemblers
that don't link in the whole llvm code generator. This is
step #1 of many.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 00:47:33 +00:00
Chris Lattner
4e0f25b603
merge the common darwin settings from the X86/PPC/ARM targets
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into DarwinTargetAsmInfo.cpp. The remaining differences should
be evaluated. It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-19 00:08:39 +00:00
Chris Lattner
a93ca92379
move mangler quote handling from asm printers to TargetAsmInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 23:41:35 +00:00
Chris Lattner
7e816dc175
minor cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 23:33:13 +00:00
Chris Lattner
b839c3f577
simplify macro debug info directive handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 23:31:37 +00:00
Evan Cheng
cd828618b8
Remove UseThumbBacktraces. Just check if subtarget is darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 23:14:30 +00:00
Evan Cheng
b13bafe5c1
On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 20:37:15 +00:00
Evan Cheng
f9f1da17f8
- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.
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- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73671 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 02:04:01 +00:00
Dale Johannesen
063989455d
It looks like nobody is working on PR 4158, so I'm
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adding a check to catch this case at compile time
instead of quietly generating incorrect code.
That will at least let us identify CBE failures
that are not due to this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73668 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 01:07:23 +00:00
Bob Wilson
ff6de36558
ARM unified syntax is not specific to ELF; use it for Darwin, too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-18 00:36:17 +00:00
Anton Korobeynikov
7c4f7dd43a
Fix asm string from MOVi16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 23:43:36 +00:00
Anton Korobeynikov
d61eca5330
Thumb2 instructions are enabled only in unified assembler mode.
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Emit switch directive for it. I have no idea whether this is
requirement for Darwin or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73660 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 23:43:18 +00:00
Anton Korobeynikov
52237119a9
Initial support for some Thumb2 instructions.
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Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 18:13:58 +00:00
Devang Patel
369de261e7
Do not use first actual instruction's location for prologue. The debug wants to skip prologue while setting a breakpoint for the function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 00:48:26 +00:00
Chris Lattner
e8f1018130
fix a circular dependency between the mips code generator
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and its asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 22:38:04 +00:00
Douglas Gregor
1555a23335
Introduce new headers whose inclusion forces linking and
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initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 20:12:29 +00:00
Evan Cheng
876eac9da5
CALL64pcrel32 immediate field is 32-bit. Patch by Abhinav Duggal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 19:44:27 +00:00
Anton Korobeynikov
385f5a99ec
Address review comments: add 3 ARM calling conventions.
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Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 18:50:49 +00:00
Anton Korobeynikov
2932795309
GNU as refuses to assemble "pop {}" instruction. Do not emit such
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(this is the case when we have thumb vararg function with single
callee-saved register, which is handled separately).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73529 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 18:49:08 +00:00
Sanjiv Gupta
003263bb9f
Added missing libcalls for floating point to int conversions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 16:17:35 +00:00