Brian Gaeke
4acfd039f9
Asm printer support, based on x86 - only prints mnemonics for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12113 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 06:00:41 +00:00
Brian Gaeke
da69e7d9b3
Double-FP pseudo-registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12112 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 05:15:03 +00:00
Brian Gaeke
775158d62a
Subtract instructions; minor cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12111 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 04:37:45 +00:00
Brian Gaeke
e7173b7e8e
Floating point regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12110 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 04:37:22 +00:00
Brian Gaeke
e806173ab6
Simple copyConstantToReg support, SETHIi and ORri
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12107 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-04 00:56:25 +00:00
Brian Gaeke
bc1d27aa6e
Support add - note, still missing important copyConstantToRegister stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12106 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-03 23:03:14 +00:00
Chris Lattner
b06f103d0c
SPECIFY a target data to initialize the CBE target with. Until now we have
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been using the default target data layout object to lower malloc instructions,
causing us to allocate more memory than we needed! This could improve the
performance of the CBE generated code substantially!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12088 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-03 02:14:15 +00:00
Chris Lattner
2bed9ecc4b
Add a new constructor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12087 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-03 02:12:47 +00:00
Misha Brukman
538607fe45
Doxygenify some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12064 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 23:53:11 +00:00
Chris Lattner
ec726a1a6e
Add this back, as its absence introduces assertions, and it seems to work now
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that Instructions are annotable again
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12045 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 15:28:27 +00:00
Tanya Lattner
f048bfd97d
fix bug in previous checkin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12044 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 15:05:17 +00:00
Brian Gaeke
05b15fb075
TargetCacheInfo has been removed; its only uses were to propagate a constant
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(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 06:43:29 +00:00
Tanya Lattner
9b3cbdbedb
Adding new Modulo Scheduling graph files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12031 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 02:50:57 +00:00
Tanya Lattner
d14b83733e
Removing old graph files with new graph files that I wrote. Updated ModuloScheduling pass, but still in progress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12030 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 02:50:01 +00:00
Chris Lattner
21585221b6
Handle passing constant integers to functions much more efficiently. Instead
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of generating this code:
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
call Y
we now generate:
mov DWORD PTR [%ESP], 4
mov DWORD PTR [%ESP + 4], 123
call Y
Which hurts the eyes less. :)
Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12028 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 02:42:43 +00:00
Chris Lattner
ce6096f49b
Fix a minor code-quality issue. When passing 8 and 16-bit integer constants
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to function calls, we would emit dead code, like this:
int Y(int, short, double);
int X() {
Y(4, 123, 4);
}
--- Old
X:
sub %ESP, 20
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
*** mov %AX, 123
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
fld QWORD PTR [.CPIX_0]
fstp QWORD PTR [%ESP + 8]
call Y
mov %EAX, 0
# IMPLICIT_USE %EAX %ESP
add %ESP, 20
ret
Now we emit:
X:
sub %ESP, 20
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
fld QWORD PTR [.CPIX_0]
fstp QWORD PTR [%ESP + 8]
call Y
mov %EAX, 0
# IMPLICIT_USE %EAX %ESP
add %ESP, 20
ret
Next up, eliminate the mov AX and movsx entirely!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12026 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 02:34:08 +00:00
Chris Lattner
08d4963d49
Move the private MachineInstrAnnot.h into a private directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12003 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 19:12:51 +00:00
Chris Lattner
e85f2348c9
Do not use explicit casts that hide the dependence on Instruction being
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annotable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12000 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 19:02:26 +00:00
Alkis Evlogimenos
96c9b8b496
Add instruction name description.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11998 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 18:44:03 +00:00
Alkis Evlogimenos
7f6124cfc2
Use correct template for SHLD and SHRD instructions so that the memory
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operand size is correctly specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11997 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 09:19:40 +00:00
Alkis Evlogimenos
9c22aeb0b2
Improve allocation order:
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1) For 8-bit registers try to use first the ones that are parts of the
same register (AL then AH). This way we only alias 2 16/32-bit
registers after allocating 4 8-bit variables.
2) Move EBX as the last register to allocate. This will cause less
spills to happen since we will have 8-bit registers available up to
register excaustion (assuming we use the allocation order). It
would be nice if we could push all of the 8-bit aliased registers
towards the end but we much prefer to keep callee saved register to
the end to avoid saving them on entry and exit of the function.
For example this gives a slight reduction of spills with linear scan
on 164.gzip.
Before:
11221 asm-printer - Number of machine instrs printed
975 spiller - Number of loads added
675 spiller - Number of stores added
398 spiller - Number of register spills
After:
11182 asm-printer - Number of machine instrs printed
952 spiller - Number of loads added
652 spiller - Number of stores added
386 spiller - Number of register spills
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11996 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 09:17:01 +00:00
Alkis Evlogimenos
8295f202d9
A big X86 instruction rename. The instructions are renamed to make
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their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:
ADD8rr -> add, 8-bit register, 8-bit register
IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate
IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate
MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 08:50:03 +00:00
Brian Gaeke
6ac5300fbc
Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11994 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 08:40:03 +00:00
Chris Lattner
ee352852e7
Eliminate the X86-specific BMI functions, using BuildMI instead.
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Replace uses of addZImm with addImm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11992 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 07:22:16 +00:00
Chris Lattner
168aa90bf6
Fix a miscompilation of 197.parser that occurs when you have single basic
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block loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11990 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 07:10:16 +00:00
Chris Lattner
dce363d5ec
Adjust to change in TII ctor arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 06:31:44 +00:00
Chris Lattner
bceb68807f
Eliminate the distinction between "real" and "unreal" instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11986 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 06:31:16 +00:00
Chris Lattner
1ddf475b6a
These two virtual methods are never called.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:59:33 +00:00
Chris Lattner
0755912c38
Remove a TON of flags that noone cares about
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11983 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:58:30 +00:00
Chris Lattner
9a945277c0
Noone calls these virtual methods
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11982 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:58:16 +00:00
Chris Lattner
0723969e87
This is the only file in the system that uses this enum. eliminate it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11981 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:57:59 +00:00
Chris Lattner
e1274de2c9
Implement initial prolog/epilog code insertion methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 05:18:30 +00:00
Alkis Evlogimenos
8777d241cf
Use correct template for ADC instruction with memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11974 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 02:18:17 +00:00
Chris Lattner
1c809c594b
Add an instruction selector capable of selecting 'ret void'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11973 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-29 00:27:00 +00:00
Alkis Evlogimenos
da474adb21
SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
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to denote this fact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
8e475b8cfd
Floating point loads/stores act on memory operands. Rename them to
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denote this fact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
91c4b52e7f
Rename instruction templates to be easier to the human eye to
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parse. The name is now I (operand size)*. For example:
Im32 -> instruction with 32-bit memory operands.
Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11970 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
f8da4d8839
Uncomment instructions that take both an immediate and a memory
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operand but their sizes differ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
5ab29b504d
Each instruction now has both an ImmType and a MemType. This describes
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the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 22:02:05 +00:00
Chris Lattner
9ff6ba1ea1
Change this so that LLC actually tries to run the code generator, though it will
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immediately abort due to lack of an instruction selector. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 20:21:45 +00:00
Chris Lattner
8a62384253
SparcV8 now builds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11960 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:54:00 +00:00
Chris Lattner
9a89f37dc7
fine grainify namespacification
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11959 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:53:18 +00:00
Chris Lattner
8d8a6bc7a3
Finegrainify namespacification
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11958 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:52:49 +00:00
Chris Lattner
a85d46eea8
Tab completion is our friend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:45:39 +00:00
Chris Lattner
83ba99ac46
Clean up rules
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:43:40 +00:00
Chris Lattner
275f6459ab
Bring this directory into "it actually compiles" land
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11955 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:37:18 +00:00
Chris Lattner
f13bd49d6a
Fix multiple inclusion problem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11954 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 19:31:32 +00:00
Alkis Evlogimenos
745502a04b
Do not generate instructions with mismatched memory/immediate sized
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operands. The X86 backend doesn't handle them properly right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
84cda0f470
Further comment updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11933 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 03:20:31 +00:00
Alkis Evlogimenos
a643a1a528
Update comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11932 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-28 03:12:31 +00:00