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431 Commits

Author SHA1 Message Date
Dale Johannesen
3f6eb7419d Add APInt interfaces to APFloat (allows directly 
access to bits).  Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling 
(untested, probably does not work).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-11 18:32:33 +00:00
Chris Lattner
61c5ff460b Emit: 
cmpl    %eax, %ecx
        setae   %al
        movzbl  %al, %eax

instead of:

        cmpl    %eax, %ecx
        setb    %al
        xorb    $1, %al
        movzbl  %al, %eax

when using logical not of a C comparison.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41807 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-10 21:39:07 +00:00
Dale Johannesen
c4dd3c3b51 Add mod, copysign, abs operations to APFloat. 
Implement some constant folding in SelectionDAG and
DAGCombiner using APFloat.  Remove double versions
of constructor and getValue from ConstantFPSDNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41664 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-31 23:34:27 +00:00
Dan Gohman
e9c8fa095e Make DAGCombiner's global alias analysis query more precise in the case 
where both pointers have non-zero offsets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41491 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-27 16:32:11 +00:00
Dale Johannesen
e6c1742914 Revise per review comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41409 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-26 01:18:27 +00:00
Dale Johannesen
87503a63d5 Add APFloat interface to ConstantFPSDNode. Change 
over uses in DAGCombiner.  Fix interfaces to work
with APFloats.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41407 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-25 22:10:57 +00:00
Evan Cheng
571c4788d5 Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41163 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-18 05:57:05 +00:00
Dan Gohman
559742c0ea Fix the alias analysis query in DAGCombiner to not add in two 
offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40534 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 16:14:06 +00:00
Dan Gohman
05d92fe7c4 Don't call SimplifyVBinOp for non-vector operations, following earlier review 
feedback. This theoretically makes the common (scalar) case more efficient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39823 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-13 20:03:40 +00:00
Dan Gohman
70fb1aefd5 Fix a bug in the folding of binary operators to undef. 
Thanks to Lauro for spotting this!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38491 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 15:19:29 +00:00
Dan Gohman
d595b5f1f0 Fix the folding of undef in several binary operators to recognize 
undef in either the left or right operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38489 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-10 14:20:37 +00:00
Dan Gohman
d6fd1bc122 Preserve volatililty and alignment information when lowering or 
simplifying loads and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38473 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 22:18:38 +00:00
Chris Lattner
e094f54f4c Fix this warning: 
DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)':
DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)'

oiy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38458 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 16:16:34 +00:00
Dan Gohman
613e0d8008 Fix several over-aggressive folds for undef nodes in dagcombine, to 
follow the rules for undef used in instcombine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37851 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-03 14:03:57 +00:00
Dan Gohman
23ff1826b9 Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, and 
visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG
to use isNegatibleForFree/GetNegatedExpression instead of doing a subset
of the same thing manually.

This fixes test/CodeGen/X86/negative-sin.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37842 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-02 15:48:56 +00:00
Dan Gohman
7f32156bb9 Generalize MVT::ValueType and associated functions to be able to represent 
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-25 16:23:39 +00:00
Dan Gohman
ea859be53c Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-22 14:59:07 +00:00
Evan Cheng
b13cdbd865 Xforms: 
(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37685 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-21 07:39:16 +00:00
Dan Gohman
b5bec2b6f6 Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration 
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 14:13:56 +00:00
Dan Gohman
51eaa86758 Rename MVT::getVectorBaseType to MVT::getVectorElementType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-14 22:58:02 +00:00
Chris Lattner
3adf951364 tighten up recursion depth again 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37330 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-25 02:19:06 +00:00
Evan Cheng
c843abe868 Fix a typo that caused combiner to create mal-formed pre-indexed store where value store is the same as the base pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37318 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-24 02:35:39 +00:00
Chris Lattner
501fee71e0 prevent exponential recursion in isNegatibleForFree 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37310 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-23 07:35:22 +00:00
Dan Gohman
fcc4dd91e5 Qualify calls to getTypeForValueType with MVT:: too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37233 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 18:41:29 +00:00
Dale Johannesen
98a6c62aff Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 22:45:30 +00:00
Chris Lattner
c76d4410ab Use a ptr set instead of a linear search to unique TokenFactor operands. 
This fixes PR1423


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37102 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 06:37:59 +00:00
Evan Cheng
93003b8cf2 Bug fix: should check ABI alignment, not pref. alignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37094 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 02:04:50 +00:00
Lauro Ramos Venancio
b5bb7ffa9c Fix an infinite recursion in GetNegatedExpression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37086 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 17:05:43 +00:00
Chris Lattner
2944652569 implement a simple fneg optimization/propagation thing. This compiles: 
CodeGen/PowerPC/fneg.ll into:

_t4:
        fmul f0, f3, f4
        fmadd f1, f1, f2, f0
        blr

instead of:

_t4:
        fneg f0, f3
        fmul f0, f0, f4
        fmsub f1, f1, f2, f0
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37054 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-14 22:04:50 +00:00
Evan Cheng
2c4f94363a Can't fold the bit_convert is the store is a truncating store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-09 21:49:47 +00:00
Evan Cheng
c2cd2b29f5 Forgot a check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36910 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-07 21:36:06 +00:00
Evan Cheng
59d5b68dff Enable a couple of xforms: 
- (store (bitconvert v)) -> (store v) if resultant store does not require
higher alignment
- (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not
require higher alignment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36908 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-07 21:27:48 +00:00
Evan Cheng
a7d4a04d24 Don't create indexed load / store with zero offset! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36716 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 23:52:19 +00:00
Evan Cheng
498f55989a Forgot about chain result; also UNDEF cannot have multiple values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36622 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 08:53:39 +00:00
Evan Cheng
45a7ca9b23 * Only turn a load to UNDEF if all of its outputs have no uses (indexed loads 
produce two results.)
* Do not touch volatile loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36604 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 00:38:21 +00:00
Christopher Lamb
95c218a83e PR400 phase 2. Propagate attributed load/store information through DAGs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-22 23:15:30 +00:00
Reid Spencer
c67bdc288a Revert Christopher Lamb's load/store alignment changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-21 18:36:27 +00:00
Christopher Lamb
2330e4d4c4 add support for alignment attributes on load/store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-21 08:16:25 +00:00
Chris Lattner
61a4c072b9 allow SRL to simplify its operands, as it doesn't demand all bits as input. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 03:06:49 +00:00
Chris Lattner
ec06e9a670 When replacing a node in SimplifyDemandedBits, if the old node used any 
single-use nodes, they will be dead soon.  Make sure to remove them before
processing other nodes.  This implements CodeGen/X86/shl_elim.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 03:05:22 +00:00
Chris Lattner
95a5e0507e SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits 
a chance to hack on it.  This compiles:

int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

instead of:

_baz:
        srwi r2, r4, 24
        rlwimi r2, r3, 8, 0, 23
        srwi r2, r2, 9
        extsh r3, r2
        blr

This implements CodeGen/PowerPC/sign_ext_inreg1.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36212 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 19:03:21 +00:00
Chris Lattner
c24bbaddf8 fix an infinite loop compiling ldecod, notice by JeffC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 16:51:53 +00:00
Chris Lattner
1eba01e9a0 Fix this harder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35888 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:50:51 +00:00
Chris Lattner
c56a81dff1 don't create shifts by zero, fix some problems with my previous patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35887 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:43:25 +00:00
Chris Lattner
20a35c3fa5 Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often 
allows other simplifications.  For example, this compiles:
int isnegative(unsigned int X) {
   return !(X < 2147483648U);
}

Into this code:

x86:
        movl 4(%esp), %eax
        shrl $31, %eax
        ret
arm:
        mov r0, r0, lsr #31
        bx lr
thumb:
        lsr r0, r0, #31
        bx lr

instead of:

x86:
        cmpl $0, 4(%esp)
        sets %al
        movzbl %al, %eax
        ret

arm:
        mov r3, #0
        cmp r0, #0
        movlt r3, #1
        mov r0, r3
        bx lr

thumb:
        mov r2, #1
        mov r1, #0
        cmp r0, #0
        blt LBB1_2      @entry
LBB1_1: @entry
        cpy r2, r1
LBB1_2: @entry
        cpy r0, r2
        bx lr

Testcase here: test/CodeGen/Generic/ispositive.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35883 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:32:27 +00:00
Chris Lattner
1982ef20c4 Codegen integer abs more efficiently using the trick from the PPC CWG. This 
improves codegen on many architectures.  Tests committed as CodeGen/*/iabs.ll

X86 Old:			X86 New:
_test:				_test:
   movl 4(%esp), %ecx		   movl 4(%esp), %eax
   movl %ecx, %eax		   movl %eax, %ecx
   negl %eax			   sarl $31, %ecx
   testl %ecx, %ecx		   addl %ecx, %eax
   cmovns %ecx, %eax		   xorl %ecx, %eax
   ret				   ret

PPC Old:			PPC New:
_test:				_test:
   cmpwi cr0, r3, -1		   srawi r2, r3, 31
   neg r2, r3			   add r3, r3, r2
   bgt cr0, LBB1_2 ;		   xor r3, r3, r2
LBB1_1: ;			   blr
   mr r3, r2
LBB1_2: ;
   blr

ARM Old:			ARM New:
_test:				_test:
   rsb r3, r0, #0		   add r3, r0, r0, asr #31
   cmp r0, #0			   eor r0, r3, r0, asr #31
   movge r3, r0			   bx lr
   mov r0, r3
   bx lr

Thumb Old:			Thumb New:
_test:				_test:
   neg r2, r0			   asr r2, r0, #31
   cmp r0, #0			   add r0, r0, r2
   bge LBB1_2			   eor r0, r2
LBB1_1: @			   bx lr
   cpy r0, r2
LBB1_2: @
   bx lr


Sparc Old:			Sparc New:
test:				test:
   save -96, %o6, %o6		   save -96, %o6, %o6
   sethi 0, %l0			   sra %i0, 31, %l0
   sub %l0, %i0, %l0		   add %i0, %l0, %l1
   subcc %i0, -1, %l1		   xor %l1, %l0, %i0
   bg .BB1_2			   restore %g0, %g0, %g0
   nop				   retl
.BB1_1:				   nop
   or %g0, %l0, %i0
.BB1_2:
   restore %g0, %g0, %g0
   retl
   nop

It also helps alpha/ia64 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35881 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:11:38 +00:00
Scott Michel
c9dc114578 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL. 
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35605 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-02 21:36:32 +00:00
Dale Johannesen
2041a0ef75 Fix incorrect combination of different loads. Reenable zext-over-truncate 
combination.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35517 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-30 21:38:07 +00:00
Evan Cheng
b0b6c76ffe Disable load width reduction xform of variant (zext (truncate load x)) for 
big endian targets until llvm-gcc build issue has been resolved.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35449 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-29 07:56:46 +00:00
Evan Cheng
15213b77cf SIGN_EXTEND_INREG requires one extra operand, a ValueType node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-26 07:12:51 +00:00
Evan Cheng
dae54ce7fc Adjust offset to compensate for big endian machines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-24 00:02:43 +00:00
Evan Cheng
e177e307fc Make sure SEXTLOAD of the specific type is supported on the target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-23 22:13:36 +00:00
Evan Cheng
b37b80ce46 Also replace uses of SRL if that's also folded during ReduceLoadWidth(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35286 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-23 20:55:21 +00:00
Evan Cheng
0b063def98 A couple of bug fixes for reducing load width xform: 
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35274 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-23 02:16:52 +00:00
Evan Cheng
c88138fb5e More opportunities to reduce load size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35254 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-22 01:54:19 +00:00
Evan Cheng
007b69eeaa fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits)) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35239 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 20:14:05 +00:00
Evan Cheng
83060c544b Avoid combining indexed load further. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35005 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-07 08:07:03 +00:00
Chris Lattner
b654176cb4 fold away addc nodes when we know there cannot be a carry-out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34913 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-04 20:40:38 +00:00
Chris Lattner
bcf2484450 generalize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34910 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-04 20:08:45 +00:00
Chris Lattner
91153686f0 canonicalize constants to the RHS of addc/adde. If nothing uses the carry out of 
addc, turn it into add.

This allows us to compile:

long long test(long long A, unsigned B) {
  return (A + ((long long)B << 32)) & 123;
}

into:

_test:
        movl $123, %eax
        andl 4(%esp), %eax
        xorl %edx, %edx
        ret

instead of:
_test:
        xorl %edx, %edx
        movl %edx, %eax
        addl 4(%esp), %eax   ;; add of zero
        andl $123, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34909 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-04 20:03:15 +00:00
Chris Lattner
2255887574 Fold (sext (truncate x)) more aggressively, by avoiding creation of a 
sextinreg if not needed.   This is useful in two cases: before legalize,
it avoids creating a sextinreg that will be trivially removed.  After legalize
if the target doesn't support sextinreg, the trunc/sext would not have been
removed before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34621 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-26 03:13:59 +00:00
Evan Cheng
fa1eb27b76 Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34065 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-08 22:13:59 +00:00
Evan Cheng
597a3bde35 Fix for PR1108: type of insert_vector_elt index operand is PtrVT, not MVT::i32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33398 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-20 10:10:26 +00:00
Evan Cheng
42d7ccfd8e Remove this xform: 
(shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)
Replace it with:
(add (shl (add x, c1), c2), ) -> (add (add (shl x, c2), c1<<c2), )

This fixes test/CodeGen/ARM/smul.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33361 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-19 17:51:44 +00:00
Chris Lattner
c4e664bb9d Fix PR1114 and CodeGen/Generic/2007-01-15-LoadSelectCycle.ll by being 
careful when folding "c ? load p : load q" that C doesn't reach either load.
If so, folding this into load (c ? p : q) will induce a cycle in the graph.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33251 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-16 05:59:59 +00:00
Chris Lattner
938ab02256 add options to view the dags before the first or second pass of dag combine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33249 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-16 04:55:25 +00:00
Chris Lattner
ddae4bd683 Implement some trivial FP foldings when -enable-unsafe-fp-math is specified. 
This implements CodeGen/PowerPC/unsafe-math.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33024 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-08 23:04:05 +00:00
Chris Lattner
cd3245ac45 Eliminate static ctors from Statistics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32698 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-19 22:41:21 +00:00
Evan Cheng
e90460ee9a Cannot combine an indexed load / store any further. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32629 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-16 06:25:23 +00:00
Jim Laskey
f6c4ccfaab This code was usurping the sextload expand in teh legalizer. Just make 
sure the right conditions are checked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32611 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-15 21:38:30 +00:00
Chris Lattner
62be1a71f4 make this code more aggressive about turning store fpimm into store int imm. 
This is not sufficient to fix X86/store-fp-constant.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32465 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-12 04:16:14 +00:00
Evan Cheng
25ece66ff3 Don't convert store double C, Ptr to store long C, Ptr if i64 is not a legal type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 17:25:19 +00:00
Nate Begeman
2cbba89347 Move something that should be in the dag combiner from the legalizer to the 
dag combiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32431 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-11 02:23:46 +00:00
Chris Lattner
555d8d6f4b Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32336 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:36:47 +00:00
Bill Wendling
832171cb97 Removing even more <iostream> includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 20:04:42 +00:00
Chris Lattner
ac0b6ae358 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-06 17:46:33 +00:00
Chris Lattner
bc4cf8d5b1 For better or worse, load from i1 is assumed to be zero extended. Do not 
form a load from i1 from larger loads that may not be zext'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 04:40:53 +00:00
Chris Lattner
32ba1aa204 Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 18:05:46 +00:00
Evan Cheng
cc47021f49 Fix an incorrectly inverted condition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:08:20 +00:00
Chris Lattner
41e53fd39b disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 01:00:15 +00:00
Chris Lattner
9f1794ea58 reduce indentation by using early exits. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:56:29 +00:00
Chris Lattner
448f219fed move big chunks of code out-of-line, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:39:41 +00:00
Chris Lattner
734c91d250 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:37:15 +00:00
Evan Cheng
a7ff64d608 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:28:11 +00:00
Evan Cheng
8dc5cad8a2 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:10:46 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 04:29:46 +00:00
Evan Cheng
b00dddd164 Match more post-indexed ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:27:27 +00:00
Jim Laskey
d6c3422e31 Remove redundant <cmath>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:16:44 +00:00
Evan Cheng
03fa6ea402 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 08:30:28 +00:00
Evan Cheng
a4f53ef527 Fixed a minor bug preventing some pre-indexed load / store transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:56:05 +00:00
Evan Cheng
6c1491dd06 Fix a obscure post-indexed load / store dag combine bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:38:55 +00:00
Evan Cheng
bbd6f6ec1a Add post-indexed load / store transformations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 09:03:05 +00:00
Evan Cheng
3ef554d2b1 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 08:14:30 +00:00
Jeff Cohen
d41b30def3 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 19:31:28 +00:00
Evan Cheng
33dbedcdcb Added pre-indexed store support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 09:31:14 +00:00
Evan Cheng
1a854be352 Rename 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 07:21:16 +00:00
Reid Spencer
b8f4e0aa17 Remove dead variable. Fix 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:30:34 +00:00
Evan Cheng
7fc033a24d Added DAG combiner transformation to generate pre-indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:06:21 +00:00
Reid Spencer
3ed469ccd7 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 20:25:50 +00:00
Jim Laskey
07a2709e9d Add option for controlling inclusion of global AA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-18 19:08:31 +00:00
Jim Laskey
096c22ea3d Use global info for alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31035 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-18 12:29:57 +00:00
Chris Lattner
50662beab7 Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31019 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 21:24:15 +00:00
Jim Laskey
26f7fa7bba Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 19:33:52 +00:00
Evan Cheng
5d04a1af4f Make sure operand does have size and element type operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 17:06:35 +00:00
Evan Cheng
5956922a2d Be careful when looking through a vbit_convert. Optimizing this: 
(vector_shuffle
  (vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
  (undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
  vbitconvert
is a very bad idea.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 22:49:37 +00:00
Jim Laskey
c7c3f110ed Pass AliasAnalysis thru to DAGCombiner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 20:52:31 +00:00
Jim Laskey
d4edf2cf91 Tidy up after truncstore changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30961 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 12:14:27 +00:00
Chris Lattner
30f73e78bd Make sure that the node returned by SimplifySetCC is added to the worklist 
so that it can be deleted if unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30955 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 03:52:46 +00:00
Chris Lattner
8ac9d0ebde fold setcc of a setcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 01:02:29 +00:00
Chris Lattner
51dabfb283 When SimplifySetCC was moved to the DAGCombiner, it was never removed from 
SelectionDAG and it has since bitrotted.  Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.

This fixes obscure bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 00:41:01 +00:00
Jim Laskey
274062c172 Reduce the workload by not adding chain users to work list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 23:32:28 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 21:14:26 +00:00
Chris Lattner
26d2990e03 Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to 
apply to rems as well as divs.  This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).

It compiles CodeGen/X86/rem.ll into:

_test1:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        imull %ecx
        addl %esi, %edx
        movl %edx, %eax
        shrl $31, %eax
        sarl $7, %edx
        addl %eax, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret
_test2:
        movl 4(%esp), %eax
        movl %eax, %ecx
        sarl $31, %ecx
        shrl $24, %ecx
        addl %eax, %ecx
        andl $4294967040, %ecx
        subl %ecx, %eax
        ret
_test3:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        mull %ecx
        shrl $7, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret

instead of div/idiv instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30920 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 20:58:32 +00:00
Chris Lattner
3657ffe037 add a minor dag combine noticed when looking at PR945 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30915 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 20:23:19 +00:00
Jim Laskey
3ad175bd70 D'oh - need to use the rigth kind of store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30903 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 15:22:24 +00:00
Jim Laskey
7aed46c25b Alias analysis of TRUNCSTORE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 18:55:16 +00:00
Jim Laskey
c2b19f3449 Handle aliasing of loadext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 17:47:52 +00:00
Jim Laskey
7ca56aff22 Fix regression in combiner alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 13:47:09 +00:00
Evan Cheng
2e49f090f9 Naming consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 07:10:22 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:57:25 +00:00
Chris Lattner
6270f686b3 Eliminate more token factors by taking advantage of transitivity: 
if TF depends on A and B, and A depends on B, TF just needs to depend on
A.  With Jim's alias-analysis stuff enabled, this compiles the testcase in
PR892 into:

__Z4test3Val:
        subl $44, %esp
        call L__Z3foov$stub
        movl %edx, 28(%esp)
        movl %eax, 32(%esp)
        movl %eax, 24(%esp)
        movl %edx, 36(%esp)
        movl 52(%esp), %ecx
        movl %ecx, 4(%esp)
        movl %eax, 8(%esp)
        movl %edx, 12(%esp)
        movl 48(%esp), %eax
        movl %eax, (%esp)
        call L__Z3bar3ValS_$stub
        addl $44, %esp
        ret

instead of:

__Z4test3Val:
        subl $44, %esp
        call L__Z3foov$stub
        movl %eax, 24(%esp)
        movl %edx, 28(%esp)
        movl 24(%esp), %eax
        movl %eax, 32(%esp)
        movl 28(%esp), %eax
        movl %eax, 36(%esp)
        movl 32(%esp), %eax
        movl 36(%esp), %ecx
        movl 52(%esp), %edx
        movl %edx, 4(%esp)
        movl %eax, 8(%esp)
        movl %ecx, 12(%esp)
        movl 48(%esp), %eax
        movl %eax, (%esp)
        call L__Z3bar3ValS_$stub
        addl $44, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30821 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-08 22:57:01 +00:00
Jim Laskey
7138234baf Combiner alias analysis passes Multisource (release-asserts.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30818 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 23:37:56 +00:00
Evan Cheng
786225adf0 Make use of getStore(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 23:01:46 +00:00
Jim Laskey
bc588b8bbf Alias analysis code clean ups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 15:07:25 +00:00
Jim Laskey
6ff23e5e84 More extensive alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30721 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 16:53:27 +00:00
Evan Cheng
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an 
extra operand to LOADX to specify the exact value extension type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 00:56:09 +00:00
Jim Laskey
bb1518585b Load chain check is not needed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30613 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 17:44:58 +00:00
Jim Laskey
79597d2af6 Chain can be any operand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30611 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 09:32:41 +00:00
Jim Laskey
3dd1170616 Wrong size for load 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 08:14:06 +00:00
Jim Laskey
172585b3aa Can't move a load node if it's chain is not used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 07:37:42 +00:00
Jim Laskey
14fbcbfa2b Accidental enable of bad code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30601 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 21:11:32 +00:00
Jim Laskey
288af5e740 Fix chain dropping in load and drop unused stores in ret blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30600 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 19:32:58 +00:00
Jim Laskey
279f053eae Core antialiasing for load and store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 16:29:54 +00:00
Evan Cheng
2adffa1f66 Make it work for DAG combine of multi-value nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 19:04:05 +00:00
Jim Laskey
516b0eacff core corrections 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30570 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 17:35:47 +00:00
Jim Laskey
d1aed7aaf7 Basic "in frame" alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30568 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 16:28:59 +00:00
Chris Lattner
0e4b922680 fold (aext (and (trunc x), cst)) -> (and x, cst). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:40:43 +00:00
Chris Lattner
bf3708794f Check the right value type. This fixes 186.crafty on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30560 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:17:39 +00:00
Chris Lattner
111c228241 Compile: 
int %test(ulong *%tmp) {
        %tmp = load ulong* %tmp         ; <ulong> [#uses=1]
        %tmp.mask = shr ulong %tmp, ubyte 50            ; <ulong> [#uses=1]
        %tmp.mask = cast ulong %tmp.mask to ubyte
        %tmp2 = and ubyte %tmp.mask, 3          ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp2 to int         ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        andl $3, %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        # TRUNCATE movb %al, %al
        andb $3, %al
        movzbl %al, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30558 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:14:31 +00:00
Chris Lattner
6007b84a5b Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when 
the src/dst are not the same size.  This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30557 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:00:20 +00:00
Chris Lattner
e3152e54b5 Compile: 
int test3(int a, int b) { return (a < 0) ? a : 0; }

to:

_test3:
        srawi r2, r3, 31
        and r3, r2, r3
        blr

instead of:

_test3:
        cmpwi cr0, r3, 1
        li r2, 0
        blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
        mr r3, r2
LBB2_2: ;entry
        blr


This implements: PowerPC/select_lt0.ll:seli32_a_a


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30517 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:41:35 +00:00
Chris Lattner
84750587bf Fold the full generality of (any_extend (truncate x)) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30514 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:29:17 +00:00
Chris Lattner
5f42a240ba Two things: 
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
   ignoring the result.  This allows us to compile:

bool %test(ulong %x) {
  %tmp = setlt ulong %x, 4294967296
  ret bool %tmp
}

to:

_test:
        cntlzw r2, r3
        cmplwi cr0, r3, 1
        srwi r2, r2, 5
        li r3, 0
        beq cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

instead of:

_test:
        addi r2, r3, -1
        cntlzw r2, r2
        cntlzw r3, r3
        srwi r2, r2, 5
        cmplwi cr0, r2, 0
        srwi r2, r3, 5
        li r3, 0
        bne cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

This isn't wonderful, but it's an improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30513 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:19:26 +00:00
Chris Lattner
1ec72738ac Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible. 
This implements CodeGen/X86/and-or-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30379 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 21:11:37 +00:00
Chris Lattner
516b962b5a Split rotate matching code out to its own function. Make it stronger, by 
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 20:50:57 +00:00
Evan Cheng
dfcfacb0cb DAG combiner fix for rotates. Previously the outer-most condition checks 
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 07:41:12 +00:00
Evan Cheng
1efba0ecb4 Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29951 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:42:35 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Chris Lattner
3577e38c2b change internal impl of dag combiner so that calls to CombineTo never have to 
make a temporary vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29618 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:56:38 +00:00